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Proper handling of reserved bits in the context register.
author
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 9 Apr 2007 14:16:30 +0000
(14:16 +0000)
committer
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 9 Apr 2007 14:16:30 +0000
(14:16 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2644
c046a42c
-6fe2-441c-8c8c-
71466251a162
target-mips/op.c
patch
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diff --git
a/target-mips/op.c
b/target-mips/op.c
index
d7f0306
..
4eb8a89
100644
(file)
--- a/
target-mips/op.c
+++ b/
target-mips/op.c
@@
-1293,7
+1293,7
@@
void op_mtc0_entrylo1 (void)
void op_mtc0_context (void)
{
- env->CP0_Context = (env->CP0_Context & ~0x007FFFFF) | (T0 & 0x007FFFF0);
+ env->CP0_Context = (env->CP0_Context & ~0x007FFFFF) | (T0 & ~0x007FFFFF);
RETURN();
}