Various reg offset shift typos.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3085 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 3d55c01..a1c54b9 100644 (file)
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -280,7 +280,7 @@ static void pxa2xx_clkpwr_write(void *opaque, int op2, int reg, int crm,
 
         case 1:
             /* Idle */
-            if (!(s->cm_regs[CCCR] & (1 << 31))) {     /* CPDIS */
+            if (!(s->cm_regs[CCCR >> 2] & (1 << 31))) {        /* CPDIS */
                 cpu_interrupt(s->env, CPU_INTERRUPT_HALT);
                 break;
             }
@@ -2057,7 +2057,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
         s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD], ds);
 
     s->cm_base = 0x41300000;
-    s->cm_regs[CCCR >> 4] = 0x02000210;        /* 416.0 MHz */
+    s->cm_regs[CCCR >> 2] = 0x02000210;        /* 416.0 MHz */
     s->clkcfg = 0x00000009;            /* Turbo mode active */
     iomemtype = cpu_register_io_memory(0, pxa2xx_cm_readfn,
                     pxa2xx_cm_writefn, s);
@@ -2166,7 +2166,7 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
         s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD], ds);
 
     s->cm_base = 0x41300000;
-    s->cm_regs[CCCR >> 4] = 0x02000210;        /* 416.0 MHz */
+    s->cm_regs[CCCR >> 2] = 0x02000210;        /* 416.0 MHz */
     s->clkcfg = 0x00000009;            /* Turbo mode active */
     iomemtype = cpu_register_io_memory(0, pxa2xx_cm_readfn,
                     pxa2xx_cm_writefn, s);

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 1c748e2..5bd40ff 100644 (file)
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -283,7 +283,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
 #else
 /* The ARM MMU allows 1k pages.  */
 /* ??? Linux doesn't actually use these, and they're deprecated in recent
-   architecture revisions.  Maybe an a configure option to disable them.  */
+   architecture revisions.  Maybe a configure option to disable them.  */
 #define TARGET_PAGE_BITS 10
 #endif