Catch unaligned sc/scd.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-mips/op_mem.c b/target-mips/op_mem.c
index a199172..19373cf 100644 (file)
--- a/target-mips/op_mem.c
+++ b/target-mips/op_mem.c
@@ -117,6 +117,10 @@ void glue(op_ll, MEMSUFFIX) (void)
 void glue(op_sc, MEMSUFFIX) (void)
 {
     CALL_FROM_TB0(dump_sc);
+    if (T0 & 0x3) {
+        env->CP0_BadVAddr = T0;
+        CALL_FROM_TB1(do_raise_exception, EXCP_AdES);
+    }
     if (T0 == env->CP0_LLAddr) {
         glue(stl, MEMSUFFIX)(T0, T1);
         T0 = 1;
@@ -182,6 +186,10 @@ void glue(op_lld, MEMSUFFIX) (void)
 void glue(op_scd, MEMSUFFIX) (void)
 {
     CALL_FROM_TB0(dump_sc);
+    if (T0 & 0x7) {
+        env->CP0_BadVAddr = T0;
+        CALL_FROM_TB1(do_raise_exception, EXCP_AdES);
+    }
     if (T0 == env->CP0_LLAddr) {
         glue(stq, MEMSUFFIX)(T0, T1);
         T0 = 1;

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 57527a5..e5eff06 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -714,6 +714,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
         opn = "sd";
         break;
     case OPC_SCD:
+        save_cpu_state(ctx, 1);
         GEN_LOAD_REG_TN(T1, rt);
         op_ldst(scd);
         opn = "scd";
@@ -812,6 +813,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
         opn = "ll";
         break;
     case OPC_SC:
+        save_cpu_state(ctx, 1);
         GEN_LOAD_REG_TN(T1, rt);
         op_ldst(sc);
         GEN_STORE_TN_REG(rt, T0);