100 * 1000 * 1000, ticks_per_sec);
}
-static void cpu_mips_update_count (CPUState *env, uint32_t count,
- uint32_t compare)
+void cpu_mips_store_count (CPUState *env, uint32_t count)
{
uint64_t now, next;
uint32_t tmp;
-
- if (env->CP0_Cause & (1 << CP0Ca_DC))
- return;
+ uint32_t compare = env->CP0_Compare;
tmp = count;
if (count == compare)
qemu_mod_timer(env->timer, next);
}
-void cpu_mips_store_count (CPUState *env, uint32_t value)
+static void cpu_mips_update_count (CPUState *env, uint32_t count)
{
- cpu_mips_update_count(env, value, env->CP0_Compare);
+ if (env->CP0_Cause & (1 << CP0Ca_DC))
+ return;
+
+ cpu_mips_store_count(env, count);
}
void cpu_mips_store_compare (CPUState *env, uint32_t value)
{
- cpu_mips_update_count(env, cpu_mips_get_count(env), value);
+ env->CP0_Compare = value;
+ cpu_mips_update_count(env, cpu_mips_get_count(env));
if ((env->CP0_Config0 & (0x7 << CP0C0_AR)) == (1 << CP0C0_AR))
env->CP0_Cause &= ~(1 << CP0Ca_TI);
cpu_mips_irq_request(env, 7, 0);
fprintf(logfile, "%s\n", __func__);
}
#endif
- cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare);
+ cpu_mips_update_count(env, cpu_mips_get_count(env));
if ((env->CP0_Config0 & (0x7 << CP0C0_AR)) == (1 << CP0C0_AR))
env->CP0_Cause |= 1 << CP0Ca_TI;
cpu_mips_irq_request(env, 7, 1);
{
env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
env->CP0_Compare = 0;
- cpu_mips_update_count(env, 1, 0);
+ cpu_mips_update_count(env, 1);
}
-