case 0:
switch (sel) {
case 0:
- gen_op_mfc0_index();
+ gen_op_mfc0_index();
rn = "Index";
break;
case 1:
-// gen_op_mfc0_mvpcontrol(); /* MT ASE */
+// gen_op_mfc0_mvpcontrol(); /* MT ASE */
rn = "MVPControl";
-// break;
+// break;
case 2:
-// gen_op_mfc0_mvpconf0(); /* MT ASE */
+// gen_op_mfc0_mvpconf0(); /* MT ASE */
rn = "MVPConf0";
-// break;
+// break;
case 3:
-// gen_op_mfc0_mvpconf1(); /* MT ASE */
+// gen_op_mfc0_mvpconf1(); /* MT ASE */
rn = "MVPConf1";
-// break;
+// break;
default:
goto die;
}
case 0:
gen_op_mfc0_random();
rn = "Random";
- break;
+ break;
case 1:
-// gen_op_mfc0_vpecontrol(); /* MT ASE */
+// gen_op_mfc0_vpecontrol(); /* MT ASE */
rn = "VPEControl";
-// break;
+// break;
case 2:
-// gen_op_mfc0_vpeconf0(); /* MT ASE */
+// gen_op_mfc0_vpeconf0(); /* MT ASE */
rn = "VPEConf0";
-// break;
+// break;
case 3:
-// gen_op_mfc0_vpeconf1(); /* MT ASE */
+// gen_op_mfc0_vpeconf1(); /* MT ASE */
rn = "VPEConf1";
-// break;
+// break;
case 4:
-// gen_op_mfc0_YQMask(); /* MT ASE */
+// gen_op_mfc0_YQMask(); /* MT ASE */
rn = "YQMask";
-// break;
+// break;
case 5:
-// gen_op_mfc0_vpeschedule(); /* MT ASE */
+// gen_op_mfc0_vpeschedule(); /* MT ASE */
rn = "VPESchedule";
-// break;
+// break;
case 6:
-// gen_op_mfc0_vpeschefback(); /* MT ASE */
+// gen_op_mfc0_vpeschefback(); /* MT ASE */
rn = "VPEScheFBack";
-// break;
+// break;
case 7:
-// gen_op_mfc0_vpeopt(); /* MT ASE */
+// gen_op_mfc0_vpeopt(); /* MT ASE */
rn = "VPEOpt";
-// break;
+// break;
default:
goto die;
}
case 2:
switch (sel) {
case 0:
- gen_op_mfc0_entrylo0();
- rn = "EntryLo0";
- break;
+ gen_op_mfc0_entrylo0();
+ rn = "EntryLo0";
+ break;
case 1:
-// gen_op_mfc0_tcstatus(); /* MT ASE */
- rn = "TCStatus";
-// break;
+// gen_op_mfc0_tcstatus(); /* MT ASE */
+ rn = "TCStatus";
+// break;
case 2:
-// gen_op_mfc0_tcbind(); /* MT ASE */
- rn = "TCBind";
-// break;
+// gen_op_mfc0_tcbind(); /* MT ASE */
+ rn = "TCBind";
+// break;
case 3:
-// gen_op_mfc0_tcrestart(); /* MT ASE */
- rn = "TCRestart";
-// break;
+// gen_op_mfc0_tcrestart(); /* MT ASE */
+ rn = "TCRestart";
+// break;
case 4:
-// gen_op_mfc0_tchalt(); /* MT ASE */
- rn = "TCHalt";
-// break;
+// gen_op_mfc0_tchalt(); /* MT ASE */
+ rn = "TCHalt";
+// break;
case 5:
-// gen_op_mfc0_tccontext(); /* MT ASE */
- rn = "TCContext";
-// break;
+// gen_op_mfc0_tccontext(); /* MT ASE */
+ rn = "TCContext";
+// break;
case 6:
-// gen_op_mfc0_tcschedule(); /* MT ASE */
- rn = "TCSchedule";
-// break;
+// gen_op_mfc0_tcschedule(); /* MT ASE */
+ rn = "TCSchedule";
+// break;
case 7:
-// gen_op_mfc0_tcschefback(); /* MT ASE */
- rn = "TCScheFBack";
-// break;
+// gen_op_mfc0_tcschefback(); /* MT ASE */
+ rn = "TCScheFBack";
+// break;
default:
goto die;
}
case 3:
switch (sel) {
case 0:
- gen_op_mfc0_entrylo1();
- rn = "EntryLo1";
- break;
+ gen_op_mfc0_entrylo1();
+ rn = "EntryLo1";
+ break;
default:
goto die;
}
case 4:
switch (sel) {
case 0:
- gen_op_mfc0_context();
- rn = "Context";
- break;
+ gen_op_mfc0_context();
+ rn = "Context";
+ break;
case 1:
-// gen_op_mfc0_contextconfig(); /* SmartMIPS ASE */
- rn = "ContextConfig";
-// break;
+// gen_op_mfc0_contextconfig(); /* SmartMIPS ASE */
+ rn = "ContextConfig";
+// break;
default:
goto die;
}
case 5:
switch (sel) {
case 0:
- gen_op_mfc0_pagemask();
- rn = "PageMask";
- break;
+ gen_op_mfc0_pagemask();
+ rn = "PageMask";
+ break;
case 1:
- gen_op_mfc0_pagegrain();
- rn = "PageGrain";
- break;
+ gen_op_mfc0_pagegrain();
+ rn = "PageGrain";
+ break;
default:
goto die;
}
case 6:
switch (sel) {
case 0:
- gen_op_mfc0_wired();
- rn = "Wired";
- break;
+ gen_op_mfc0_wired();
+ rn = "Wired";
+ break;
case 1:
-// gen_op_mfc0_srsconf0(); /* shadow registers */
- rn = "SRSConf0";
-// break;
+// gen_op_mfc0_srsconf0(); /* shadow registers */
+ rn = "SRSConf0";
+// break;
case 2:
-// gen_op_mfc0_srsconf1(); /* shadow registers */
- rn = "SRSConf1";
-// break;
+// gen_op_mfc0_srsconf1(); /* shadow registers */
+ rn = "SRSConf1";
+// break;
case 3:
-// gen_op_mfc0_srsconf2(); /* shadow registers */
- rn = "SRSConf2";
-// break;
+// gen_op_mfc0_srsconf2(); /* shadow registers */
+ rn = "SRSConf2";
+// break;
case 4:
-// gen_op_mfc0_srsconf3(); /* shadow registers */
- rn = "SRSConf3";
-// break;
+// gen_op_mfc0_srsconf3(); /* shadow registers */
+ rn = "SRSConf3";
+// break;
case 5:
-// gen_op_mfc0_srsconf4(); /* shadow registers */
- rn = "SRSConf4";
-// break;
+// gen_op_mfc0_srsconf4(); /* shadow registers */
+ rn = "SRSConf4";
+// break;
default:
goto die;
}
case 7:
switch (sel) {
case 0:
- gen_op_mfc0_hwrena();
- rn = "HWREna";
- break;
+ gen_op_mfc0_hwrena();
+ rn = "HWREna";
+ break;
default:
goto die;
}
case 8:
switch (sel) {
case 0:
- gen_op_mfc0_badvaddr();
- rn = "BadVaddr";
- break;
+ gen_op_mfc0_badvaddr();
+ rn = "BadVaddr";
+ break;
default:
goto die;
}
case 9:
switch (sel) {
case 0:
- gen_op_mfc0_count();
- rn = "Count";
- break;
- /* 6,7 are implementation dependent */
+ gen_op_mfc0_count();
+ rn = "Count";
+ break;
+ /* 6,7 are implementation dependent */
default:
goto die;
- }
+ }
break;
case 10:
switch (sel) {
case 0:
- gen_op_mfc0_entryhi();
- rn = "EntryHi";
- break;
+ gen_op_mfc0_entryhi();
+ rn = "EntryHi";
+ break;
default:
goto die;
}
case 11:
switch (sel) {
case 0:
- gen_op_mfc0_compare();
- rn = "Compare";
- break;
- /* 6,7 are implementation dependent */
+ gen_op_mfc0_compare();
+ rn = "Compare";
+ break;
+ /* 6,7 are implementation dependent */
default:
goto die;
- }
+ }
break;
case 12:
switch (sel) {
case 0:
- gen_op_mfc0_status();
- rn = "Status";
- break;
+ gen_op_mfc0_status();
+ rn = "Status";
+ break;
case 1:
- gen_op_mfc0_intctl();
- rn = "IntCtl";
- break;
+ gen_op_mfc0_intctl();
+ rn = "IntCtl";
+ break;
case 2:
- gen_op_mfc0_srsctl();
- rn = "SRSCtl";
- break;
+ gen_op_mfc0_srsctl();
+ rn = "SRSCtl";
+ break;
case 3:
-// gen_op_mfc0_srsmap(); /* shadow registers */
- rn = "SRSMap";
-// break;
+// gen_op_mfc0_srsmap(); /* shadow registers */
+ rn = "SRSMap";
+// break;
default:
goto die;
}
case 13:
switch (sel) {
case 0:
- gen_op_mfc0_cause();
- rn = "Cause";
- break;
+ gen_op_mfc0_cause();
+ rn = "Cause";
+ break;
default:
goto die;
}
case 14:
switch (sel) {
case 0:
- gen_op_mfc0_epc();
- rn = "EPC";
- break;
+ gen_op_mfc0_epc();
+ rn = "EPC";
+ break;
default:
goto die;
}
case 15:
switch (sel) {
case 0:
- gen_op_mfc0_prid();
- rn = "PRid";
- break;
+ gen_op_mfc0_prid();
+ rn = "PRid";
+ break;
case 1:
- gen_op_mfc0_ebase();
- rn = "EBase";
- break;
+ gen_op_mfc0_ebase();
+ rn = "EBase";
+ break;
default:
goto die;
}
case 17:
switch (sel) {
case 0:
- gen_op_mfc0_lladdr();
- rn = "LLAddr";
- break;
+ gen_op_mfc0_lladdr();
+ rn = "LLAddr";
+ break;
default:
goto die;
}
case 18:
switch (sel) {
case 0:
- gen_op_mfc0_watchlo0();
- rn = "WatchLo";
- break;
+ gen_op_mfc0_watchlo0();
+ rn = "WatchLo";
+ break;
case 1:
-// gen_op_mfc0_watchlo1();
- rn = "WatchLo1";
-// break;
+// gen_op_mfc0_watchlo1();
+ rn = "WatchLo1";
+// break;
case 2:
-// gen_op_mfc0_watchlo2();
- rn = "WatchLo2";
-// break;
+// gen_op_mfc0_watchlo2();
+ rn = "WatchLo2";
+// break;
case 3:
-// gen_op_mfc0_watchlo3();
- rn = "WatchLo3";
-// break;
+// gen_op_mfc0_watchlo3();
+ rn = "WatchLo3";
+// break;
case 4:
-// gen_op_mfc0_watchlo4();
- rn = "WatchLo4";
-// break;
+// gen_op_mfc0_watchlo4();
+ rn = "WatchLo4";
+// break;
case 5:
-// gen_op_mfc0_watchlo5();
- rn = "WatchLo5";
-// break;
+// gen_op_mfc0_watchlo5();
+ rn = "WatchLo5";
+// break;
case 6:
-// gen_op_mfc0_watchlo6();
- rn = "WatchLo6";
-// break;
+// gen_op_mfc0_watchlo6();
+ rn = "WatchLo6";
+// break;
case 7:
-// gen_op_mfc0_watchlo7();
- rn = "WatchLo7";
-// break;
+// gen_op_mfc0_watchlo7();
+ rn = "WatchLo7";
+// break;
default:
goto die;
}
case 19:
switch (sel) {
case 0:
- gen_op_mfc0_watchhi0();
- rn = "WatchHi";
- break;
+ gen_op_mfc0_watchhi0();
+ rn = "WatchHi";
+ break;
case 1:
-// gen_op_mfc0_watchhi1();
- rn = "WatchHi1";
-// break;
+// gen_op_mfc0_watchhi1();
+ rn = "WatchHi1";
+// break;
case 2:
-// gen_op_mfc0_watchhi2();
- rn = "WatchHi2";
-// break;
+// gen_op_mfc0_watchhi2();
+ rn = "WatchHi2";
+// break;
case 3:
-// gen_op_mfc0_watchhi3();
- rn = "WatchHi3";
-// break;
+// gen_op_mfc0_watchhi3();
+ rn = "WatchHi3";
+// break;
case 4:
-// gen_op_mfc0_watchhi4();
- rn = "WatchHi4";
-// break;
+// gen_op_mfc0_watchhi4();
+ rn = "WatchHi4";
+// break;
case 5:
-// gen_op_mfc0_watchhi5();
- rn = "WatchHi5";
-// break;
+// gen_op_mfc0_watchhi5();
+ rn = "WatchHi5";
+// break;
case 6:
-// gen_op_mfc0_watchhi6();
- rn = "WatchHi6";
-// break;
+// gen_op_mfc0_watchhi6();
+ rn = "WatchHi6";
+// break;
case 7:
-// gen_op_mfc0_watchhi7();
- rn = "WatchHi7";
-// break;
+// gen_op_mfc0_watchhi7();
+ rn = "WatchHi7";
+// break;
default:
goto die;
}
case 20:
switch (sel) {
case 0:
- /* 64 bit MMU only */
- gen_op_mfc0_xcontext();
- rn = "XContext";
- break;
+ /* 64 bit MMU only */
+ gen_op_mfc0_xcontext();
+ rn = "XContext";
+ break;
default:
goto die;
}
/* Officially reserved, but sel 0 is used for R1x000 framemask */
switch (sel) {
case 0:
- gen_op_mfc0_framemask();
- rn = "Framemask";
- break;
+ gen_op_mfc0_framemask();
+ rn = "Framemask";
+ break;
default:
goto die;
}
break;
case 22:
- /* ignored */
- rn = "'Diagnostic"; /* implementation dependent */
- break;
+ /* ignored */
+ rn = "'Diagnostic"; /* implementation dependent */
+ break;
case 23:
switch (sel) {
case 0:
- gen_op_mfc0_debug(); /* EJTAG support */
- rn = "Debug";
- break;
+ gen_op_mfc0_debug(); /* EJTAG support */
+ rn = "Debug";
+ break;
case 1:
-// gen_op_mfc0_tracecontrol(); /* PDtrace support */
- rn = "TraceControl";
-// break;
+// gen_op_mfc0_tracecontrol(); /* PDtrace support */
+ rn = "TraceControl";
+// break;
case 2:
-// gen_op_mfc0_tracecontrol2(); /* PDtrace support */
- rn = "TraceControl2";
-// break;
+// gen_op_mfc0_tracecontrol2(); /* PDtrace support */
+ rn = "TraceControl2";
+// break;
case 3:
-// gen_op_mfc0_usertracedata(); /* PDtrace support */
- rn = "UserTraceData";
-// break;
+// gen_op_mfc0_usertracedata(); /* PDtrace support */
+ rn = "UserTraceData";
+// break;
case 4:
-// gen_op_mfc0_debug(); /* PDtrace support */
- rn = "TraceBPC";
-// break;
+// gen_op_mfc0_debug(); /* PDtrace support */
+ rn = "TraceBPC";
+// break;
default:
goto die;
}
case 24:
switch (sel) {
case 0:
- gen_op_mfc0_depc(); /* EJTAG support */
- rn = "DEPC";
- break;
+ gen_op_mfc0_depc(); /* EJTAG support */
+ rn = "DEPC";
+ break;
default:
goto die;
}
case 25:
switch (sel) {
case 0:
- gen_op_mfc0_performance0();
- rn = "Performance0";
+ gen_op_mfc0_performance0();
+ rn = "Performance0";
break;
case 1:
-// gen_op_mfc0_performance1();
- rn = "Performance1";
-// break;
+// gen_op_mfc0_performance1();
+ rn = "Performance1";
+// break;
case 2:
-// gen_op_mfc0_performance2();
- rn = "Performance2";
-// break;
+// gen_op_mfc0_performance2();
+ rn = "Performance2";
+// break;
case 3:
-// gen_op_mfc0_performance3();
- rn = "Performance3";
-// break;
+// gen_op_mfc0_performance3();
+ rn = "Performance3";
+// break;
case 4:
-// gen_op_mfc0_performance4();
- rn = "Performance4";
-// break;
+// gen_op_mfc0_performance4();
+ rn = "Performance4";
+// break;
case 5:
-// gen_op_mfc0_performance5();
- rn = "Performance5";
-// break;
+// gen_op_mfc0_performance5();
+ rn = "Performance5";
+// break;
case 6:
-// gen_op_mfc0_performance6();
- rn = "Performance6";
-// break;
+// gen_op_mfc0_performance6();
+ rn = "Performance6";
+// break;
case 7:
-// gen_op_mfc0_performance7();
- rn = "Performance7";
-// break;
+// gen_op_mfc0_performance7();
+ rn = "Performance7";
+// break;
default:
goto die;
}
switch (sel) {
/* ignored */
case 0 ... 3:
- rn = "CacheErr";
- break;
+ rn = "CacheErr";
+ break;
default:
goto die;
}
case 30:
switch (sel) {
case 0:
- gen_op_mfc0_errorepc();
- rn = "ErrorEPC";
- break;
+ gen_op_mfc0_errorepc();
+ rn = "ErrorEPC";
+ break;
default:
goto die;
}
case 31:
switch (sel) {
case 0:
- gen_op_mfc0_desave(); /* EJTAG support */
- rn = "DESAVE";
- break;
+ gen_op_mfc0_desave(); /* EJTAG support */
+ rn = "DESAVE";
+ break;
default:
goto die;
}
rn = "Index";
break;
case 1:
-// gen_op_mtc0_mvpcontrol(); /* MT ASE */
+// gen_op_mtc0_mvpcontrol(); /* MT ASE */
rn = "MVPControl";
-// break;
+// break;
case 2:
-// gen_op_mtc0_mvpconf0(); /* MT ASE */
+// gen_op_mtc0_mvpconf0(); /* MT ASE */
rn = "MVPConf0";
-// break;
+// break;
case 3:
-// gen_op_mtc0_mvpconf1(); /* MT ASE */
+// gen_op_mtc0_mvpconf1(); /* MT ASE */
rn = "MVPConf1";
-// break;
+// break;
default:
goto die;
}
case 1:
switch (sel) {
case 0:
- /* ignored */
+ /* ignored */
rn = "Random";
- break;
+ break;
case 1:
-// gen_op_mtc0_vpecontrol(); /* MT ASE */
+// gen_op_mtc0_vpecontrol(); /* MT ASE */
rn = "VPEControl";
-// break;
+// break;
case 2:
-// gen_op_mtc0_vpeconf0(); /* MT ASE */
+// gen_op_mtc0_vpeconf0(); /* MT ASE */
rn = "VPEConf0";
-// break;
+// break;
case 3:
-// gen_op_mtc0_vpeconf1(); /* MT ASE */
+// gen_op_mtc0_vpeconf1(); /* MT ASE */
rn = "VPEConf1";
-// break;
+// break;
case 4:
-// gen_op_mtc0_YQMask(); /* MT ASE */
+// gen_op_mtc0_YQMask(); /* MT ASE */
rn = "YQMask";
-// break;
+// break;
case 5:
-// gen_op_mtc0_vpeschedule(); /* MT ASE */
+// gen_op_mtc0_vpeschedule(); /* MT ASE */
rn = "VPESchedule";
-// break;
+// break;
case 6:
-// gen_op_mtc0_vpeschefback(); /* MT ASE */
+// gen_op_mtc0_vpeschefback(); /* MT ASE */
rn = "VPEScheFBack";
-// break;
+// break;
case 7:
-// gen_op_mtc0_vpeopt(); /* MT ASE */
+// gen_op_mtc0_vpeopt(); /* MT ASE */
rn = "VPEOpt";
-// break;
+// break;
default:
goto die;
}
case 2:
switch (sel) {
case 0:
- gen_op_mtc0_entrylo0();
- rn = "EntryLo0";
- break;
+ gen_op_mtc0_entrylo0();
+ rn = "EntryLo0";
+ break;
case 1:
-// gen_op_mtc0_tcstatus(); /* MT ASE */
- rn = "TCStatus";
-// break;
+// gen_op_mtc0_tcstatus(); /* MT ASE */
+ rn = "TCStatus";
+// break;
case 2:
-// gen_op_mtc0_tcbind(); /* MT ASE */
- rn = "TCBind";
-// break;
+// gen_op_mtc0_tcbind(); /* MT ASE */
+ rn = "TCBind";
+// break;
case 3:
-// gen_op_mtc0_tcrestart(); /* MT ASE */
- rn = "TCRestart";
-// break;
+// gen_op_mtc0_tcrestart(); /* MT ASE */
+ rn = "TCRestart";
+// break;
case 4:
-// gen_op_mtc0_tchalt(); /* MT ASE */
- rn = "TCHalt";
-// break;
+// gen_op_mtc0_tchalt(); /* MT ASE */
+ rn = "TCHalt";
+// break;
case 5:
-// gen_op_mtc0_tccontext(); /* MT ASE */
- rn = "TCContext";
-// break;
+// gen_op_mtc0_tccontext(); /* MT ASE */
+ rn = "TCContext";
+// break;
case 6:
-// gen_op_mtc0_tcschedule(); /* MT ASE */
- rn = "TCSchedule";
-// break;
+// gen_op_mtc0_tcschedule(); /* MT ASE */
+ rn = "TCSchedule";
+// break;
case 7:
-// gen_op_mtc0_tcschefback(); /* MT ASE */
- rn = "TCScheFBack";
-// break;
+// gen_op_mtc0_tcschefback(); /* MT ASE */
+ rn = "TCScheFBack";
+// break;
default:
goto die;
}
case 3:
switch (sel) {
case 0:
- gen_op_mtc0_entrylo1();
- rn = "EntryLo1";
- break;
+ gen_op_mtc0_entrylo1();
+ rn = "EntryLo1";
+ break;
default:
goto die;
}
case 4:
switch (sel) {
case 0:
- gen_op_mtc0_context();
- rn = "Context";
- break;
+ gen_op_mtc0_context();
+ rn = "Context";
+ break;
case 1:
-// gen_op_mtc0_contextconfig(); /* SmartMIPS ASE */
- rn = "ContextConfig";
-// break;
+// gen_op_mtc0_contextconfig(); /* SmartMIPS ASE */
+ rn = "ContextConfig";
+// break;
default:
goto die;
}
case 5:
switch (sel) {
case 0:
- gen_op_mtc0_pagemask();
- rn = "PageMask";
- break;
+ gen_op_mtc0_pagemask();
+ rn = "PageMask";
+ break;
case 1:
- gen_op_mtc0_pagegrain();
- rn = "PageGrain";
- break;
+ gen_op_mtc0_pagegrain();
+ rn = "PageGrain";
+ break;
default:
goto die;
}
case 6:
switch (sel) {
case 0:
- gen_op_mtc0_wired();
- rn = "Wired";
- break;
+ gen_op_mtc0_wired();
+ rn = "Wired";
+ break;
case 1:
-// gen_op_mtc0_srsconf0(); /* shadow registers */
- rn = "SRSConf0";
-// break;
+// gen_op_mtc0_srsconf0(); /* shadow registers */
+ rn = "SRSConf0";
+// break;
case 2:
-// gen_op_mtc0_srsconf1(); /* shadow registers */
- rn = "SRSConf1";
-// break;
+// gen_op_mtc0_srsconf1(); /* shadow registers */
+ rn = "SRSConf1";
+// break;
case 3:
-// gen_op_mtc0_srsconf2(); /* shadow registers */
- rn = "SRSConf2";
-// break;
+// gen_op_mtc0_srsconf2(); /* shadow registers */
+ rn = "SRSConf2";
+// break;
case 4:
-// gen_op_mtc0_srsconf3(); /* shadow registers */
- rn = "SRSConf3";
-// break;
+// gen_op_mtc0_srsconf3(); /* shadow registers */
+ rn = "SRSConf3";
+// break;
case 5:
-// gen_op_mtc0_srsconf4(); /* shadow registers */
- rn = "SRSConf4";
-// break;
+// gen_op_mtc0_srsconf4(); /* shadow registers */
+ rn = "SRSConf4";
+// break;
default:
goto die;
}
case 7:
switch (sel) {
case 0:
- gen_op_mtc0_hwrena();
- rn = "HWREna";
- break;
+ gen_op_mtc0_hwrena();
+ rn = "HWREna";
+ break;
default:
goto die;
}
case 9:
switch (sel) {
case 0:
- gen_op_mtc0_count();
- rn = "Count";
- break;
+ gen_op_mtc0_count();
+ rn = "Count";
+ break;
/* 6,7 are implementation dependent */
default:
goto die;
case 10:
switch (sel) {
case 0:
- gen_op_mtc0_entryhi();
- rn = "EntryHi";
- break;
+ gen_op_mtc0_entryhi();
+ rn = "EntryHi";
+ break;
default:
goto die;
}
case 11:
switch (sel) {
case 0:
- gen_op_mtc0_compare();
- rn = "Compare";
- break;
- /* 6,7 are implementation dependent */
+ gen_op_mtc0_compare();
+ rn = "Compare";
+ break;
+ /* 6,7 are implementation dependent */
default:
goto die;
}
case 12:
switch (sel) {
case 0:
- gen_op_mtc0_status();
- rn = "Status";
- break;
+ gen_op_mtc0_status();
+ rn = "Status";
+ break;
case 1:
- gen_op_mtc0_intctl();
- rn = "IntCtl";
- break;
+ gen_op_mtc0_intctl();
+ rn = "IntCtl";
+ break;
case 2:
- gen_op_mtc0_srsctl();
- rn = "SRSCtl";
- break;
+ gen_op_mtc0_srsctl();
+ rn = "SRSCtl";
+ break;
case 3:
-// gen_op_mtc0_srsmap(); /* shadow registers */
- rn = "SRSMap";
-// break;
+// gen_op_mtc0_srsmap(); /* shadow registers */
+ rn = "SRSMap";
+// break;
default:
goto die;
}
case 13:
switch (sel) {
case 0:
- gen_op_mtc0_cause();
- rn = "Cause";
- break;
+ gen_op_mtc0_cause();
+ rn = "Cause";
+ break;
default:
goto die;
}
case 14:
switch (sel) {
case 0:
- gen_op_mtc0_epc();
- rn = "EPC";
- break;
+ gen_op_mtc0_epc();
+ rn = "EPC";
+ break;
default:
goto die;
}
case 15:
switch (sel) {
case 0:
- /* ignored */
- rn = "PRid";
- break;
+ /* ignored */
+ rn = "PRid";
+ break;
case 1:
- gen_op_mtc0_ebase();
- rn = "EBase";
- break;
+ gen_op_mtc0_ebase();
+ rn = "EBase";
+ break;
default:
goto die;
}
case 0:
gen_op_mtc0_config0();
rn = "Config";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 1:
/* ignored, read only */
case 2:
gen_op_mtc0_config2();
rn = "Config2";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 3:
/* ignored, read only */
rn = "Invalid config selector";
goto die;
}
- /* Stop translation as we may have switched the execution mode */
- ctx->bstate = BS_STOP;
break;
case 17:
switch (sel) {
case 0:
- /* ignored */
- rn = "LLAddr";
- break;
+ /* ignored */
+ rn = "LLAddr";
+ break;
default:
goto die;
}
case 18:
switch (sel) {
case 0:
- gen_op_mtc0_watchlo0();
- rn = "WatchLo";
- break;
+ gen_op_mtc0_watchlo0();
+ rn = "WatchLo";
+ break;
case 1:
-// gen_op_mtc0_watchlo1();
- rn = "WatchLo1";
-// break;
+// gen_op_mtc0_watchlo1();
+ rn = "WatchLo1";
+// break;
case 2:
-// gen_op_mtc0_watchlo2();
- rn = "WatchLo2";
-// break;
+// gen_op_mtc0_watchlo2();
+ rn = "WatchLo2";
+// break;
case 3:
-// gen_op_mtc0_watchlo3();
- rn = "WatchLo3";
-// break;
+// gen_op_mtc0_watchlo3();
+ rn = "WatchLo3";
+// break;
case 4:
-// gen_op_mtc0_watchlo4();
- rn = "WatchLo4";
-// break;
+// gen_op_mtc0_watchlo4();
+ rn = "WatchLo4";
+// break;
case 5:
-// gen_op_mtc0_watchlo5();
- rn = "WatchLo5";
-// break;
+// gen_op_mtc0_watchlo5();
+ rn = "WatchLo5";
+// break;
case 6:
-// gen_op_mtc0_watchlo6();
- rn = "WatchLo6";
-// break;
+// gen_op_mtc0_watchlo6();
+ rn = "WatchLo6";
+// break;
case 7:
-// gen_op_mtc0_watchlo7();
- rn = "WatchLo7";
-// break;
+// gen_op_mtc0_watchlo7();
+ rn = "WatchLo7";
+// break;
default:
goto die;
}
case 19:
switch (sel) {
case 0:
- gen_op_mtc0_watchhi0();
- rn = "WatchHi";
- break;
+ gen_op_mtc0_watchhi0();
+ rn = "WatchHi";
+ break;
case 1:
-// gen_op_mtc0_watchhi1();
- rn = "WatchHi1";
-// break;
+// gen_op_mtc0_watchhi1();
+ rn = "WatchHi1";
+// break;
case 2:
-// gen_op_mtc0_watchhi2();
- rn = "WatchHi2";
-// break;
+// gen_op_mtc0_watchhi2();
+ rn = "WatchHi2";
+// break;
case 3:
-// gen_op_mtc0_watchhi3();
- rn = "WatchHi3";
-// break;
+// gen_op_mtc0_watchhi3();
+ rn = "WatchHi3";
+// break;
case 4:
-// gen_op_mtc0_watchhi4();
- rn = "WatchHi4";
-// break;
+// gen_op_mtc0_watchhi4();
+ rn = "WatchHi4";
+// break;
case 5:
-// gen_op_mtc0_watchhi5();
- rn = "WatchHi5";
-// break;
+// gen_op_mtc0_watchhi5();
+ rn = "WatchHi5";
+// break;
case 6:
-// gen_op_mtc0_watchhi6();
- rn = "WatchHi6";
-// break;
+// gen_op_mtc0_watchhi6();
+ rn = "WatchHi6";
+// break;
case 7:
-// gen_op_mtc0_watchhi7();
- rn = "WatchHi7";
-// break;
+// gen_op_mtc0_watchhi7();
+ rn = "WatchHi7";
+// break;
default:
goto die;
}
case 20:
switch (sel) {
case 0:
- /* 64 bit MMU only */
- /* Nothing writable in lower 32 bits */
- rn = "XContext";
- break;
+ /* 64 bit MMU only */
+ /* Nothing writable in lower 32 bits */
+ rn = "XContext";
+ break;
default:
goto die;
}
/* Officially reserved, but sel 0 is used for R1x000 framemask */
switch (sel) {
case 0:
- gen_op_mtc0_framemask();
- rn = "Framemask";
- break;
+ gen_op_mtc0_framemask();
+ rn = "Framemask";
+ break;
default:
goto die;
}
case 22:
/* ignored */
rn = "Diagnostic"; /* implementation dependent */
- break;
+ break;
case 23:
switch (sel) {
case 0:
- gen_op_mtc0_debug(); /* EJTAG support */
- rn = "Debug";
- break;
+ gen_op_mtc0_debug(); /* EJTAG support */
+ rn = "Debug";
+ break;
case 1:
-// gen_op_mtc0_tracecontrol(); /* PDtrace support */
- rn = "TraceControl";
-// break;
+// gen_op_mtc0_tracecontrol(); /* PDtrace support */
+ rn = "TraceControl";
+// break;
case 2:
-// gen_op_mtc0_tracecontrol2(); /* PDtrace support */
- rn = "TraceControl2";
-// break;
+// gen_op_mtc0_tracecontrol2(); /* PDtrace support */
+ rn = "TraceControl2";
+// break;
case 3:
-// gen_op_mtc0_usertracedata(); /* PDtrace support */
- rn = "UserTraceData";
-// break;
+// gen_op_mtc0_usertracedata(); /* PDtrace support */
+ rn = "UserTraceData";
+// break;
case 4:
-// gen_op_mtc0_debug(); /* PDtrace support */
- rn = "TraceBPC";
-// break;
+// gen_op_mtc0_debug(); /* PDtrace support */
+ rn = "TraceBPC";
+// break;
default:
goto die;
}
- /* Stop translation as we may have switched the execution mode */
- ctx->bstate = BS_STOP;
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 24:
switch (sel) {
case 0:
- gen_op_mtc0_depc(); /* EJTAG support */
- rn = "DEPC";
- break;
+ gen_op_mtc0_depc(); /* EJTAG support */
+ rn = "DEPC";
+ break;
default:
goto die;
}
case 25:
switch (sel) {
case 0:
- gen_op_mtc0_performance0();
- rn = "Performance0";
- break;
+ gen_op_mtc0_performance0();
+ rn = "Performance0";
+ break;
case 1:
-// gen_op_mtc0_performance1();
- rn = "Performance1";
-// break;
+// gen_op_mtc0_performance1();
+ rn = "Performance1";
+// break;
case 2:
-// gen_op_mtc0_performance2();
- rn = "Performance2";
-// break;
+// gen_op_mtc0_performance2();
+ rn = "Performance2";
+// break;
case 3:
-// gen_op_mtc0_performance3();
- rn = "Performance3";
-// break;
+// gen_op_mtc0_performance3();
+ rn = "Performance3";
+// break;
case 4:
-// gen_op_mtc0_performance4();
- rn = "Performance4";
-// break;
+// gen_op_mtc0_performance4();
+ rn = "Performance4";
+// break;
case 5:
-// gen_op_mtc0_performance5();
- rn = "Performance5";
-// break;
+// gen_op_mtc0_performance5();
+ rn = "Performance5";
+// break;
case 6:
-// gen_op_mtc0_performance6();
- rn = "Performance6";
-// break;
+// gen_op_mtc0_performance6();
+ rn = "Performance6";
+// break;
case 7:
-// gen_op_mtc0_performance7();
- rn = "Performance7";
-// break;
+// gen_op_mtc0_performance7();
+ rn = "Performance7";
+// break;
default:
goto die;
}
break;
case 26:
- /* ignored */
+ /* ignored */
rn = "ECC";
- break;
+ break;
case 27:
switch (sel) {
case 0 ... 3:
- /* ignored */
- rn = "CacheErr";
- break;
+ /* ignored */
+ rn = "CacheErr";
+ break;
default:
goto die;
}
case 3:
case 5:
case 7:
- gen_op_mtc0_datalo();
+ gen_op_mtc0_datalo();
rn = "DataLo";
break;
default:
case 3:
case 5:
case 7:
- gen_op_mtc0_datahi();
+ gen_op_mtc0_datahi();
rn = "DataHi";
break;
default:
case 30:
switch (sel) {
case 0:
- gen_op_mtc0_errorepc();
- rn = "ErrorEPC";
- break;
+ gen_op_mtc0_errorepc();
+ rn = "ErrorEPC";
+ break;
default:
goto die;
}
case 31:
switch (sel) {
case 0:
- gen_op_mtc0_desave(); /* EJTAG support */
- rn = "DESAVE";
- break;
+ gen_op_mtc0_desave(); /* EJTAG support */
+ rn = "DESAVE";
+ break;
default:
goto die;
}
- /* Stop translation as we may have switched the execution mode */
- ctx->bstate = BS_STOP;
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
default:
goto die;
case 0:
switch (sel) {
case 0:
- gen_op_mfc0_index();
+ gen_op_mfc0_index();
rn = "Index";
break;
case 1:
-// gen_op_dmfc0_mvpcontrol(); /* MT ASE */
+// gen_op_dmfc0_mvpcontrol(); /* MT ASE */
rn = "MVPControl";
-// break;
+// break;
case 2:
-// gen_op_dmfc0_mvpconf0(); /* MT ASE */
+// gen_op_dmfc0_mvpconf0(); /* MT ASE */
rn = "MVPConf0";
-// break;
+// break;
case 3:
-// gen_op_dmfc0_mvpconf1(); /* MT ASE */
+// gen_op_dmfc0_mvpconf1(); /* MT ASE */
rn = "MVPConf1";
-// break;
+// break;
default:
goto die;
}
case 0:
gen_op_mfc0_random();
rn = "Random";
- break;
+ break;
case 1:
-// gen_op_dmfc0_vpecontrol(); /* MT ASE */
+// gen_op_dmfc0_vpecontrol(); /* MT ASE */
rn = "VPEControl";
-// break;
+// break;
case 2:
-// gen_op_dmfc0_vpeconf0(); /* MT ASE */
+// gen_op_dmfc0_vpeconf0(); /* MT ASE */
rn = "VPEConf0";
-// break;
+// break;
case 3:
-// gen_op_dmfc0_vpeconf1(); /* MT ASE */
+// gen_op_dmfc0_vpeconf1(); /* MT ASE */
rn = "VPEConf1";
-// break;
+// break;
case 4:
-// gen_op_dmfc0_YQMask(); /* MT ASE */
+// gen_op_dmfc0_YQMask(); /* MT ASE */
rn = "YQMask";
-// break;
+// break;
case 5:
-// gen_op_dmfc0_vpeschedule(); /* MT ASE */
+// gen_op_dmfc0_vpeschedule(); /* MT ASE */
rn = "VPESchedule";
-// break;
+// break;
case 6:
-// gen_op_dmfc0_vpeschefback(); /* MT ASE */
+// gen_op_dmfc0_vpeschefback(); /* MT ASE */
rn = "VPEScheFBack";
-// break;
+// break;
case 7:
-// gen_op_dmfc0_vpeopt(); /* MT ASE */
+// gen_op_dmfc0_vpeopt(); /* MT ASE */
rn = "VPEOpt";
-// break;
+// break;
default:
goto die;
}
case 2:
switch (sel) {
case 0:
- gen_op_dmfc0_entrylo0();
- rn = "EntryLo0";
- break;
+ gen_op_dmfc0_entrylo0();
+ rn = "EntryLo0";
+ break;
case 1:
-// gen_op_dmfc0_tcstatus(); /* MT ASE */
- rn = "TCStatus";
-// break;
+// gen_op_dmfc0_tcstatus(); /* MT ASE */
+ rn = "TCStatus";
+// break;
case 2:
-// gen_op_dmfc0_tcbind(); /* MT ASE */
- rn = "TCBind";
-// break;
+// gen_op_dmfc0_tcbind(); /* MT ASE */
+ rn = "TCBind";
+// break;
case 3:
-// gen_op_dmfc0_tcrestart(); /* MT ASE */
- rn = "TCRestart";
-// break;
+// gen_op_dmfc0_tcrestart(); /* MT ASE */
+ rn = "TCRestart";
+// break;
case 4:
-// gen_op_dmfc0_tchalt(); /* MT ASE */
- rn = "TCHalt";
-// break;
+// gen_op_dmfc0_tchalt(); /* MT ASE */
+ rn = "TCHalt";
+// break;
case 5:
-// gen_op_dmfc0_tccontext(); /* MT ASE */
- rn = "TCContext";
-// break;
+// gen_op_dmfc0_tccontext(); /* MT ASE */
+ rn = "TCContext";
+// break;
case 6:
-// gen_op_dmfc0_tcschedule(); /* MT ASE */
- rn = "TCSchedule";
-// break;
+// gen_op_dmfc0_tcschedule(); /* MT ASE */
+ rn = "TCSchedule";
+// break;
case 7:
-// gen_op_dmfc0_tcschefback(); /* MT ASE */
- rn = "TCScheFBack";
-// break;
+// gen_op_dmfc0_tcschefback(); /* MT ASE */
+ rn = "TCScheFBack";
+// break;
default:
goto die;
}
case 3:
switch (sel) {
case 0:
- gen_op_dmfc0_entrylo1();
- rn = "EntryLo1";
- break;
+ gen_op_dmfc0_entrylo1();
+ rn = "EntryLo1";
+ break;
default:
goto die;
}
case 4:
switch (sel) {
case 0:
- gen_op_dmfc0_context();
- rn = "Context";
- break;
+ gen_op_dmfc0_context();
+ rn = "Context";
+ break;
case 1:
-// gen_op_dmfc0_contextconfig(); /* SmartMIPS ASE */
- rn = "ContextConfig";
-// break;
+// gen_op_dmfc0_contextconfig(); /* SmartMIPS ASE */
+ rn = "ContextConfig";
+// break;
default:
goto die;
}
case 5:
switch (sel) {
case 0:
- gen_op_mfc0_pagemask();
- rn = "PageMask";
- break;
+ gen_op_mfc0_pagemask();
+ rn = "PageMask";
+ break;
case 1:
- gen_op_mfc0_pagegrain();
- rn = "PageGrain";
- break;
+ gen_op_mfc0_pagegrain();
+ rn = "PageGrain";
+ break;
default:
goto die;
}
case 6:
switch (sel) {
case 0:
- gen_op_mfc0_wired();
- rn = "Wired";
- break;
+ gen_op_mfc0_wired();
+ rn = "Wired";
+ break;
case 1:
-// gen_op_dmfc0_srsconf0(); /* shadow registers */
- rn = "SRSConf0";
-// break;
+// gen_op_dmfc0_srsconf0(); /* shadow registers */
+ rn = "SRSConf0";
+// break;
case 2:
-// gen_op_dmfc0_srsconf1(); /* shadow registers */
- rn = "SRSConf1";
-// break;
+// gen_op_dmfc0_srsconf1(); /* shadow registers */
+ rn = "SRSConf1";
+// break;
case 3:
-// gen_op_dmfc0_srsconf2(); /* shadow registers */
- rn = "SRSConf2";
-// break;
+// gen_op_dmfc0_srsconf2(); /* shadow registers */
+ rn = "SRSConf2";
+// break;
case 4:
-// gen_op_dmfc0_srsconf3(); /* shadow registers */
- rn = "SRSConf3";
-// break;
+// gen_op_dmfc0_srsconf3(); /* shadow registers */
+ rn = "SRSConf3";
+// break;
case 5:
-// gen_op_dmfc0_srsconf4(); /* shadow registers */
- rn = "SRSConf4";
-// break;
+// gen_op_dmfc0_srsconf4(); /* shadow registers */
+ rn = "SRSConf4";
+// break;
default:
goto die;
}
case 7:
switch (sel) {
case 0:
- gen_op_mfc0_hwrena();
- rn = "HWREna";
- break;
+ gen_op_mfc0_hwrena();
+ rn = "HWREna";
+ break;
default:
goto die;
}
case 8:
switch (sel) {
case 0:
- gen_op_dmfc0_badvaddr();
- rn = "BadVaddr";
- break;
+ gen_op_dmfc0_badvaddr();
+ rn = "BadVaddr";
+ break;
default:
goto die;
}
case 9:
switch (sel) {
case 0:
- gen_op_mfc0_count();
- rn = "Count";
- break;
- /* 6,7 are implementation dependent */
+ gen_op_mfc0_count();
+ rn = "Count";
+ break;
+ /* 6,7 are implementation dependent */
default:
goto die;
}
case 10:
switch (sel) {
case 0:
- gen_op_dmfc0_entryhi();
- rn = "EntryHi";
- break;
+ gen_op_dmfc0_entryhi();
+ rn = "EntryHi";
+ break;
default:
goto die;
}
case 11:
switch (sel) {
case 0:
- gen_op_mfc0_compare();
- rn = "Compare";
- break;
+ gen_op_mfc0_compare();
+ rn = "Compare";
+ break;
/* 6,7 are implementation dependent */
default:
goto die;
case 12:
switch (sel) {
case 0:
- gen_op_mfc0_status();
- rn = "Status";
- break;
+ gen_op_mfc0_status();
+ rn = "Status";
+ break;
case 1:
- gen_op_mfc0_intctl();
- rn = "IntCtl";
- break;
+ gen_op_mfc0_intctl();
+ rn = "IntCtl";
+ break;
case 2:
- gen_op_mfc0_srsctl();
- rn = "SRSCtl";
- break;
+ gen_op_mfc0_srsctl();
+ rn = "SRSCtl";
+ break;
case 3:
- gen_op_mfc0_srsmap(); /* shadow registers */
- rn = "SRSMap";
- break;
+ gen_op_mfc0_srsmap(); /* shadow registers */
+ rn = "SRSMap";
+ break;
default:
goto die;
}
case 13:
switch (sel) {
case 0:
- gen_op_mfc0_cause();
- rn = "Cause";
- break;
+ gen_op_mfc0_cause();
+ rn = "Cause";
+ break;
default:
goto die;
}
case 14:
switch (sel) {
case 0:
- gen_op_dmfc0_epc();
- rn = "EPC";
- break;
+ gen_op_dmfc0_epc();
+ rn = "EPC";
+ break;
default:
goto die;
}
case 15:
switch (sel) {
case 0:
- gen_op_mfc0_prid();
- rn = "PRid";
- break;
+ gen_op_mfc0_prid();
+ rn = "PRid";
+ break;
case 1:
- gen_op_mfc0_ebase();
- rn = "EBase";
- break;
+ gen_op_mfc0_ebase();
+ rn = "EBase";
+ break;
default:
goto die;
}
case 16:
switch (sel) {
case 0:
- gen_op_mfc0_config0();
+ gen_op_mfc0_config0();
rn = "Config";
break;
case 1:
- gen_op_mfc0_config1();
+ gen_op_mfc0_config1();
rn = "Config1";
break;
case 2:
- gen_op_mfc0_config2();
+ gen_op_mfc0_config2();
rn = "Config2";
break;
case 3:
- gen_op_mfc0_config3();
+ gen_op_mfc0_config3();
rn = "Config3";
break;
/* 6,7 are implementation dependent */
case 17:
switch (sel) {
case 0:
- gen_op_dmfc0_lladdr();
- rn = "LLAddr";
- break;
+ gen_op_dmfc0_lladdr();
+ rn = "LLAddr";
+ break;
default:
goto die;
}
case 18:
switch (sel) {
case 0:
- gen_op_dmfc0_watchlo0();
- rn = "WatchLo";
- break;
+ gen_op_dmfc0_watchlo0();
+ rn = "WatchLo";
+ break;
case 1:
-// gen_op_dmfc0_watchlo1();
- rn = "WatchLo1";
-// break;
+// gen_op_dmfc0_watchlo1();
+ rn = "WatchLo1";
+// break;
case 2:
-// gen_op_dmfc0_watchlo2();
- rn = "WatchLo2";
-// break;
+// gen_op_dmfc0_watchlo2();
+ rn = "WatchLo2";
+// break;
case 3:
-// gen_op_dmfc0_watchlo3();
- rn = "WatchLo3";
-// break;
+// gen_op_dmfc0_watchlo3();
+ rn = "WatchLo3";
+// break;
case 4:
-// gen_op_dmfc0_watchlo4();
- rn = "WatchLo4";
-// break;
+// gen_op_dmfc0_watchlo4();
+ rn = "WatchLo4";
+// break;
case 5:
-// gen_op_dmfc0_watchlo5();
- rn = "WatchLo5";
-// break;
+// gen_op_dmfc0_watchlo5();
+ rn = "WatchLo5";
+// break;
case 6:
-// gen_op_dmfc0_watchlo6();
- rn = "WatchLo6";
-// break;
+// gen_op_dmfc0_watchlo6();
+ rn = "WatchLo6";
+// break;
case 7:
-// gen_op_dmfc0_watchlo7();
- rn = "WatchLo7";
-// break;
+// gen_op_dmfc0_watchlo7();
+ rn = "WatchLo7";
+// break;
default:
goto die;
}
case 19:
switch (sel) {
case 0:
- gen_op_mfc0_watchhi0();
- rn = "WatchHi";
- break;
+ gen_op_mfc0_watchhi0();
+ rn = "WatchHi";
+ break;
case 1:
-// gen_op_mfc0_watchhi1();
- rn = "WatchHi1";
-// break;
+// gen_op_mfc0_watchhi1();
+ rn = "WatchHi1";
+// break;
case 2:
-// gen_op_mfc0_watchhi2();
- rn = "WatchHi2";
-// break;
+// gen_op_mfc0_watchhi2();
+ rn = "WatchHi2";
+// break;
case 3:
-// gen_op_mfc0_watchhi3();
- rn = "WatchHi3";
-// break;
+// gen_op_mfc0_watchhi3();
+ rn = "WatchHi3";
+// break;
case 4:
-// gen_op_mfc0_watchhi4();
- rn = "WatchHi4";
-// break;
+// gen_op_mfc0_watchhi4();
+ rn = "WatchHi4";
+// break;
case 5:
-// gen_op_mfc0_watchhi5();
- rn = "WatchHi5";
-// break;
+// gen_op_mfc0_watchhi5();
+ rn = "WatchHi5";
+// break;
case 6:
-// gen_op_mfc0_watchhi6();
- rn = "WatchHi6";
-// break;
+// gen_op_mfc0_watchhi6();
+ rn = "WatchHi6";
+// break;
case 7:
-// gen_op_mfc0_watchhi7();
- rn = "WatchHi7";
-// break;
+// gen_op_mfc0_watchhi7();
+ rn = "WatchHi7";
+// break;
default:
goto die;
}
case 20:
switch (sel) {
case 0:
- /* 64 bit MMU only */
- gen_op_dmfc0_xcontext();
- rn = "XContext";
- break;
+ /* 64 bit MMU only */
+ gen_op_dmfc0_xcontext();
+ rn = "XContext";
+ break;
default:
goto die;
}
/* Officially reserved, but sel 0 is used for R1x000 framemask */
switch (sel) {
case 0:
- gen_op_mfc0_framemask();
- rn = "Framemask";
- break;
+ gen_op_mfc0_framemask();
+ rn = "Framemask";
+ break;
default:
goto die;
}
break;
case 22:
- /* ignored */
- rn = "'Diagnostic"; /* implementation dependent */
- break;
+ /* ignored */
+ rn = "'Diagnostic"; /* implementation dependent */
+ break;
case 23:
switch (sel) {
case 0:
- gen_op_mfc0_debug(); /* EJTAG support */
- rn = "Debug";
- break;
+ gen_op_mfc0_debug(); /* EJTAG support */
+ rn = "Debug";
+ break;
case 1:
-// gen_op_dmfc0_tracecontrol(); /* PDtrace support */
- rn = "TraceControl";
-// break;
+// gen_op_dmfc0_tracecontrol(); /* PDtrace support */
+ rn = "TraceControl";
+// break;
case 2:
-// gen_op_dmfc0_tracecontrol2(); /* PDtrace support */
- rn = "TraceControl2";
-// break;
+// gen_op_dmfc0_tracecontrol2(); /* PDtrace support */
+ rn = "TraceControl2";
+// break;
case 3:
-// gen_op_dmfc0_usertracedata(); /* PDtrace support */
- rn = "UserTraceData";
-// break;
+// gen_op_dmfc0_usertracedata(); /* PDtrace support */
+ rn = "UserTraceData";
+// break;
case 4:
-// gen_op_dmfc0_debug(); /* PDtrace support */
- rn = "TraceBPC";
-// break;
+// gen_op_dmfc0_debug(); /* PDtrace support */
+ rn = "TraceBPC";
+// break;
default:
goto die;
}
case 24:
switch (sel) {
case 0:
- gen_op_dmfc0_depc(); /* EJTAG support */
- rn = "DEPC";
- break;
+ gen_op_dmfc0_depc(); /* EJTAG support */
+ rn = "DEPC";
+ break;
default:
goto die;
}
case 25:
switch (sel) {
case 0:
- gen_op_mfc0_performance0();
- rn = "Performance0";
+ gen_op_mfc0_performance0();
+ rn = "Performance0";
break;
case 1:
-// gen_op_dmfc0_performance1();
- rn = "Performance1";
-// break;
+// gen_op_dmfc0_performance1();
+ rn = "Performance1";
+// break;
case 2:
-// gen_op_dmfc0_performance2();
- rn = "Performance2";
-// break;
+// gen_op_dmfc0_performance2();
+ rn = "Performance2";
+// break;
case 3:
-// gen_op_dmfc0_performance3();
- rn = "Performance3";
-// break;
+// gen_op_dmfc0_performance3();
+ rn = "Performance3";
+// break;
case 4:
-// gen_op_dmfc0_performance4();
- rn = "Performance4";
-// break;
+// gen_op_dmfc0_performance4();
+ rn = "Performance4";
+// break;
case 5:
-// gen_op_dmfc0_performance5();
- rn = "Performance5";
-// break;
+// gen_op_dmfc0_performance5();
+ rn = "Performance5";
+// break;
case 6:
-// gen_op_dmfc0_performance6();
- rn = "Performance6";
-// break;
+// gen_op_dmfc0_performance6();
+ rn = "Performance6";
+// break;
case 7:
-// gen_op_dmfc0_performance7();
- rn = "Performance7";
-// break;
+// gen_op_dmfc0_performance7();
+ rn = "Performance7";
+// break;
default:
goto die;
}
switch (sel) {
/* ignored */
case 0 ... 3:
- rn = "CacheErr";
- break;
+ rn = "CacheErr";
+ break;
default:
goto die;
}
case 30:
switch (sel) {
case 0:
- gen_op_dmfc0_errorepc();
- rn = "ErrorEPC";
- break;
+ gen_op_dmfc0_errorepc();
+ rn = "ErrorEPC";
+ break;
default:
goto die;
}
case 31:
switch (sel) {
case 0:
- gen_op_mfc0_desave(); /* EJTAG support */
- rn = "DESAVE";
- break;
+ gen_op_mfc0_desave(); /* EJTAG support */
+ rn = "DESAVE";
+ break;
default:
goto die;
}
rn = "Index";
break;
case 1:
-// gen_op_dmtc0_mvpcontrol(); /* MT ASE */
+// gen_op_dmtc0_mvpcontrol(); /* MT ASE */
rn = "MVPControl";
-// break;
+// break;
case 2:
-// gen_op_dmtc0_mvpconf0(); /* MT ASE */
+// gen_op_dmtc0_mvpconf0(); /* MT ASE */
rn = "MVPConf0";
-// break;
+// break;
case 3:
-// gen_op_dmtc0_mvpconf1(); /* MT ASE */
+// gen_op_dmtc0_mvpconf1(); /* MT ASE */
rn = "MVPConf1";
-// break;
+// break;
default:
goto die;
}
case 1:
switch (sel) {
case 0:
- /* ignored */
+ /* ignored */
rn = "Random";
- break;
+ break;
case 1:
-// gen_op_dmtc0_vpecontrol(); /* MT ASE */
+// gen_op_dmtc0_vpecontrol(); /* MT ASE */
rn = "VPEControl";
-// break;
+// break;
case 2:
-// gen_op_dmtc0_vpeconf0(); /* MT ASE */
+// gen_op_dmtc0_vpeconf0(); /* MT ASE */
rn = "VPEConf0";
-// break;
+// break;
case 3:
-// gen_op_dmtc0_vpeconf1(); /* MT ASE */
+// gen_op_dmtc0_vpeconf1(); /* MT ASE */
rn = "VPEConf1";
-// break;
+// break;
case 4:
-// gen_op_dmtc0_YQMask(); /* MT ASE */
+// gen_op_dmtc0_YQMask(); /* MT ASE */
rn = "YQMask";
-// break;
+// break;
case 5:
-// gen_op_dmtc0_vpeschedule(); /* MT ASE */
+// gen_op_dmtc0_vpeschedule(); /* MT ASE */
rn = "VPESchedule";
-// break;
+// break;
case 6:
-// gen_op_dmtc0_vpeschefback(); /* MT ASE */
+// gen_op_dmtc0_vpeschefback(); /* MT ASE */
rn = "VPEScheFBack";
-// break;
+// break;
case 7:
-// gen_op_dmtc0_vpeopt(); /* MT ASE */
+// gen_op_dmtc0_vpeopt(); /* MT ASE */
rn = "VPEOpt";
-// break;
+// break;
default:
goto die;
}
case 2:
switch (sel) {
case 0:
- gen_op_dmtc0_entrylo0();
- rn = "EntryLo0";
- break;
+ gen_op_dmtc0_entrylo0();
+ rn = "EntryLo0";
+ break;
case 1:
-// gen_op_dmtc0_tcstatus(); /* MT ASE */
- rn = "TCStatus";
-// break;
+// gen_op_dmtc0_tcstatus(); /* MT ASE */
+ rn = "TCStatus";
+// break;
case 2:
-// gen_op_dmtc0_tcbind(); /* MT ASE */
- rn = "TCBind";
-// break;
+// gen_op_dmtc0_tcbind(); /* MT ASE */
+ rn = "TCBind";
+// break;
case 3:
-// gen_op_dmtc0_tcrestart(); /* MT ASE */
- rn = "TCRestart";
-// break;
+// gen_op_dmtc0_tcrestart(); /* MT ASE */
+ rn = "TCRestart";
+// break;
case 4:
-// gen_op_dmtc0_tchalt(); /* MT ASE */
- rn = "TCHalt";
-// break;
+// gen_op_dmtc0_tchalt(); /* MT ASE */
+ rn = "TCHalt";
+// break;
case 5:
-// gen_op_dmtc0_tccontext(); /* MT ASE */
- rn = "TCContext";
-// break;
+// gen_op_dmtc0_tccontext(); /* MT ASE */
+ rn = "TCContext";
+// break;
case 6:
-// gen_op_dmtc0_tcschedule(); /* MT ASE */
- rn = "TCSchedule";
-// break;
+// gen_op_dmtc0_tcschedule(); /* MT ASE */
+ rn = "TCSchedule";
+// break;
case 7:
-// gen_op_dmtc0_tcschefback(); /* MT ASE */
- rn = "TCScheFBack";
-// break;
+// gen_op_dmtc0_tcschefback(); /* MT ASE */
+ rn = "TCScheFBack";
+// break;
default:
goto die;
}
case 3:
switch (sel) {
case 0:
- gen_op_dmtc0_entrylo1();
- rn = "EntryLo1";
- break;
+ gen_op_dmtc0_entrylo1();
+ rn = "EntryLo1";
+ break;
default:
goto die;
}
case 4:
switch (sel) {
case 0:
- gen_op_dmtc0_context();
- rn = "Context";
- break;
+ gen_op_dmtc0_context();
+ rn = "Context";
+ break;
case 1:
-// gen_op_dmtc0_contextconfig(); /* SmartMIPS ASE */
- rn = "ContextConfig";
-// break;
+// gen_op_dmtc0_contextconfig(); /* SmartMIPS ASE */
+ rn = "ContextConfig";
+// break;
default:
goto die;
}
case 5:
switch (sel) {
case 0:
- gen_op_mtc0_pagemask();
- rn = "PageMask";
- break;
+ gen_op_mtc0_pagemask();
+ rn = "PageMask";
+ break;
case 1:
- gen_op_mtc0_pagegrain();
- rn = "PageGrain";
- break;
+ gen_op_mtc0_pagegrain();
+ rn = "PageGrain";
+ break;
default:
goto die;
}
case 6:
switch (sel) {
case 0:
- gen_op_mtc0_wired();
- rn = "Wired";
- break;
+ gen_op_mtc0_wired();
+ rn = "Wired";
+ break;
case 1:
-// gen_op_dmtc0_srsconf0(); /* shadow registers */
- rn = "SRSConf0";
-// break;
+// gen_op_dmtc0_srsconf0(); /* shadow registers */
+ rn = "SRSConf0";
+// break;
case 2:
-// gen_op_dmtc0_srsconf1(); /* shadow registers */
- rn = "SRSConf1";
-// break;
+// gen_op_dmtc0_srsconf1(); /* shadow registers */
+ rn = "SRSConf1";
+// break;
case 3:
-// gen_op_dmtc0_srsconf2(); /* shadow registers */
- rn = "SRSConf2";
-// break;
+// gen_op_dmtc0_srsconf2(); /* shadow registers */
+ rn = "SRSConf2";
+// break;
case 4:
-// gen_op_dmtc0_srsconf3(); /* shadow registers */
- rn = "SRSConf3";
-// break;
+// gen_op_dmtc0_srsconf3(); /* shadow registers */
+ rn = "SRSConf3";
+// break;
case 5:
-// gen_op_dmtc0_srsconf4(); /* shadow registers */
- rn = "SRSConf4";
-// break;
+// gen_op_dmtc0_srsconf4(); /* shadow registers */
+ rn = "SRSConf4";
+// break;
default:
goto die;
}
case 7:
switch (sel) {
case 0:
- gen_op_mtc0_hwrena();
- rn = "HWREna";
- break;
+ gen_op_mtc0_hwrena();
+ rn = "HWREna";
+ break;
default:
goto die;
}
case 9:
switch (sel) {
case 0:
- gen_op_mtc0_count();
- rn = "Count";
- break;
+ gen_op_mtc0_count();
+ rn = "Count";
+ break;
/* 6,7 are implementation dependent */
default:
goto die;
case 10:
switch (sel) {
case 0:
- gen_op_mtc0_entryhi();
- rn = "EntryHi";
- break;
+ gen_op_mtc0_entryhi();
+ rn = "EntryHi";
+ break;
default:
goto die;
}
case 11:
switch (sel) {
case 0:
- gen_op_mtc0_compare();
- rn = "Compare";
- break;
+ gen_op_mtc0_compare();
+ rn = "Compare";
+ break;
/* 6,7 are implementation dependent */
default:
goto die;
case 12:
switch (sel) {
case 0:
- gen_op_mtc0_status();
- rn = "Status";
- break;
+ gen_op_mtc0_status();
+ rn = "Status";
+ break;
case 1:
- gen_op_mtc0_intctl();
- rn = "IntCtl";
- break;
+ gen_op_mtc0_intctl();
+ rn = "IntCtl";
+ break;
case 2:
- gen_op_mtc0_srsctl();
- rn = "SRSCtl";
- break;
+ gen_op_mtc0_srsctl();
+ rn = "SRSCtl";
+ break;
case 3:
- gen_op_mtc0_srsmap(); /* shadow registers */
- rn = "SRSMap";
- break;
- default:
+ gen_op_mtc0_srsmap(); /* shadow registers */
+ rn = "SRSMap";
+ break;
+ default:
goto die;
}
/* Stop translation as we may have switched the execution mode */
case 13:
switch (sel) {
case 0:
- gen_op_mtc0_cause();
- rn = "Cause";
- break;
+ gen_op_mtc0_cause();
+ rn = "Cause";
+ break;
default:
goto die;
}
case 14:
switch (sel) {
case 0:
- gen_op_dmtc0_epc();
- rn = "EPC";
- break;
+ gen_op_dmtc0_epc();
+ rn = "EPC";
+ break;
default:
goto die;
}
case 15:
switch (sel) {
case 0:
- /* ignored */
- rn = "PRid";
- break;
+ /* ignored */
+ rn = "PRid";
+ break;
case 1:
- gen_op_mtc0_ebase();
- rn = "EBase";
- break;
+ gen_op_mtc0_ebase();
+ rn = "EBase";
+ break;
default:
goto die;
}
case 0:
gen_op_mtc0_config0();
rn = "Config";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 1:
- /* ignored */
+ /* ignored */
rn = "Config1";
break;
case 2:
gen_op_mtc0_config2();
rn = "Config2";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 3:
- /* ignored */
+ /* ignored */
rn = "Config3";
break;
/* 6,7 are implementation dependent */
rn = "Invalid config selector";
goto die;
}
- /* Stop translation as we may have switched the execution mode */
- ctx->bstate = BS_STOP;
break;
case 17:
switch (sel) {
case 0:
- /* ignored */
- rn = "LLAddr";
- break;
+ /* ignored */
+ rn = "LLAddr";
+ break;
default:
goto die;
}
case 18:
switch (sel) {
case 0:
- gen_op_dmtc0_watchlo0();
- rn = "WatchLo";
- break;
+ gen_op_dmtc0_watchlo0();
+ rn = "WatchLo";
+ break;
case 1:
-// gen_op_dmtc0_watchlo1();
- rn = "WatchLo1";
-// break;
+// gen_op_dmtc0_watchlo1();
+ rn = "WatchLo1";
+// break;
case 2:
-// gen_op_dmtc0_watchlo2();
- rn = "WatchLo2";
-// break;
+// gen_op_dmtc0_watchlo2();
+ rn = "WatchLo2";
+// break;
case 3:
-// gen_op_dmtc0_watchlo3();
- rn = "WatchLo3";
-// break;
+// gen_op_dmtc0_watchlo3();
+ rn = "WatchLo3";
+// break;
case 4:
-// gen_op_dmtc0_watchlo4();
- rn = "WatchLo4";
-// break;
+// gen_op_dmtc0_watchlo4();
+ rn = "WatchLo4";
+// break;
case 5:
-// gen_op_dmtc0_watchlo5();
- rn = "WatchLo5";
-// break;
+// gen_op_dmtc0_watchlo5();
+ rn = "WatchLo5";
+// break;
case 6:
-// gen_op_dmtc0_watchlo6();
- rn = "WatchLo6";
-// break;
+// gen_op_dmtc0_watchlo6();
+ rn = "WatchLo6";
+// break;
case 7:
-// gen_op_dmtc0_watchlo7();
- rn = "WatchLo7";
-// break;
+// gen_op_dmtc0_watchlo7();
+ rn = "WatchLo7";
+// break;
default:
goto die;
}
case 19:
switch (sel) {
case 0:
- gen_op_mtc0_watchhi0();
- rn = "WatchHi";
- break;
+ gen_op_mtc0_watchhi0();
+ rn = "WatchHi";
+ break;
case 1:
-// gen_op_dmtc0_watchhi1();
- rn = "WatchHi1";
-// break;
+// gen_op_dmtc0_watchhi1();
+ rn = "WatchHi1";
+// break;
case 2:
-// gen_op_dmtc0_watchhi2();
- rn = "WatchHi2";
-// break;
+// gen_op_dmtc0_watchhi2();
+ rn = "WatchHi2";
+// break;
case 3:
-// gen_op_dmtc0_watchhi3();
- rn = "WatchHi3";
-// break;
+// gen_op_dmtc0_watchhi3();
+ rn = "WatchHi3";
+// break;
case 4:
-// gen_op_dmtc0_watchhi4();
- rn = "WatchHi4";
-// break;
+// gen_op_dmtc0_watchhi4();
+ rn = "WatchHi4";
+// break;
case 5:
-// gen_op_dmtc0_watchhi5();
- rn = "WatchHi5";
-// break;
+// gen_op_dmtc0_watchhi5();
+ rn = "WatchHi5";
+// break;
case 6:
-// gen_op_dmtc0_watchhi6();
- rn = "WatchHi6";
-// break;
+// gen_op_dmtc0_watchhi6();
+ rn = "WatchHi6";
+// break;
case 7:
-// gen_op_dmtc0_watchhi7();
- rn = "WatchHi7";
-// break;
+// gen_op_dmtc0_watchhi7();
+ rn = "WatchHi7";
+// break;
default:
goto die;
}
case 20:
switch (sel) {
case 0:
- /* 64 bit MMU only */
- gen_op_dmtc0_xcontext();
- rn = "XContext";
- break;
+ /* 64 bit MMU only */
+ gen_op_dmtc0_xcontext();
+ rn = "XContext";
+ break;
default:
goto die;
}
/* Officially reserved, but sel 0 is used for R1x000 framemask */
switch (sel) {
case 0:
- gen_op_mtc0_framemask();
- rn = "Framemask";
- break;
+ gen_op_mtc0_framemask();
+ rn = "Framemask";
+ break;
default:
goto die;
}
case 23:
switch (sel) {
case 0:
- gen_op_mtc0_debug(); /* EJTAG support */
- rn = "Debug";
- break;
+ gen_op_mtc0_debug(); /* EJTAG support */
+ rn = "Debug";
+ break;
case 1:
-// gen_op_dmtc0_tracecontrol(); /* PDtrace support */
- rn = "TraceControl";
-// break;
+// gen_op_dmtc0_tracecontrol(); /* PDtrace support */
+ rn = "TraceControl";
+// break;
case 2:
-// gen_op_dmtc0_tracecontrol2(); /* PDtrace support */
- rn = "TraceControl2";
-// break;
+// gen_op_dmtc0_tracecontrol2(); /* PDtrace support */
+ rn = "TraceControl2";
+// break;
case 3:
-// gen_op_dmtc0_usertracedata(); /* PDtrace support */
- rn = "UserTraceData";
-// break;
+// gen_op_dmtc0_usertracedata(); /* PDtrace support */
+ rn = "UserTraceData";
+// break;
case 4:
-// gen_op_dmtc0_debug(); /* PDtrace support */
- rn = "TraceBPC";
-// break;
+// gen_op_dmtc0_debug(); /* PDtrace support */
+ rn = "TraceBPC";
+// break;
default:
goto die;
}
- /* Stop translation as we may have switched the execution mode */
- ctx->bstate = BS_STOP;
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 24:
switch (sel) {
case 0:
- gen_op_dmtc0_depc(); /* EJTAG support */
- rn = "DEPC";
- break;
+ gen_op_dmtc0_depc(); /* EJTAG support */
+ rn = "DEPC";
+ break;
default:
goto die;
}
case 25:
switch (sel) {
case 0:
- gen_op_mtc0_performance0();
- rn = "Performance0";
- break;
+ gen_op_mtc0_performance0();
+ rn = "Performance0";
+ break;
case 1:
-// gen_op_dmtc0_performance1();
- rn = "Performance1";
-// break;
+// gen_op_dmtc0_performance1();
+ rn = "Performance1";
+// break;
case 2:
-// gen_op_dmtc0_performance2();
- rn = "Performance2";
-// break;
+// gen_op_dmtc0_performance2();
+ rn = "Performance2";
+// break;
case 3:
-// gen_op_dmtc0_performance3();
- rn = "Performance3";
-// break;
+// gen_op_dmtc0_performance3();
+ rn = "Performance3";
+// break;
case 4:
-// gen_op_dmtc0_performance4();
- rn = "Performance4";
-// break;
+// gen_op_dmtc0_performance4();
+ rn = "Performance4";
+// break;
case 5:
-// gen_op_dmtc0_performance5();
- rn = "Performance5";
-// break;
+// gen_op_dmtc0_performance5();
+ rn = "Performance5";
+// break;
case 6:
-// gen_op_dmtc0_performance6();
- rn = "Performance6";
-// break;
+// gen_op_dmtc0_performance6();
+ rn = "Performance6";
+// break;
case 7:
-// gen_op_dmtc0_performance7();
- rn = "Performance7";
-// break;
+// gen_op_dmtc0_performance7();
+ rn = "Performance7";
+// break;
default:
goto die;
}
case 27:
switch (sel) {
case 0 ... 3:
- /* ignored */
- rn = "CacheErr";
- break;
+ /* ignored */
+ rn = "CacheErr";
+ break;
default:
goto die;
}
case 3:
case 5:
case 7:
- gen_op_mtc0_datalo();
+ gen_op_mtc0_datalo();
rn = "DataLo";
break;
default:
case 3:
case 5:
case 7:
- gen_op_mtc0_datahi();
+ gen_op_mtc0_datahi();
rn = "DataHi";
break;
default:
case 30:
switch (sel) {
case 0:
- gen_op_dmtc0_errorepc();
- rn = "ErrorEPC";
- break;
+ gen_op_dmtc0_errorepc();
+ rn = "ErrorEPC";
+ break;
default:
goto die;
}
case 31:
switch (sel) {
case 0:
- gen_op_mtc0_desave(); /* EJTAG support */
- rn = "DESAVE";
- break;
+ gen_op_mtc0_desave(); /* EJTAG support */
+ rn = "DESAVE";
+ break;
default:
goto die;
}
break;
case OPC_SYSCALL:
generate_exception(ctx, EXCP_SYSCALL);
- ctx->bstate = BS_EXCP;
break;
case OPC_BREAK:
generate_exception(ctx, EXCP_BREAK);
projects / qemu / commitdiff