X-Git-Url: http://vcs.maemo.org/git/?a=blobdiff_plain;f=target-ppc%2Fhelper.c;h=55fe2b22419b6583a744d2d4222ad9a8762475fa;hb=6d463de2b3e261e95f224767605eef02acbd2701;hp=e8b776b0755b8b3ea0a6998e204ba332370bfc38;hpb=9fddaa0c0cabb610947146a79b4a9a38b0a216e5;p=qemu diff --git a/target-ppc/helper.c b/target-ppc/helper.c index e8b776b..55fe2b2 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -27,11 +27,6 @@ //#define DEBUG_BATS //#define DEBUG_EXCEPTIONS -extern FILE *stdout, *stderr; -void abort (void); - -/*****************************************************************************/ - /*****************************************************************************/ /* PPC MMU emulation */ int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, @@ -360,12 +355,13 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, uint32_t address, int rw, int access_type) { int ret; - +#if 0 if (loglevel > 0) { fprintf(logfile, "%s\n", __func__); } - - if ((access_type == ACCESS_CODE && msr_ir == 0) || msr_dr == 0) { +#endif + if ((access_type == ACCESS_CODE && msr_ir == 0) || + (access_type != ACCESS_CODE && msr_dr == 0)) { /* No address translation */ *physical = address & ~0xFFF; *prot = PAGE_READ | PAGE_WRITE; @@ -378,11 +374,12 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, ret = get_segment(env, physical, prot, address, rw, access_type); } } +#if 0 if (loglevel > 0) { fprintf(logfile, "%s address %08x => %08x\n", __func__, address, *physical); } - +#endif return ret; } @@ -442,11 +439,14 @@ void tlb_fill(unsigned long addr, int is_write, int is_user, void *retaddr) tlb_addrr = env->tlb_read[is_user][index].address; tlb_addrw = env->tlb_write[is_user][index].address; #if 0 - printf("%s 1 %p %p idx=%d addr=0x%08lx tbl_addr=0x%08lx 0x%08lx " + if (loglevel) { + fprintf(logfile, + "%s 1 %p %p idx=%d addr=0x%08lx tbl_addr=0x%08lx 0x%08lx " "(0x%08lx 0x%08lx)\n", __func__, env, &env->tlb_read[is_user][index], index, addr, tlb_addrr, tlb_addrw, addr & TARGET_PAGE_MASK, tlb_addrr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)); + } #endif } ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1); @@ -631,11 +631,14 @@ uint32_t _load_msr (CPUState *env) void _store_msr (CPUState *env, uint32_t value) { +#if 0 // TRY if (((value >> MSR_IR) & 0x01) != msr_ir || - ((value >> MSR_DR) & 0x01) != msr_dr) { + ((value >> MSR_DR) & 0x01) != msr_dr) + { /* Flush all tlb when changing translation mode or privilege level */ tlb_flush(env, 1); } +#endif msr_pow = (value >> MSR_POW) & 0x03; msr_ile = (value >> MSR_ILE) & 0x01; msr_ee = (value >> MSR_EE) & 0x01; @@ -699,13 +702,8 @@ void do_interrupt (CPUState *env) goto store_next; case EXCP_MACHINE_CHECK: if (msr_me == 0) { - printf("Machine check exception while not allowed !\n"); - if (loglevel) { - fprintf(logfile, - "Machine check exception while not allowed !\n"); + cpu_abort(env, "Machine check exception while not allowed\n"); } - abort(); - } msr_me = 0; break; case EXCP_DSI: @@ -801,7 +799,7 @@ void do_interrupt (CPUState *env) env->fpscr[7] |= 0x4; break; case EXCP_INVAL: - printf("Invalid instruction at 0x%08x\n", env->nip); + // printf("Invalid instruction at 0x%08x\n", env->nip); msr |= 0x00080000; break; case EXCP_PRIV: