X-Git-Url: http://vcs.maemo.org/git/?a=blobdiff_plain;f=softmmu_template.h;h=1c12c4241134ddffb914ac5420c6aaf8279d26d1;hb=fedc54adaa4c36da28a726a1f56e1db53f699a50;hp=2d3db62f684227a0e1e7edd69e077aeb190cb3fb;hpb=6986f88c3f9694752b254f5d7ac92d7e6def635a;p=qemu diff --git a/softmmu_template.h b/softmmu_template.h index 2d3db62..1c12c42 100644 --- a/softmmu_template.h +++ b/softmmu_template.h @@ -39,115 +39,116 @@ #error unsupported data size #endif -static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr, +#ifdef SOFTMMU_CODE_ACCESS +#define READ_ACCESS_TYPE 2 +#define ADDR_READ addr_code +#else +#define READ_ACCESS_TYPE 0 +#define ADDR_READ addr_read +#endif + +static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, int is_user, void *retaddr); -static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, - DATA_TYPE val, - int is_user, - void *retaddr); - -static inline DATA_TYPE glue(io_read, SUFFIX)(unsigned long physaddr, - unsigned long tlb_addr) +static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, + target_ulong tlb_addr) { DATA_TYPE res; int index; index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); #if SHIFT <= 2 - res = io_mem_read[index][SHIFT](physaddr); + res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); #else #ifdef TARGET_WORDS_BIGENDIAN - res = (uint64_t)io_mem_read[index][2](physaddr) << 32; - res |= io_mem_read[index][2](physaddr + 4); + res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; + res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); #else - res = io_mem_read[index][2](physaddr); - res |= (uint64_t)io_mem_read[index][2](physaddr + 4) << 32; + res = io_mem_read[index][2](io_mem_opaque[index], physaddr); + res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; #endif #endif /* SHIFT > 2 */ - return res; -} - -static inline void glue(io_write, SUFFIX)(unsigned long physaddr, - DATA_TYPE val, - unsigned long tlb_addr) -{ - int index; - - index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); -#if SHIFT <= 2 - io_mem_write[index][SHIFT](physaddr, val); -#else -#ifdef TARGET_WORDS_BIGENDIAN - io_mem_write[index][2](physaddr, val >> 32); - io_mem_write[index][2](physaddr + 4, val); -#else - io_mem_write[index][2](physaddr, val); - io_mem_write[index][2](physaddr + 4, val >> 32); +#ifdef USE_KQEMU + env->last_io_time = cpu_get_time_fast(); #endif -#endif /* SHIFT > 2 */ + return res; } /* handle all cases except unaligned access which span two pages */ -DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(unsigned long addr, +DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, int is_user) { DATA_TYPE res; int index; - unsigned long physaddr, tlb_addr; + target_ulong tlb_addr; + target_phys_addr_t physaddr; void *retaddr; /* test if there is match for unaligned or IO access */ /* XXX: could done more in memory macro in a non portable way */ index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: - tlb_addr = env->tlb_read[is_user][index].address; + tlb_addr = env->tlb_table[is_user][index].ADDR_READ; if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { - physaddr = addr + env->tlb_read[is_user][index].addend; + physaddr = addr + env->tlb_table[is_user][index].addend; if (tlb_addr & ~TARGET_PAGE_MASK) { /* IO access */ if ((addr & (DATA_SIZE - 1)) != 0) goto do_unaligned_access; res = glue(io_read, SUFFIX)(physaddr, tlb_addr); - } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { + } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { /* slow unaligned access (it spans two pages or IO) */ do_unaligned_access: retaddr = GETPC(); +#ifdef ALIGNED_ONLY + do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr); +#endif res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, is_user, retaddr); } else { - /* unaligned access in the same page */ - res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); + /* unaligned/aligned access in the same page */ +#ifdef ALIGNED_ONLY + if ((addr & (DATA_SIZE - 1)) != 0) { + retaddr = GETPC(); + do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr); + } +#endif + res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr); } } else { /* the page is not in the TLB : fill it */ retaddr = GETPC(); - tlb_fill(addr, 0, is_user, retaddr); +#ifdef ALIGNED_ONLY + if ((addr & (DATA_SIZE - 1)) != 0) + do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr); +#endif + tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr); goto redo; } return res; } /* handle all unaligned cases */ -static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr, +static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, int is_user, void *retaddr) { DATA_TYPE res, res1, res2; int index, shift; - unsigned long physaddr, tlb_addr, addr1, addr2; + target_phys_addr_t physaddr; + target_ulong tlb_addr, addr1, addr2; index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: - tlb_addr = env->tlb_read[is_user][index].address; + tlb_addr = env->tlb_table[is_user][index].ADDR_READ; if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { - physaddr = addr + env->tlb_read[is_user][index].addend; + physaddr = addr + env->tlb_table[is_user][index].addend; if (tlb_addr & ~TARGET_PAGE_MASK) { /* IO access */ if ((addr & (DATA_SIZE - 1)) != 0) goto do_unaligned_access; res = glue(io_read, SUFFIX)(physaddr, tlb_addr); - } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { + } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { do_unaligned_access: /* slow unaligned access (it spans two pages) */ addr1 = addr & ~(DATA_SIZE - 1); @@ -165,72 +166,120 @@ static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr, res = (DATA_TYPE)res; } else { /* unaligned/aligned access in the same page */ - res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); + res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr); } } else { /* the page is not in the TLB : fill it */ - tlb_fill(addr, 0, is_user, retaddr); + tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr); goto redo; } return res; } +#ifndef SOFTMMU_CODE_ACCESS -void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(unsigned long addr, +static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, + DATA_TYPE val, + int is_user, + void *retaddr); + +static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, + DATA_TYPE val, + target_ulong tlb_addr, + void *retaddr) +{ + int index; + + index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); + env->mem_write_vaddr = tlb_addr; + env->mem_write_pc = (unsigned long)retaddr; +#if SHIFT <= 2 + io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); +#else +#ifdef TARGET_WORDS_BIGENDIAN + io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); + io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); +#else + io_mem_write[index][2](io_mem_opaque[index], physaddr, val); + io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); +#endif +#endif /* SHIFT > 2 */ +#ifdef USE_KQEMU + env->last_io_time = cpu_get_time_fast(); +#endif +} + +void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE val, int is_user) { - unsigned long physaddr, tlb_addr; + target_phys_addr_t physaddr; + target_ulong tlb_addr; void *retaddr; int index; index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: - tlb_addr = env->tlb_write[is_user][index].address; + tlb_addr = env->tlb_table[is_user][index].addr_write; if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { - physaddr = addr + env->tlb_write[is_user][index].addend; + physaddr = addr + env->tlb_table[is_user][index].addend; if (tlb_addr & ~TARGET_PAGE_MASK) { /* IO access */ if ((addr & (DATA_SIZE - 1)) != 0) goto do_unaligned_access; - glue(io_write, SUFFIX)(physaddr, val, tlb_addr); - } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { + retaddr = GETPC(); + glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr); + } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { do_unaligned_access: retaddr = GETPC(); +#ifdef ALIGNED_ONLY + do_unaligned_access(addr, 1, is_user, retaddr); +#endif glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, is_user, retaddr); } else { /* aligned/unaligned access in the same page */ - glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val); +#ifdef ALIGNED_ONLY + if ((addr & (DATA_SIZE - 1)) != 0) { + retaddr = GETPC(); + do_unaligned_access(addr, 1, is_user, retaddr); + } +#endif + glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val); } } else { /* the page is not in the TLB : fill it */ retaddr = GETPC(); +#ifdef ALIGNED_ONLY + if ((addr & (DATA_SIZE - 1)) != 0) + do_unaligned_access(addr, 1, is_user, retaddr); +#endif tlb_fill(addr, 1, is_user, retaddr); goto redo; } } /* handles all unaligned cases */ -static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, +static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE val, int is_user, void *retaddr) { - unsigned long physaddr, tlb_addr; + target_phys_addr_t physaddr; + target_ulong tlb_addr; int index, i; index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); redo: - tlb_addr = env->tlb_write[is_user][index].address; + tlb_addr = env->tlb_table[is_user][index].addr_write; if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { - physaddr = addr + env->tlb_write[is_user][index].addend; + physaddr = addr + env->tlb_table[is_user][index].addend; if (tlb_addr & ~TARGET_PAGE_MASK) { /* IO access */ if ((addr & (DATA_SIZE - 1)) != 0) goto do_unaligned_access; - glue(io_write, SUFFIX)(physaddr, val, tlb_addr); - } else if (((addr & 0xfff) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { + glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr); + } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { do_unaligned_access: /* XXX: not efficient, but simple */ for(i = 0;i < DATA_SIZE; i++) { @@ -244,7 +293,7 @@ static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, } } else { /* aligned/unaligned access in the same page */ - glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, val); + glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val); } } else { /* the page is not in the TLB : fill it */ @@ -253,8 +302,12 @@ static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr, } } +#endif /* !defined(SOFTMMU_CODE_ACCESS) */ + +#undef READ_ACCESS_TYPE #undef SHIFT #undef DATA_TYPE #undef SUFFIX #undef USUFFIX #undef DATA_SIZE +#undef ADDR_READ