X-Git-Url: http://vcs.maemo.org/git/?a=blobdiff_plain;f=monitor.c;h=3c0fd916fa0257cbac05f30d62d4ca8be0012cc3;hb=7ef4da1c3a753888e2678388150f1b846b025168;hp=89285c1a57c9921af5f115886f076dddfb1968d6;hpb=7e2515e87c41e2e658aaed466e11cbdf1ea8bcb1;p=qemu diff --git a/monitor.c b/monitor.c index 89285c1..3c0fd91 100644 --- a/monitor.c +++ b/monitor.c @@ -38,7 +38,8 @@ * 'F' filename * 'B' block device name * 's' string (accept optional quote) - * 'i' integer + * 'i' 32 bit integer + * 'l' target long (32 or 64 bit) * '/' optional gdb-like print format (like "/10x") * * '?' optional type (for 'F', 's' and 'i') @@ -63,6 +64,8 @@ static int term_outbuf_index; static void monitor_start_input(void); +CPUState *mon_cpu = NULL; + void term_flush(void) { if (term_outbuf_index > 0) { @@ -101,6 +104,15 @@ void term_printf(const char *fmt, ...) va_end(ap); } +static int monitor_fprintf(FILE *stream, const char *fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + term_vprintf(fmt, ap); + va_end(ap); + return 0; +} + static int compare_cmd(const char *name, const char *list) { const char *p, *pstart; @@ -181,35 +193,90 @@ static void do_info(const char *item) cmd->handler(); } -static void do_info_network(void) +static void do_info_version(void) { - int i, j; - NetDriverState *nd; - - for(i = 0; i < nb_nics; i++) { - nd = &nd_table[i]; - term_printf("%d: ifname=%s macaddr=", i, nd->ifname); - for(j = 0; j < 6; j++) { - if (j > 0) - term_printf(":"); - term_printf("%02x", nd->macaddr[j]); - } - term_printf("\n"); - } + term_printf("%s\n", QEMU_VERSION); } - + static void do_info_block(void) { bdrv_info(); } +/* get the current CPU defined by the user */ +int mon_set_cpu(int cpu_index) +{ + CPUState *env; + + for(env = first_cpu; env != NULL; env = env->next_cpu) { + if (env->cpu_index == cpu_index) { + mon_cpu = env; + return 0; + } + } + return -1; +} + +CPUState *mon_get_cpu(void) +{ + if (!mon_cpu) { + mon_set_cpu(0); + } + return mon_cpu; +} + static void do_info_registers(void) { + CPUState *env; + env = mon_get_cpu(); + if (!env) + return; #ifdef TARGET_I386 - cpu_dump_state(cpu_single_env, stdout, X86_DUMP_FPU | X86_DUMP_CCOP); + cpu_dump_state(env, NULL, monitor_fprintf, + X86_DUMP_FPU); #else - cpu_dump_state(cpu_single_env, stdout, 0); + cpu_dump_state(env, NULL, monitor_fprintf, + 0); +#endif +} + +static void do_info_cpus(void) +{ + CPUState *env; + + /* just to set the default cpu if not already done */ + mon_get_cpu(); + + for(env = first_cpu; env != NULL; env = env->next_cpu) { + term_printf("%c CPU #%d:", + (env == mon_cpu) ? '*' : ' ', + env->cpu_index); +#if defined(TARGET_I386) + term_printf(" pc=0x" TARGET_FMT_lx, env->eip + env->segs[R_CS].base); + if (env->hflags & HF_HALTED_MASK) + term_printf(" (halted)"); +#elif defined(TARGET_PPC) + term_printf(" nip=0x" TARGET_FMT_lx, env->nip); + if (env->halted) + term_printf(" (halted)"); +#elif defined(TARGET_SPARC) + term_printf(" pc=0x" TARGET_FMT_lx " npc=0x" TARGET_FMT_lx, env->pc, env->npc); + if (env->halted) + term_printf(" (halted)"); #endif + term_printf("\n"); + } +} + +static void do_cpu_set(int index) +{ + if (mon_set_cpu(index) < 0) + term_printf("Invalid CPU index\n"); +} + +static void do_info_jit(void) +{ + dump_exec_info(NULL, monitor_fprintf); } static void do_info_history (void) @@ -223,6 +290,7 @@ static void do_info_history (void) if (!str) break; term_printf("%d: '%s'\n", i, str); + i++; } } @@ -288,7 +356,7 @@ static void do_change(const char *device, const char *filename) static void do_screen_dump(const char *filename) { - vga_screen_dump(filename); + vga_hw_screen_dump(filename); } static void do_log(const char *items) @@ -372,6 +440,7 @@ static void term_printc(int c) static void memory_dump(int count, int format, int wsize, target_ulong addr, int is_physical) { + CPUState *env; int nb_per_line, l, line_size, i, max_digits, len; uint8_t buf[16]; uint64_t v; @@ -379,6 +448,9 @@ static void memory_dump(int count, int format, int wsize, if (format == 'i') { int flags; flags = 0; + env = mon_get_cpu(); + if (!env && !is_physical) + return; #ifdef TARGET_I386 if (wsize == 2) { flags = 1; @@ -387,11 +459,19 @@ static void memory_dump(int count, int format, int wsize, } else { /* as default we use the current CS size */ flags = 0; - if (!(cpu_single_env->segs[R_CS].flags & DESC_B_MASK)) - flags = 1; + if (env) { +#ifdef TARGET_X86_64 + if ((env->efer & MSR_EFER_LMA) && + (env->segs[R_CS].flags & DESC_L_MASK)) + flags = 2; + else +#endif + if (!(env->segs[R_CS].flags & DESC_B_MASK)) + flags = 1; + } } #endif - monitor_disas(addr, count, is_physical, flags); + monitor_disas(env, addr, count, is_physical, flags); return; } @@ -421,14 +501,17 @@ static void memory_dump(int count, int format, int wsize, } while (len > 0) { - term_printf("0x%08x:", addr); + term_printf(TARGET_FMT_lx ":", addr); l = len; if (l > line_size) l = line_size; if (is_physical) { cpu_physical_memory_rw(addr, buf, l, 0); } else { - cpu_memory_rw_debug(cpu_single_env, addr, buf, l, 0); + env = mon_get_cpu(); + if (!env) + break; + cpu_memory_rw_debug(env, addr, buf, l, 0); } i = 0; while (i < l) { @@ -441,7 +524,7 @@ static void memory_dump(int count, int format, int wsize, v = lduw_raw(buf + i); break; case 4: - v = ldl_raw(buf + i); + v = (uint32_t)ldl_raw(buf + i); break; case 8: v = ldq_raw(buf + i); @@ -473,18 +556,31 @@ static void memory_dump(int count, int format, int wsize, } } -static void do_memory_dump(int count, int format, int size, int addr) +#if TARGET_LONG_BITS == 64 +#define GET_TLONG(h, l) (((uint64_t)(h) << 32) | (l)) +#else +#define GET_TLONG(h, l) (l) +#endif + +static void do_memory_dump(int count, int format, int size, + uint32_t addrh, uint32_t addrl) { + target_long addr = GET_TLONG(addrh, addrl); memory_dump(count, format, size, addr, 0); } -static void do_physical_memory_dump(int count, int format, int size, int addr) +static void do_physical_memory_dump(int count, int format, int size, + uint32_t addrh, uint32_t addrl) + { + target_long addr = GET_TLONG(addrh, addrl); memory_dump(count, format, size, addr, 1); } -static void do_print(int count, int format, int size, int val) +static void do_print(int count, int format, int size, unsigned int valh, unsigned int vall) { + target_long val = GET_TLONG(valh, vall); +#if TARGET_LONG_BITS == 32 switch(format) { case 'o': term_printf("%#o", val); @@ -503,9 +599,45 @@ static void do_print(int count, int format, int size, int val) term_printc(val); break; } +#else + switch(format) { + case 'o': + term_printf("%#llo", val); + break; + case 'x': + term_printf("%#llx", val); + break; + case 'u': + term_printf("%llu", val); + break; + default: + case 'd': + term_printf("%lld", val); + break; + case 'c': + term_printc(val); + break; + } +#endif term_printf("\n"); } +static void do_sum(uint32_t start, uint32_t size) +{ + uint32_t addr; + uint8_t buf[1]; + uint16_t sum; + + sum = 0; + for(addr = start; addr < (start + size); addr++) { + cpu_physical_memory_rw(addr, buf, 1, 0); + /* BSD sum algorithm ('sum' Unix command) */ + sum = (sum >> 1) | (sum << 15); + sum += buf[0]; + } + term_printf("%05d\n", sum); +} + typedef struct { int keycode; const char *name; @@ -695,6 +827,207 @@ static void do_system_reset(void) qemu_system_reset_request(); } +static void do_system_powerdown(void) +{ + qemu_system_powerdown_request(); +} + +#if defined(TARGET_I386) +static void print_pte(uint32_t addr, uint32_t pte, uint32_t mask) +{ + term_printf("%08x: %08x %c%c%c%c%c%c%c%c\n", + addr, + pte & mask, + pte & PG_GLOBAL_MASK ? 'G' : '-', + pte & PG_PSE_MASK ? 'P' : '-', + pte & PG_DIRTY_MASK ? 'D' : '-', + pte & PG_ACCESSED_MASK ? 'A' : '-', + pte & PG_PCD_MASK ? 'C' : '-', + pte & PG_PWT_MASK ? 'T' : '-', + pte & PG_USER_MASK ? 'U' : '-', + pte & PG_RW_MASK ? 'W' : '-'); +} + +static void tlb_info(void) +{ + CPUState *env; + int l1, l2; + uint32_t pgd, pde, pte; + + env = mon_get_cpu(); + if (!env) + return; + + if (!(env->cr[0] & CR0_PG_MASK)) { + term_printf("PG disabled\n"); + return; + } + pgd = env->cr[3] & ~0xfff; + for(l1 = 0; l1 < 1024; l1++) { + cpu_physical_memory_read(pgd + l1 * 4, (uint8_t *)&pde, 4); + pde = le32_to_cpu(pde); + if (pde & PG_PRESENT_MASK) { + if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { + print_pte((l1 << 22), pde, ~((1 << 20) - 1)); + } else { + for(l2 = 0; l2 < 1024; l2++) { + cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, + (uint8_t *)&pte, 4); + pte = le32_to_cpu(pte); + if (pte & PG_PRESENT_MASK) { + print_pte((l1 << 22) + (l2 << 12), + pte & ~PG_PSE_MASK, + ~0xfff); + } + } + } + } + } +} + +static void mem_print(uint32_t *pstart, int *plast_prot, + uint32_t end, int prot) +{ + int prot1; + prot1 = *plast_prot; + if (prot != prot1) { + if (*pstart != -1) { + term_printf("%08x-%08x %08x %c%c%c\n", + *pstart, end, end - *pstart, + prot1 & PG_USER_MASK ? 'u' : '-', + 'r', + prot1 & PG_RW_MASK ? 'w' : '-'); + } + if (prot != 0) + *pstart = end; + else + *pstart = -1; + *plast_prot = prot; + } +} + +static void mem_info(void) +{ + CPUState *env; + int l1, l2, prot, last_prot; + uint32_t pgd, pde, pte, start, end; + + env = mon_get_cpu(); + if (!env) + return; + + if (!(env->cr[0] & CR0_PG_MASK)) { + term_printf("PG disabled\n"); + return; + } + pgd = env->cr[3] & ~0xfff; + last_prot = 0; + start = -1; + for(l1 = 0; l1 < 1024; l1++) { + cpu_physical_memory_read(pgd + l1 * 4, (uint8_t *)&pde, 4); + pde = le32_to_cpu(pde); + end = l1 << 22; + if (pde & PG_PRESENT_MASK) { + if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { + prot = pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK); + mem_print(&start, &last_prot, end, prot); + } else { + for(l2 = 0; l2 < 1024; l2++) { + cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, + (uint8_t *)&pte, 4); + pte = le32_to_cpu(pte); + end = (l1 << 22) + (l2 << 12); + if (pte & PG_PRESENT_MASK) { + prot = pte & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK); + } else { + prot = 0; + } + mem_print(&start, &last_prot, end, prot); + } + } + } else { + prot = 0; + mem_print(&start, &last_prot, end, prot); + } + } +} +#endif + +static void do_info_kqemu(void) +{ +#ifdef USE_KQEMU + CPUState *env; + int val; + val = 0; + env = mon_get_cpu(); + if (!env) { + term_printf("No cpu initialized yet"); + return; + } + val = env->kqemu_enabled; + term_printf("kqemu support: "); + switch(val) { + default: + case 0: + term_printf("disabled\n"); + break; + case 1: + term_printf("enabled for user code\n"); + break; + case 2: + term_printf("enabled for user and kernel code\n"); + break; + } +#else + term_printf("kqemu support: not compiled\n"); +#endif +} + +#ifdef CONFIG_PROFILER + +int64_t kqemu_time; +int64_t qemu_time; +int64_t kqemu_exec_count; +int64_t dev_time; +int64_t kqemu_ret_int_count; +int64_t kqemu_ret_excp_count; +int64_t kqemu_ret_intr_count; + +static void do_info_profile(void) +{ + int64_t total; + total = qemu_time; + if (total == 0) + total = 1; + term_printf("async time %lld (%0.3f)\n", + dev_time, dev_time / (double)ticks_per_sec); + term_printf("qemu time %lld (%0.3f)\n", + qemu_time, qemu_time / (double)ticks_per_sec); + term_printf("kqemu time %lld (%0.3f %0.1f%%) count=%lld int=%lld excp=%lld intr=%lld\n", + kqemu_time, kqemu_time / (double)ticks_per_sec, + kqemu_time / (double)total * 100.0, + kqemu_exec_count, + kqemu_ret_int_count, + kqemu_ret_excp_count, + kqemu_ret_intr_count); + qemu_time = 0; + kqemu_time = 0; + kqemu_exec_count = 0; + dev_time = 0; + kqemu_ret_int_count = 0; + kqemu_ret_excp_count = 0; + kqemu_ret_intr_count = 0; +#ifdef USE_KQEMU + kqemu_record_dump(); +#endif +} +#else +static void do_info_profile(void) +{ + term_printf("Internal profiler not compiled\n"); +} +#endif + static term_cmd_t term_cmds[] = { { "help|?", "s?", do_help, "[cmd]", "show the help" }, @@ -724,11 +1057,11 @@ static term_cmd_t term_cmds[] = { { "gdbserver", "i?", do_gdbserver, "[port]", "start gdbserver session (default port=1234)", }, #endif - { "x", "/i", do_memory_dump, + { "x", "/l", do_memory_dump, "/fmt addr", "virtual memory dump starting at 'addr'", }, - { "xp", "/i", do_physical_memory_dump, + { "xp", "/l", do_physical_memory_dump, "/fmt addr", "physical memory dump starting at 'addr'", }, - { "p|print", "/i", do_print, + { "p|print", "/l", do_print, "/fmt expr", "print expression value (use $reg for CPU register access)", }, { "i", "/ii.", do_ioport_read, "/fmt addr", "I/O port read" }, @@ -737,16 +1070,30 @@ static term_cmd_t term_cmds[] = { "keys", "send keys to the VM (e.g. 'sendkey ctrl-alt-f1')" }, { "system_reset", "", do_system_reset, "", "reset the system" }, + { "system_powerdown", "", do_system_powerdown, + "", "send system power down event" }, + { "sum", "ii", do_sum, + "addr size", "compute the checksum of a memory region" }, + { "usb_add", "s", do_usb_add, + "device", "add USB device (e.g. 'host:bus.addr' or 'host:vendor_id:product_id')" }, + { "usb_del", "s", do_usb_del, + "device", "remove USB device 'bus.addr'" }, + { "cpu", "i", do_cpu_set, + "index", "set the default CPU" }, { NULL, NULL, }, }; static term_cmd_t info_cmds[] = { + { "version", "", do_info_version, + "", "show the version of qemu" }, { "network", "", do_info_network, "", "show the network state" }, { "block", "", do_info_block, "", "show the block devices" }, { "registers", "", do_info_registers, "", "show the cpu registers" }, + { "cpus", "", do_info_cpus, + "", "show infos for each CPU" }, { "history", "", do_info_history, "", "show the command line history", }, { "irq", "", irq_info, @@ -755,6 +1102,22 @@ static term_cmd_t info_cmds[] = { "", "show i8259 (PIC) state", }, { "pci", "", pci_info, "", "show PCI info", }, +#if defined(TARGET_I386) + { "tlb", "", tlb_info, + "", "show virtual to physical memory mappings", }, + { "mem", "", mem_info, + "", "show the active virtual memory mappings", }, +#endif + { "jit", "", do_info_jit, + "", "show dynamic compiler info", }, + { "kqemu", "", do_info_kqemu, + "", "show kqemu information", }, + { "usb", "", usb_info, + "", "show guest USB devices", }, + { "usbhost", "", usb_host_info, + "", "show host USB devices", }, + { "profile", "", do_info_profile, + "", "show profiling information", }, { NULL, NULL, }, }; @@ -763,75 +1126,118 @@ static term_cmd_t info_cmds[] = { static const char *pch; static jmp_buf expr_env; +#define MD_TLONG 0 +#define MD_I32 1 + typedef struct MonitorDef { const char *name; int offset; - int (*get_value)(struct MonitorDef *md); + target_long (*get_value)(struct MonitorDef *md, int val); + int type; } MonitorDef; #if defined(TARGET_I386) -static int monitor_get_pc (struct MonitorDef *md) +static target_long monitor_get_pc (struct MonitorDef *md, int val) { - return cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base; + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return env->eip + env->segs[R_CS].base; } #endif #if defined(TARGET_PPC) -static int monitor_get_ccr (struct MonitorDef *md) +static target_long monitor_get_ccr (struct MonitorDef *md, int val) { + CPUState *env = mon_get_cpu(); unsigned int u; int i; + if (!env) + return 0; + u = 0; for (i = 0; i < 8; i++) - u |= cpu_single_env->crf[i] << (32 - (4 * i)); + u |= env->crf[i] << (32 - (4 * i)); return u; } -static int monitor_get_msr (struct MonitorDef *md) +static target_long monitor_get_msr (struct MonitorDef *md, int val) { - return (cpu_single_env->msr[MSR_POW] << MSR_POW) | - (cpu_single_env->msr[MSR_ILE] << MSR_ILE) | - (cpu_single_env->msr[MSR_EE] << MSR_EE) | - (cpu_single_env->msr[MSR_PR] << MSR_PR) | - (cpu_single_env->msr[MSR_FP] << MSR_FP) | - (cpu_single_env->msr[MSR_ME] << MSR_ME) | - (cpu_single_env->msr[MSR_FE0] << MSR_FE0) | - (cpu_single_env->msr[MSR_SE] << MSR_SE) | - (cpu_single_env->msr[MSR_BE] << MSR_BE) | - (cpu_single_env->msr[MSR_FE1] << MSR_FE1) | - (cpu_single_env->msr[MSR_IP] << MSR_IP) | - (cpu_single_env->msr[MSR_IR] << MSR_IR) | - (cpu_single_env->msr[MSR_DR] << MSR_DR) | - (cpu_single_env->msr[MSR_RI] << MSR_RI) | - (cpu_single_env->msr[MSR_LE] << MSR_LE); + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return (env->msr[MSR_POW] << MSR_POW) | + (env->msr[MSR_ILE] << MSR_ILE) | + (env->msr[MSR_EE] << MSR_EE) | + (env->msr[MSR_PR] << MSR_PR) | + (env->msr[MSR_FP] << MSR_FP) | + (env->msr[MSR_ME] << MSR_ME) | + (env->msr[MSR_FE0] << MSR_FE0) | + (env->msr[MSR_SE] << MSR_SE) | + (env->msr[MSR_BE] << MSR_BE) | + (env->msr[MSR_FE1] << MSR_FE1) | + (env->msr[MSR_IP] << MSR_IP) | + (env->msr[MSR_IR] << MSR_IR) | + (env->msr[MSR_DR] << MSR_DR) | + (env->msr[MSR_RI] << MSR_RI) | + (env->msr[MSR_LE] << MSR_LE); } -static int monitor_get_xer (struct MonitorDef *md) +static target_long monitor_get_xer (struct MonitorDef *md, int val) { - return (cpu_single_env->xer[XER_SO] << XER_SO) | - (cpu_single_env->xer[XER_OV] << XER_OV) | - (cpu_single_env->xer[XER_CA] << XER_CA) | - (cpu_single_env->xer[XER_BC] << XER_BC); + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return (env->xer[XER_SO] << XER_SO) | + (env->xer[XER_OV] << XER_OV) | + (env->xer[XER_CA] << XER_CA) | + (env->xer[XER_BC] << XER_BC); } -uint32_t cpu_ppc_load_decr (CPUState *env); -static int monitor_get_decr (struct MonitorDef *md) +static target_long monitor_get_decr (struct MonitorDef *md, int val) { - return cpu_ppc_load_decr(cpu_single_env); + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return cpu_ppc_load_decr(env); } -uint32_t cpu_ppc_load_tbu (CPUState *env); -static int monitor_get_tbu (struct MonitorDef *md) +static target_long monitor_get_tbu (struct MonitorDef *md, int val) { - return cpu_ppc_load_tbu(cpu_single_env); + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return cpu_ppc_load_tbu(env); } -uint32_t cpu_ppc_load_tbl (CPUState *env); -static int monitor_get_tbl (struct MonitorDef *md) +static target_long monitor_get_tbl (struct MonitorDef *md, int val) { - return cpu_ppc_load_tbl(cpu_single_env); + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return cpu_ppc_load_tbl(env); +} +#endif + +#if defined(TARGET_SPARC) +#ifndef TARGET_SPARC64 +static target_long monitor_get_psr (struct MonitorDef *md, int val) +{ + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return GET_PSR(env); +} +#endif + +static target_long monitor_get_reg(struct MonitorDef *md, int val) +{ + CPUState *env = mon_get_cpu(); + if (!env) + return 0; + return env->regwptr[val]; } #endif @@ -839,9 +1245,9 @@ static MonitorDef monitor_defs[] = { #ifdef TARGET_I386 #define SEG(name, seg) \ - { name, offsetof(CPUState, segs[seg].selector) },\ + { name, offsetof(CPUState, segs[seg].selector), NULL, MD_I32 },\ { name ".base", offsetof(CPUState, segs[seg].base) },\ - { name ".limit", offsetof(CPUState, segs[seg].limit) }, + { name ".limit", offsetof(CPUState, segs[seg].limit), NULL, MD_I32 }, { "eax", offsetof(CPUState, regs[0]) }, { "ecx", offsetof(CPUState, regs[1]) }, @@ -850,12 +1256,23 @@ static MonitorDef monitor_defs[] = { { "esp|sp", offsetof(CPUState, regs[4]) }, { "ebp|fp", offsetof(CPUState, regs[5]) }, { "esi", offsetof(CPUState, regs[6]) }, - { "esi", offsetof(CPUState, regs[7]) }, + { "edi", offsetof(CPUState, regs[7]) }, +#ifdef TARGET_X86_64 + { "r8", offsetof(CPUState, regs[8]) }, + { "r9", offsetof(CPUState, regs[9]) }, + { "r10", offsetof(CPUState, regs[10]) }, + { "r11", offsetof(CPUState, regs[11]) }, + { "r12", offsetof(CPUState, regs[12]) }, + { "r13", offsetof(CPUState, regs[13]) }, + { "r14", offsetof(CPUState, regs[14]) }, + { "r15", offsetof(CPUState, regs[15]) }, +#endif { "eflags", offsetof(CPUState, eflags) }, { "eip", offsetof(CPUState, eip) }, SEG("cs", R_CS) SEG("ds", R_DS) SEG("es", R_ES) + SEG("ss", R_SS) SEG("fs", R_FS) SEG("gs", R_GS) { "pc", 0, monitor_get_pc, }, @@ -919,6 +1336,106 @@ static MonitorDef monitor_defs[] = { { "sr14", offsetof(CPUState, sr[14]) }, { "sr15", offsetof(CPUState, sr[15]) }, /* Too lazy to put BATs and SPRs ... */ +#elif defined(TARGET_SPARC) + { "g0", offsetof(CPUState, gregs[0]) }, + { "g1", offsetof(CPUState, gregs[1]) }, + { "g2", offsetof(CPUState, gregs[2]) }, + { "g3", offsetof(CPUState, gregs[3]) }, + { "g4", offsetof(CPUState, gregs[4]) }, + { "g5", offsetof(CPUState, gregs[5]) }, + { "g6", offsetof(CPUState, gregs[6]) }, + { "g7", offsetof(CPUState, gregs[7]) }, + { "o0", 0, monitor_get_reg }, + { "o1", 1, monitor_get_reg }, + { "o2", 2, monitor_get_reg }, + { "o3", 3, monitor_get_reg }, + { "o4", 4, monitor_get_reg }, + { "o5", 5, monitor_get_reg }, + { "o6", 6, monitor_get_reg }, + { "o7", 7, monitor_get_reg }, + { "l0", 8, monitor_get_reg }, + { "l1", 9, monitor_get_reg }, + { "l2", 10, monitor_get_reg }, + { "l3", 11, monitor_get_reg }, + { "l4", 12, monitor_get_reg }, + { "l5", 13, monitor_get_reg }, + { "l6", 14, monitor_get_reg }, + { "l7", 15, monitor_get_reg }, + { "i0", 16, monitor_get_reg }, + { "i1", 17, monitor_get_reg }, + { "i2", 18, monitor_get_reg }, + { "i3", 19, monitor_get_reg }, + { "i4", 20, monitor_get_reg }, + { "i5", 21, monitor_get_reg }, + { "i6", 22, monitor_get_reg }, + { "i7", 23, monitor_get_reg }, + { "pc", offsetof(CPUState, pc) }, + { "npc", offsetof(CPUState, npc) }, + { "y", offsetof(CPUState, y) }, +#ifndef TARGET_SPARC64 + { "psr", 0, &monitor_get_psr, }, + { "wim", offsetof(CPUState, wim) }, +#endif + { "tbr", offsetof(CPUState, tbr) }, + { "fsr", offsetof(CPUState, fsr) }, + { "f0", offsetof(CPUState, fpr[0]) }, + { "f1", offsetof(CPUState, fpr[1]) }, + { "f2", offsetof(CPUState, fpr[2]) }, + { "f3", offsetof(CPUState, fpr[3]) }, + { "f4", offsetof(CPUState, fpr[4]) }, + { "f5", offsetof(CPUState, fpr[5]) }, + { "f6", offsetof(CPUState, fpr[6]) }, + { "f7", offsetof(CPUState, fpr[7]) }, + { "f8", offsetof(CPUState, fpr[8]) }, + { "f9", offsetof(CPUState, fpr[9]) }, + { "f10", offsetof(CPUState, fpr[10]) }, + { "f11", offsetof(CPUState, fpr[11]) }, + { "f12", offsetof(CPUState, fpr[12]) }, + { "f13", offsetof(CPUState, fpr[13]) }, + { "f14", offsetof(CPUState, fpr[14]) }, + { "f15", offsetof(CPUState, fpr[15]) }, + { "f16", offsetof(CPUState, fpr[16]) }, + { "f17", offsetof(CPUState, fpr[17]) }, + { "f18", offsetof(CPUState, fpr[18]) }, + { "f19", offsetof(CPUState, fpr[19]) }, + { "f20", offsetof(CPUState, fpr[20]) }, + { "f21", offsetof(CPUState, fpr[21]) }, + { "f22", offsetof(CPUState, fpr[22]) }, + { "f23", offsetof(CPUState, fpr[23]) }, + { "f24", offsetof(CPUState, fpr[24]) }, + { "f25", offsetof(CPUState, fpr[25]) }, + { "f26", offsetof(CPUState, fpr[26]) }, + { "f27", offsetof(CPUState, fpr[27]) }, + { "f28", offsetof(CPUState, fpr[28]) }, + { "f29", offsetof(CPUState, fpr[29]) }, + { "f30", offsetof(CPUState, fpr[30]) }, + { "f31", offsetof(CPUState, fpr[31]) }, +#ifdef TARGET_SPARC64 + { "f32", offsetof(CPUState, fpr[32]) }, + { "f34", offsetof(CPUState, fpr[34]) }, + { "f36", offsetof(CPUState, fpr[36]) }, + { "f38", offsetof(CPUState, fpr[38]) }, + { "f40", offsetof(CPUState, fpr[40]) }, + { "f42", offsetof(CPUState, fpr[42]) }, + { "f44", offsetof(CPUState, fpr[44]) }, + { "f46", offsetof(CPUState, fpr[46]) }, + { "f48", offsetof(CPUState, fpr[48]) }, + { "f50", offsetof(CPUState, fpr[50]) }, + { "f52", offsetof(CPUState, fpr[52]) }, + { "f54", offsetof(CPUState, fpr[54]) }, + { "f56", offsetof(CPUState, fpr[56]) }, + { "f58", offsetof(CPUState, fpr[58]) }, + { "f60", offsetof(CPUState, fpr[60]) }, + { "f62", offsetof(CPUState, fpr[62]) }, + { "asi", offsetof(CPUState, asi) }, + { "pstate", offsetof(CPUState, pstate) }, + { "cansave", offsetof(CPUState, cansave) }, + { "canrestore", offsetof(CPUState, canrestore) }, + { "otherwin", offsetof(CPUState, otherwin) }, + { "wstate", offsetof(CPUState, wstate) }, + { "cleanwin", offsetof(CPUState, cleanwin) }, + { "fprs", offsetof(CPUState, fprs) }, +#endif #endif { NULL }, }; @@ -930,15 +1447,32 @@ static void expr_error(const char *fmt) longjmp(expr_env, 1); } -static int get_monitor_def(int *pval, const char *name) +/* return 0 if OK, -1 if not found, -2 if no CPU defined */ +static int get_monitor_def(target_long *pval, const char *name) { MonitorDef *md; + void *ptr; + for(md = monitor_defs; md->name != NULL; md++) { if (compare_cmd(name, md->name)) { if (md->get_value) { - *pval = md->get_value(md); + *pval = md->get_value(md, md->offset); } else { - *pval = *(uint32_t *)((uint8_t *)cpu_single_env + md->offset); + CPUState *env = mon_get_cpu(); + if (!env) + return -2; + ptr = (uint8_t *)env + md->offset; + switch(md->type) { + case MD_I32: + *pval = *(int32_t *)ptr; + break; + case MD_TLONG: + *pval = *(target_long *)ptr; + break; + default: + *pval = 0; + break; + } } return 0; } @@ -955,12 +1489,13 @@ static void next(void) } } -static int expr_sum(void); +static target_long expr_sum(void); -static int expr_unary(void) +static target_long expr_unary(void) { - int n; + target_long n; char *p; + int ret; switch(*pch) { case '+': @@ -1010,8 +1545,11 @@ static int expr_unary(void) while (isspace(*pch)) pch++; *q = 0; - if (get_monitor_def(&n, buf)) + ret = get_monitor_def(&n, buf); + if (ret == -1) expr_error("unknown register"); + else if (ret == -2) + expr_error("no cpu defined"); } break; case '\0': @@ -1019,6 +1557,7 @@ static int expr_unary(void) n = 0; break; default: + /* XXX: 64 bit version */ n = strtoul(pch, &p, 0); if (pch == p) { expr_error("invalid char in expression"); @@ -1032,10 +1571,11 @@ static int expr_unary(void) } -static int expr_prod(void) +static target_long expr_prod(void) { - int val, val2, op; - + target_long val, val2; + int op; + val = expr_unary(); for(;;) { op = *pch; @@ -1062,9 +1602,10 @@ static int expr_prod(void) return val; } -static int expr_logic(void) +static target_long expr_logic(void) { - int val, val2, op; + target_long val, val2; + int op; val = expr_prod(); for(;;) { @@ -1089,9 +1630,10 @@ static int expr_logic(void) return val; } -static int expr_sum(void) +static target_long expr_sum(void) { - int val, val2, op; + target_long val, val2; + int op; val = expr_logic(); for(;;) { @@ -1108,7 +1650,7 @@ static int expr_sum(void) return val; } -static int get_expr(int *pval, const char **pp) +static int get_expr(target_long *pval, const char **pp) { pch = *pp; if (setjmp(expr_env)) { @@ -1369,8 +1911,9 @@ static void monitor_handle_command(const char *cmdline) } break; case 'i': + case 'l': { - int val; + target_long val; while (isspace(*p)) p++; if (*typestr == '?' || *typestr == '.') { @@ -1403,9 +1946,20 @@ static void monitor_handle_command(const char *cmdline) if (get_expr(&val, &p)) goto fail; add_num: - if (nb_args >= MAX_ARGS) - goto error_args; - args[nb_args++] = (void *)val; + if (c == 'i') { + if (nb_args >= MAX_ARGS) + goto error_args; + args[nb_args++] = (void *)(int)val; + } else { + if ((nb_args + 1) >= MAX_ARGS) + goto error_args; +#if TARGET_LONG_BITS == 64 + args[nb_args++] = (void *)(int)((val >> 32) & 0xffffffff); +#else + args[nb_args++] = (void *)0; +#endif + args[nb_args++] = (void *)(int)(val & 0xffffffff); + } } break; case '-': @@ -1652,6 +2206,15 @@ void readline_find_completion(const char *cmdline) completion_index = strlen(str); bdrv_iterate(block_completion_it, (void *)str); break; + case 's': + /* XXX: more generic ? */ + if (!strcmp(cmd->name, "info")) { + completion_index = strlen(str); + for(cmd = info_cmds; cmd->name != NULL; cmd++) { + cmd_completion(str, cmd->name); + } + } + break; default: break; }