X-Git-Url: http://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Fppc.c;h=3743ad78615bad6474ad4f6d15d0c05ac189f216;hb=bdbd7676fd84066e710fab187c343174bb9592cd;hp=7793cbd441e47066c724a91baf883b9177457461;hpb=642012017c13f7562fc2e0d1ce92272814e3010c;p=qemu diff --git a/hw/ppc.c b/hw/ppc.c index 7793cbd..3743ad7 100644 --- a/hw/ppc.c +++ b/hw/ppc.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ #include "vl.h" +#include "m48t59.h" /*****************************************************************************/ /* PPC time base and decrementer emulation */ @@ -106,13 +107,16 @@ uint32_t cpu_ppc_load_decr (CPUState *env) { ppc_tb_t *tb_env = env->tb_env; uint32_t decr; - - decr = muldiv64(tb_env->decr_next - qemu_get_clock(vm_clock), - tb_env->tb_freq, ticks_per_sec); -#ifdef DEBUG_TB + int64_t diff; + + diff = tb_env->decr_next - qemu_get_clock(vm_clock); + if (diff >= 0) + decr = muldiv64(diff, tb_env->tb_freq, ticks_per_sec); + else + decr = -muldiv64(-diff, tb_env->tb_freq, ticks_per_sec); +#if defined(DEBUG_TB) printf("%s: 0x%08x\n", __func__, decr); #endif - return decr; } @@ -197,18 +201,18 @@ void cpu_ppc_reset (CPUState *env) } #endif -static void PPC_io_writeb (target_phys_addr_t addr, uint32_t value) +static void PPC_io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) { cpu_outb(NULL, addr & 0xffff, value); } -static uint32_t PPC_io_readb (target_phys_addr_t addr) +static uint32_t PPC_io_readb (void *opaque, target_phys_addr_t addr) { uint32_t ret = cpu_inb(NULL, addr & 0xffff); return ret; } -static void PPC_io_writew (target_phys_addr_t addr, uint32_t value) +static void PPC_io_writew (void *opaque, target_phys_addr_t addr, uint32_t value) { #ifdef TARGET_WORDS_BIGENDIAN value = bswap16(value); @@ -216,7 +220,7 @@ static void PPC_io_writew (target_phys_addr_t addr, uint32_t value) cpu_outw(NULL, addr & 0xffff, value); } -static uint32_t PPC_io_readw (target_phys_addr_t addr) +static uint32_t PPC_io_readw (void *opaque, target_phys_addr_t addr) { uint32_t ret = cpu_inw(NULL, addr & 0xffff); #ifdef TARGET_WORDS_BIGENDIAN @@ -225,7 +229,7 @@ static uint32_t PPC_io_readw (target_phys_addr_t addr) return ret; } -static void PPC_io_writel (target_phys_addr_t addr, uint32_t value) +static void PPC_io_writel (void *opaque, target_phys_addr_t addr, uint32_t value) { #ifdef TARGET_WORDS_BIGENDIAN value = bswap32(value); @@ -233,7 +237,7 @@ static void PPC_io_writel (target_phys_addr_t addr, uint32_t value) cpu_outl(NULL, addr & 0xffff, value); } -static uint32_t PPC_io_readl (target_phys_addr_t addr) +static uint32_t PPC_io_readl (void *opaque, target_phys_addr_t addr) { uint32_t ret = cpu_inl(NULL, addr & 0xffff); @@ -257,7 +261,7 @@ CPUReadMemoryFunc *PPC_io_read[] = { /*****************************************************************************/ /* Debug port */ -void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val) +void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val) { addr &= 0xF; switch (addr) { @@ -270,7 +274,7 @@ void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val) break; case 2: printf("Set loglevel to %04x\n", val); - cpu_set_log(val); + cpu_set_log(val | 0x100); break; } } @@ -279,61 +283,45 @@ void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val) /* NVRAM helpers */ void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value) { - m48t59_set_addr(nvram, addr); - m48t59_write(nvram, value); + m48t59_write(nvram, addr, value); } uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr) { - m48t59_set_addr(nvram, addr); - return m48t59_read(nvram); + return m48t59_read(nvram, addr); } void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value) { - m48t59_set_addr(nvram, addr); - m48t59_write(nvram, value >> 8); - m48t59_set_addr(nvram, addr + 1); - m48t59_write(nvram, value & 0xFF); + m48t59_write(nvram, addr, value >> 8); + m48t59_write(nvram, addr + 1, value & 0xFF); } uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr) { uint16_t tmp; - m48t59_set_addr(nvram, addr); - tmp = m48t59_read(nvram) << 8; - m48t59_set_addr(nvram, addr + 1); - tmp |= m48t59_read(nvram); - + tmp = m48t59_read(nvram, addr) << 8; + tmp |= m48t59_read(nvram, addr + 1); return tmp; } void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value) { - m48t59_set_addr(nvram, addr); - m48t59_write(nvram, value >> 24); - m48t59_set_addr(nvram, addr + 1); - m48t59_write(nvram, (value >> 16) & 0xFF); - m48t59_set_addr(nvram, addr + 2); - m48t59_write(nvram, (value >> 8) & 0xFF); - m48t59_set_addr(nvram, addr + 3); - m48t59_write(nvram, value & 0xFF); + m48t59_write(nvram, addr, value >> 24); + m48t59_write(nvram, addr + 1, (value >> 16) & 0xFF); + m48t59_write(nvram, addr + 2, (value >> 8) & 0xFF); + m48t59_write(nvram, addr + 3, value & 0xFF); } uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr) { uint32_t tmp; - m48t59_set_addr(nvram, addr); - tmp = m48t59_read(nvram) << 24; - m48t59_set_addr(nvram, addr + 1); - tmp |= m48t59_read(nvram) << 16; - m48t59_set_addr(nvram, addr + 2); - tmp |= m48t59_read(nvram) << 8; - m48t59_set_addr(nvram, addr + 3); - tmp |= m48t59_read(nvram); - + tmp = m48t59_read(nvram, addr) << 24; + tmp |= m48t59_read(nvram, addr + 1) << 16; + tmp |= m48t59_read(nvram, addr + 2) << 8; + tmp |= m48t59_read(nvram, addr + 3); return tmp; } @@ -343,11 +331,9 @@ void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, int i; for (i = 0; i < max && str[i] != '\0'; i++) { - m48t59_set_addr(nvram, addr + i); - m48t59_write(nvram, str[i]); + m48t59_write(nvram, addr + i, str[i]); } - m48t59_set_addr(nvram, addr + max - 1); - m48t59_write(nvram, '\0'); + m48t59_write(nvram, addr + max - 1, '\0'); } int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max) @@ -397,13 +383,16 @@ uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count) return crc; } +#define CMDLINE_ADDR 0x017ff000 + int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, const unsigned char *arch, uint32_t RAM_size, int boot_device, uint32_t kernel_image, uint32_t kernel_size, - uint32_t cmdline, uint32_t cmdline_size, + const char *cmdline, uint32_t initrd_image, uint32_t initrd_size, - uint32_t NVRAM_image) + uint32_t NVRAM_image, + int width, int height, int depth) { uint16_t crc; @@ -416,30 +405,24 @@ int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, NVRAM_set_byte(nvram, 0x34, boot_device); NVRAM_set_lword(nvram, 0x38, kernel_image); NVRAM_set_lword(nvram, 0x3C, kernel_size); - NVRAM_set_lword(nvram, 0x40, cmdline); - NVRAM_set_lword(nvram, 0x44, cmdline_size); + if (cmdline) { + /* XXX: put the cmdline in NVRAM too ? */ + strcpy(phys_ram_base + CMDLINE_ADDR, cmdline); + NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR); + NVRAM_set_lword(nvram, 0x44, strlen(cmdline)); + } else { + NVRAM_set_lword(nvram, 0x40, 0); + NVRAM_set_lword(nvram, 0x44, 0); + } NVRAM_set_lword(nvram, 0x48, initrd_image); NVRAM_set_lword(nvram, 0x4C, initrd_size); NVRAM_set_lword(nvram, 0x50, NVRAM_image); - crc = NVRAM_compute_crc(nvram, 0x00, 0x5C); - NVRAM_set_word(nvram, 0x5C, crc); - return 0; - } + NVRAM_set_word(nvram, 0x54, width); + NVRAM_set_word(nvram, 0x56, height); + NVRAM_set_word(nvram, 0x58, depth); + crc = NVRAM_compute_crc(nvram, 0x00, 0xF8); + NVRAM_set_word(nvram, 0xFC, crc); -/*****************************************************************************/ -void ppc_init (int ram_size, int vga_ram_size, int boot_device, - DisplayState *ds, const char **fd_filename, int snapshot, - const char *kernel_filename, const char *kernel_cmdline, - const char *initrd_filename) -{ - if (prep_enabled) { - ppc_prep_init(ram_size, vga_ram_size, boot_device, ds, fd_filename, - snapshot, kernel_filename, kernel_cmdline, - initrd_filename); - } else { - ppc_chrp_init(ram_size, vga_ram_size, boot_device, ds, fd_filename, - snapshot, kernel_filename, kernel_cmdline, - initrd_filename); - } + return 0; }