X-Git-Url: http://vcs.maemo.org/git/?a=blobdiff_plain;f=exec-all.h;h=b7c0ad8601bfb07fcd93395b62ebc73ff418f41e;hb=51a36cb2cb38bee2834de8add532cb66e4e6b884;hp=b6853a1af61579d3b596e170adc689c3fd13439c;hpb=02e1ec9bc4f9bb54f88840e6cdcc3c15953dd898;p=qemu diff --git a/exec-all.h b/exec-all.h index b6853a1..b7c0ad8 100644 --- a/exec-all.h +++ b/exec-all.h @@ -28,7 +28,7 @@ #define tostring(s) #s #endif -#if GCC_MAJOR < 3 +#if __GNUC__ < 3 #define __builtin_expect(x, n) (x) #endif @@ -55,9 +55,13 @@ struct TranslationBlock; extern uint16_t gen_opc_buf[OPC_BUF_SIZE]; extern uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE]; -extern uint32_t gen_opc_pc[OPC_BUF_SIZE]; +extern long gen_labels[OPC_BUF_SIZE]; +extern int nb_gen_labels; +extern target_ulong gen_opc_pc[OPC_BUF_SIZE]; +extern target_ulong gen_opc_npc[OPC_BUF_SIZE]; extern uint8_t gen_opc_cc_op[OPC_BUF_SIZE]; extern uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; +extern target_ulong gen_opc_jump_pc[2]; typedef void (GenOpFunc)(void); typedef void (GenOpFunc1)(long); @@ -122,10 +126,12 @@ int tlb_set_page(CPUState *env, target_ulong vaddr, #if defined(__alpha__) #define CODE_GEN_BUFFER_SIZE (2 * 1024 * 1024) +#elif defined(__ia64) +#define CODE_GEN_BUFFER_SIZE (4 * 1024 * 1024) /* range of addl */ #elif defined(__powerpc__) #define CODE_GEN_BUFFER_SIZE (6 * 1024 * 1024) #else -#define CODE_GEN_BUFFER_SIZE (8 * 1024 * 1024) +#define CODE_GEN_BUFFER_SIZE (16 * 1024 * 1024) #endif //#define CODE_GEN_BUFFER_SIZE (128 * 1024) @@ -185,7 +191,7 @@ typedef struct TranslationBlock { struct TranslationBlock *jmp_first; } TranslationBlock; -static inline unsigned int tb_hash_func(unsigned long pc) +static inline unsigned int tb_hash_func(target_ulong pc) { return pc & (CODE_GEN_HASH_SIZE - 1); } @@ -195,7 +201,7 @@ static inline unsigned int tb_phys_hash_func(unsigned long pc) return pc & (CODE_GEN_PHYS_HASH_SIZE - 1); } -TranslationBlock *tb_alloc(unsigned long pc); +TranslationBlock *tb_alloc(target_ulong pc); void tb_flush(CPUState *env); void tb_link(TranslationBlock *tb); void tb_link_phys(TranslationBlock *tb, @@ -309,17 +315,15 @@ TranslationBlock *tb_find_pc(unsigned long pc_ptr); #elif defined(__APPLE__) #define ASM_DATA_SECTION ".data\n" #define ASM_PREVIOUS_SECTION ".text\n" -#define ASM_NAME(x) "_" #x #else #define ASM_DATA_SECTION ".section \".data\"\n" #define ASM_PREVIOUS_SECTION ".previous\n" -#define ASM_NAME(x) stringify(x) #endif #if defined(__powerpc__) /* we patch the jump instruction directly */ -#define JUMP_TB(opname, tbparam, n, eip)\ +#define GOTO_TB(opname, tbparam, n)\ do {\ asm volatile (ASM_DATA_SECTION\ ASM_NAME(__op_label) #n "." ASM_NAME(opname) ":\n"\ @@ -327,20 +331,12 @@ do {\ ASM_PREVIOUS_SECTION \ "b " ASM_NAME(__op_jmp) #n "\n"\ "1:\n");\ - T0 = (long)(tbparam) + (n);\ - EIP = eip;\ - EXIT_TB();\ -} while (0) - -#define JUMP_TB2(opname, tbparam, n)\ -do {\ - asm volatile ("b " ASM_NAME(__op_jmp) #n "\n");\ } while (0) #elif defined(__i386__) && defined(USE_DIRECT_JUMP) /* we patch the jump instruction directly */ -#define JUMP_TB(opname, tbparam, n, eip)\ +#define GOTO_TB(opname, tbparam, n)\ do {\ asm volatile (".section .data\n"\ ASM_NAME(__op_label) #n "." ASM_NAME(opname) ":\n"\ @@ -348,40 +344,32 @@ do {\ ASM_PREVIOUS_SECTION \ "jmp " ASM_NAME(__op_jmp) #n "\n"\ "1:\n");\ - T0 = (long)(tbparam) + (n);\ - EIP = eip;\ - EXIT_TB();\ -} while (0) - -#define JUMP_TB2(opname, tbparam, n)\ -do {\ - asm volatile ("jmp " ASM_NAME(__op_jmp) #n "\n");\ } while (0) #else /* jump to next block operations (more portable code, does not need cache flushing, but slower because of indirect jump) */ -#define JUMP_TB(opname, tbparam, n, eip)\ +#define GOTO_TB(opname, tbparam, n)\ do {\ - static void __attribute__((unused)) *__op_label ## n = &&label ## n;\ static void __attribute__((unused)) *dummy ## n = &&dummy_label ## n;\ + static void __attribute__((unused)) *__op_label ## n = &&label ## n;\ goto *(void *)(((TranslationBlock *)tbparam)->tb_next[n]);\ -label ## n:\ - T0 = (long)(tbparam) + (n);\ - EIP = eip;\ -dummy_label ## n:\ - EXIT_TB();\ +label ## n: ;\ +dummy_label ## n: ;\ } while (0) -/* second jump to same destination 'n' */ -#define JUMP_TB2(opname, tbparam, n)\ +#endif + +/* XXX: will be suppressed */ +#define JUMP_TB(opname, tbparam, n, eip)\ do {\ - goto *(void *)(((TranslationBlock *)tbparam)->tb_next[n - 2]);\ + GOTO_TB(opname, tbparam, n);\ + T0 = (long)(tbparam) + (n);\ + EIP = (int32_t)eip;\ + EXIT_TB();\ } while (0) -#endif - extern CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4]; extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4]; extern void *io_mem_opaque[IO_MEM_NB_ENTRIES]; @@ -407,28 +395,26 @@ static inline int testandset (int *p) #ifdef __i386__ static inline int testandset (int *p) { - char ret; - long int readval; + long int readval = 0; - __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0" - : "=q" (ret), "=m" (*p), "=a" (readval) - : "r" (1), "m" (*p), "a" (0) - : "memory"); - return ret; + __asm__ __volatile__ ("lock; cmpxchgl %2, %0" + : "+m" (*p), "+a" (readval) + : "r" (1) + : "cc"); + return readval; } #endif #ifdef __x86_64__ static inline int testandset (int *p) { - char ret; - int readval; + long int readval = 0; - __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0" - : "=q" (ret), "=m" (*p), "=a" (readval) - : "r" (1), "m" (*p), "a" (0) - : "memory"); - return ret; + __asm__ __volatile__ ("lock; cmpxchgl %2, %0" + : "+m" (*p), "+a" (readval) + : "r" (1) + : "cc"); + return readval; } #endif @@ -499,7 +485,16 @@ static inline int testandset (int *p) : "=r" (ret) : "m" (p) : "cc","memory"); - return ret == 0; + return ret; +} +#endif + +#ifdef __ia64 +#include + +static inline int testandset (int *p) +{ + return __sync_lock_test_and_set (p, 1); } #endif @@ -541,10 +536,9 @@ extern spinlock_t tb_lock; extern int tb_invalidated_flag; -#if (defined(TARGET_I386) || defined(TARGET_PPC)) && \ - !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) -void tlb_fill(unsigned long addr, int is_write, int is_user, +void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr); #define ACCESS_TYPE 3 @@ -560,6 +554,9 @@ void tlb_fill(unsigned long addr, int is_write, int is_user, #define DATA_SIZE 4 #include "softmmu_header.h" +#define DATA_SIZE 8 +#include "softmmu_header.h" + #undef ACCESS_TYPE #undef MEMSUFFIX #undef env @@ -578,26 +575,47 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr) /* XXX: i386 target specific */ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr) { - int is_user, index; + int is_user, index, pd; index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); #if defined(TARGET_I386) is_user = ((env->hflags & HF_CPL_MASK) == 3); #elif defined (TARGET_PPC) is_user = msr_pr; +#elif defined (TARGET_MIPS) + is_user = ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM); +#elif defined (TARGET_SPARC) + is_user = (env->psrs == 0); #else #error "Unimplemented !" #endif if (__builtin_expect(env->tlb_read[is_user][index].address != (addr & TARGET_PAGE_MASK), 0)) { -#if defined (TARGET_PPC) - env->access_type = ACCESS_CODE; - ldub_code((void *)addr); - env->access_type = ACCESS_INT; -#else - ldub_code((void *)addr); -#endif + ldub_code(addr); + } + pd = env->tlb_read[is_user][index].address & ~TARGET_PAGE_MASK; + if (pd > IO_MEM_ROM) { + cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr); } return addr + env->tlb_read[is_user][index].addend - (unsigned long)phys_ram_base; } #endif + + +#ifdef USE_KQEMU +int kqemu_init(CPUState *env); +int kqemu_cpu_exec(CPUState *env); +void kqemu_flush_page(CPUState *env, target_ulong addr); +void kqemu_flush(CPUState *env, int global); + +static inline int kqemu_is_ok(CPUState *env) +{ + return(env->kqemu_enabled && + (env->hflags & HF_CPL_MASK) == 3 && + (env->eflags & IOPL_MASK) != IOPL_MASK && + (env->cr[0] & CR0_PE_MASK) && + (env->eflags & IF_MASK) && + !(env->eflags & VM_MASK)); +} + +#endif