X-Git-Url: http://vcs.maemo.org/git/?a=blobdiff_plain;f=cpu-exec.c;h=58468859dce27b3d1c741f342d9b13392150f534;hb=7587cf44019d593bb12703e7046bd7738996c55c;hp=4e2d77f3a8dbb92277cb63ded26afcdc16e4c049;hpb=ee8b7021da823e11e3c6ea9063ebb2ab50406a3e;p=qemu diff --git a/cpu-exec.c b/cpu-exec.c index 4e2d77f..5846885 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -21,6 +21,20 @@ #include "exec.h" #include "disas.h" +#if !defined(CONFIG_SOFTMMU) +#undef EAX +#undef ECX +#undef EDX +#undef EBX +#undef ESP +#undef EBP +#undef ESI +#undef EDI +#undef EIP +#include +#include +#endif + int tb_invalidated_flag; //#define DEBUG_EXEC @@ -34,6 +48,28 @@ void cpu_loop_exit(void) } #endif +/* exit the current TB from a signal handler. The host registers are + restored in a state compatible with the CPU emulator + */ +void cpu_resume_from_signal(CPUState *env1, void *puc) +{ +#if !defined(CONFIG_SOFTMMU) + struct ucontext *uc = puc; +#endif + + env = env1; + + /* XXX: restore cpu registers saved in host registers */ + +#if !defined(CONFIG_SOFTMMU) + if (puc) { + /* XXX: use siglongjmp ? */ + sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); + } +#endif + longjmp(env->jmp_env, 1); +} + /* main execution loop */ int cpu_exec(CPUState *env1) @@ -190,12 +226,12 @@ int cpu_exec(CPUState *env1) (env->eflags & IF_MASK) && !(env->hflags & HF_INHIBIT_IRQ_MASK)) { int intno; - intno = cpu_x86_get_pic_interrupt(env); - if (loglevel) { + env->interrupt_request &= ~CPU_INTERRUPT_HARD; + intno = cpu_get_pic_interrupt(env); + if (loglevel & CPU_LOG_TB_IN_ASM) { fprintf(logfile, "Servicing hardware INT=0x%02x\n", intno); } do_interrupt(intno, 0, 0, 0, 1); - env->interrupt_request &= ~CPU_INTERRUPT_HARD; /* ensure that no TB jump will be modified as the program flow was changed */ #ifdef __sparc__ @@ -205,13 +241,37 @@ int cpu_exec(CPUState *env1) #endif } #elif defined(TARGET_PPC) +#if 0 + if ((interrupt_request & CPU_INTERRUPT_RESET)) { + cpu_ppc_reset(env); + } +#endif + if (msr_ee != 0) { if ((interrupt_request & CPU_INTERRUPT_HARD)) { - do_queue_exception(EXCP_EXTERNAL); - if (check_exception_state(env)) + /* Raise it */ + env->exception_index = EXCP_EXTERNAL; + env->error_code = 0; do_interrupt(env); env->interrupt_request &= ~CPU_INTERRUPT_HARD; + } else if ((interrupt_request & CPU_INTERRUPT_TIMER)) { + /* Raise it */ + env->exception_index = EXCP_DECR; + env->error_code = 0; + do_interrupt(env); + env->interrupt_request &= ~CPU_INTERRUPT_TIMER; + } } #endif + if (interrupt_request & CPU_INTERRUPT_EXITTB) { + env->interrupt_request &= ~CPU_INTERRUPT_EXITTB; + /* ensure that no TB jump will be modified as + the program flow was changed */ +#ifdef __sparc__ + tmp_T0 = 0; +#else + T0 = 0; +#endif + } if (interrupt_request & CPU_INTERRUPT_EXIT) { env->interrupt_request &= ~CPU_INTERRUPT_EXIT; env->exception_index = EXCP_INTERRUPT; @@ -219,7 +279,7 @@ int cpu_exec(CPUState *env1) } } #ifdef DEBUG_EXEC - if (loglevel) { + if (loglevel & CPU_LOG_EXEC) { #if defined(TARGET_I386) /* restore flags in standard format */ env->regs[R_EAX] = EAX; @@ -352,7 +412,7 @@ int cpu_exec(CPUState *env1) spin_unlock(&tb_lock); } #ifdef DEBUG_EXEC - if (loglevel) { + if (loglevel & CPU_LOG_EXEC) { fprintf(logfile, "Trace 0x%08lx [0x%08lx] %s\n", (long)tb->tc_ptr, (long)tb->pc, lookup_symbol((void *)tb->pc)); @@ -362,9 +422,19 @@ int cpu_exec(CPUState *env1) T0 = tmp_T0; #endif /* see if we can patch the calling TB. */ - if (T0 != 0) { + if (T0 != 0 +#if defined(TARGET_I386) && defined(USE_CODE_COPY) + && (tb->cflags & CF_CODE_COPY) == + (((TranslationBlock *)(T0 & ~3))->cflags & CF_CODE_COPY) +#endif + ) { spin_lock(&tb_lock); tb_add_jump((TranslationBlock *)(T0 & ~3), T0 & 3, tb); +#if defined(USE_CODE_COPY) + /* propagates the FP use info */ + ((TranslationBlock *)(T0 & ~3))->cflags |= + (tb->cflags & CF_FP_USED); +#endif spin_unlock(&tb_lock); } tc_ptr = tb->tc_ptr; @@ -384,6 +454,80 @@ int cpu_exec(CPUState *env1) : /* no outputs */ : "r" (gen_func) : "r1", "r2", "r3", "r8", "r9", "r10", "r12", "r14"); +#elif defined(TARGET_I386) && defined(USE_CODE_COPY) +{ + if (!(tb->cflags & CF_CODE_COPY)) { + if ((tb->cflags & CF_FP_USED) && env->native_fp_regs) { + save_native_fp_state(env); + } + gen_func(); + } else { + if ((tb->cflags & CF_FP_USED) && !env->native_fp_regs) { + restore_native_fp_state(env); + } + /* we work with native eflags */ + CC_SRC = cc_table[CC_OP].compute_all(); + CC_OP = CC_OP_EFLAGS; + asm(".globl exec_loop\n" + "\n" + "debug1:\n" + " pushl %%ebp\n" + " fs movl %10, %9\n" + " fs movl %11, %%eax\n" + " andl $0x400, %%eax\n" + " fs orl %8, %%eax\n" + " pushl %%eax\n" + " popf\n" + " fs movl %%esp, %12\n" + " fs movl %0, %%eax\n" + " fs movl %1, %%ecx\n" + " fs movl %2, %%edx\n" + " fs movl %3, %%ebx\n" + " fs movl %4, %%esp\n" + " fs movl %5, %%ebp\n" + " fs movl %6, %%esi\n" + " fs movl %7, %%edi\n" + " fs jmp *%9\n" + "exec_loop:\n" + " fs movl %%esp, %4\n" + " fs movl %12, %%esp\n" + " fs movl %%eax, %0\n" + " fs movl %%ecx, %1\n" + " fs movl %%edx, %2\n" + " fs movl %%ebx, %3\n" + " fs movl %%ebp, %5\n" + " fs movl %%esi, %6\n" + " fs movl %%edi, %7\n" + " pushf\n" + " popl %%eax\n" + " movl %%eax, %%ecx\n" + " andl $0x400, %%ecx\n" + " shrl $9, %%ecx\n" + " andl $0x8d5, %%eax\n" + " fs movl %%eax, %8\n" + " movl $1, %%eax\n" + " subl %%ecx, %%eax\n" + " fs movl %%eax, %11\n" + " fs movl %9, %%ebx\n" /* get T0 value */ + " popl %%ebp\n" + : + : "m" (*(uint8_t *)offsetof(CPUState, regs[0])), + "m" (*(uint8_t *)offsetof(CPUState, regs[1])), + "m" (*(uint8_t *)offsetof(CPUState, regs[2])), + "m" (*(uint8_t *)offsetof(CPUState, regs[3])), + "m" (*(uint8_t *)offsetof(CPUState, regs[4])), + "m" (*(uint8_t *)offsetof(CPUState, regs[5])), + "m" (*(uint8_t *)offsetof(CPUState, regs[6])), + "m" (*(uint8_t *)offsetof(CPUState, regs[7])), + "m" (*(uint8_t *)offsetof(CPUState, cc_src)), + "m" (*(uint8_t *)offsetof(CPUState, tmp0)), + "a" (gen_func), + "m" (*(uint8_t *)offsetof(CPUState, df)), + "m" (*(uint8_t *)offsetof(CPUState, saved_esp)) + : "%ecx", "%edx" + ); + } +} #else gen_func(); #endif @@ -404,6 +548,11 @@ int cpu_exec(CPUState *env1) #if defined(TARGET_I386) +#if defined(USE_CODE_COPY) + if (env->native_fp_regs) { + save_native_fp_state(env); + } +#endif /* restore flags in standard format */ env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); @@ -449,6 +598,15 @@ int cpu_exec(CPUState *env1) return ret; } +/* must only be called from the generated code as an exception can be + generated */ +void tb_invalidate_page_range(target_ulong start, target_ulong end) +{ + target_ulong phys_addr; + phys_addr = get_phys_addr_code(env, start); + tb_invalidate_phys_page_range(phys_addr, phys_addr + end - start, 0); +} + #if defined(TARGET_I386) && defined(CONFIG_USER_ONLY) void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector) @@ -493,17 +651,7 @@ void cpu_x86_frstor(CPUX86State *s, uint8_t *ptr, int data32) #endif /* TARGET_I386 */ -#undef EAX -#undef ECX -#undef EDX -#undef EBX -#undef ESP -#undef EBP -#undef ESI -#undef EDI -#undef EIP -#include -#include +#if !defined(CONFIG_SOFTMMU) #if defined(TARGET_I386) @@ -512,7 +660,8 @@ void cpu_x86_frstor(CPUX86State *s, uint8_t *ptr, int data32) write caused the exception and otherwise 0'. 'old_set' is the signal set which should be restored */ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, - int is_write, sigset_t *old_set) + int is_write, sigset_t *old_set, + void *puc) { TranslationBlock *tb; int ret; @@ -520,13 +669,14 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, if (cpu_single_env) env = cpu_single_env; /* XXX: find a correct solution for multithread */ #if defined(DEBUG_SIGNAL) - printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", - pc, address, is_write, *(unsigned long *)old_set); + qemu_printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", + pc, address, is_write, *(unsigned long *)old_set); #endif /* XXX: locking issue */ - if (is_write && page_unprotect(address)) { + if (is_write && page_unprotect(address, pc, puc)) { return 1; } + /* see if it is an MMU fault */ ret = cpu_x86_handle_mmu_fault(env, address, is_write, ((env->hflags & HF_CPL_MASK) == 3), 0); @@ -539,7 +689,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, if (tb) { /* the PC is inside the translated code. It means that we have a virtual CPU fault */ - cpu_restore_state(tb, env, pc); + cpu_restore_state(tb, env, pc, puc); } if (ret == 1) { #if 0 @@ -553,8 +703,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, } else { /* activate soft MMU for this block */ env->hflags |= HF_SOFTMMU_MASK; - sigprocmask(SIG_SETMASK, old_set, NULL); - cpu_loop_exit(); + cpu_resume_from_signal(env, puc); } /* never comes here */ return 1; @@ -562,24 +711,27 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, #elif defined(TARGET_ARM) static inline int handle_cpu_signal(unsigned long pc, unsigned long address, - int is_write, sigset_t *old_set) + int is_write, sigset_t *old_set, + void *puc) { /* XXX: do more */ return 0; } #elif defined(TARGET_SPARC) static inline int handle_cpu_signal(unsigned long pc, unsigned long address, - int is_write, sigset_t *old_set) + int is_write, sigset_t *old_set, + void *puc) { /* XXX: locking issue */ - if (is_write && page_unprotect(address)) { + if (is_write && page_unprotect(address, pc, puc)) { return 1; } return 0; } #elif defined (TARGET_PPC) static inline int handle_cpu_signal(unsigned long pc, unsigned long address, - int is_write, sigset_t *old_set) + int is_write, sigset_t *old_set, + void *puc) { TranslationBlock *tb; int ret; @@ -593,7 +745,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, pc, address, is_write, *(unsigned long *)old_set); #endif /* XXX: locking issue */ - if (is_write && page_unprotect(address)) { + if (is_write && page_unprotect(address, pc, puc)) { return 1; } @@ -609,7 +761,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, if (tb) { /* the PC is inside the translated code. It means that we have a virtual CPU fault */ - cpu_restore_state(tb, env, pc); + cpu_restore_state(tb, env, pc, puc); } if (ret == 1) { #if 0 @@ -618,12 +770,11 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, #endif /* we restore the process signal mask as the sigreturn should do it (XXX: use sigsetjmp) */ - sigprocmask(SIG_SETMASK, old_set, NULL); - do_queue_exception_err(env->exception_index, env->error_code); + sigprocmask(SIG_SETMASK, old_set, NULL); + do_raise_exception_err(env->exception_index, env->error_code); } else { /* activate soft MMU for this block */ - sigprocmask(SIG_SETMASK, old_set, NULL); - cpu_loop_exit(); + cpu_resume_from_signal(env, puc); } /* never comes here */ return 1; @@ -634,12 +785,33 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, #if defined(__i386__) +#if defined(USE_CODE_COPY) +static void cpu_send_trap(unsigned long pc, int trap, + struct ucontext *uc) +{ + TranslationBlock *tb; + + if (cpu_single_env) + env = cpu_single_env; /* XXX: find a correct solution for multithread */ + /* now we have a real cpu fault */ + tb = tb_find_pc(pc); + if (tb) { + /* the PC is inside the translated code. It means that we have + a virtual CPU fault */ + cpu_restore_state(tb, env, pc, uc); + } + sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); + raise_exception_err(trap, env->error_code); +} +#endif + int cpu_signal_handler(int host_signum, struct siginfo *info, void *puc) { struct ucontext *uc = puc; unsigned long pc; - + int trapno; + #ifndef REG_EIP /* for glibc 2.1 */ #define REG_EIP EIP @@ -647,10 +819,33 @@ int cpu_signal_handler(int host_signum, struct siginfo *info, #define REG_TRAPNO TRAPNO #endif pc = uc->uc_mcontext.gregs[REG_EIP]; + trapno = uc->uc_mcontext.gregs[REG_TRAPNO]; +#if defined(TARGET_I386) && defined(USE_CODE_COPY) + if (trapno == 0x00 || trapno == 0x05) { + /* send division by zero or bound exception */ + cpu_send_trap(pc, trapno, uc); + return 1; + } else +#endif + return handle_cpu_signal(pc, (unsigned long)info->si_addr, + trapno == 0xe ? + (uc->uc_mcontext.gregs[REG_ERR] >> 1) & 1 : 0, + &uc->uc_sigmask, puc); +} + +#elif defined(__x86_64__) + +int cpu_signal_handler(int host_signum, struct siginfo *info, + void *puc) +{ + struct ucontext *uc = puc; + unsigned long pc; + + pc = uc->uc_mcontext.gregs[REG_RIP]; return handle_cpu_signal(pc, (unsigned long)info->si_addr, uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe ? (uc->uc_mcontext.gregs[REG_ERR] >> 1) & 1 : 0, - &uc->uc_sigmask); + &uc->uc_sigmask, puc); } #elif defined(__powerpc) @@ -674,7 +869,7 @@ int cpu_signal_handler(int host_signum, struct siginfo *info, is_write = 1; #endif return handle_cpu_signal(pc, (unsigned long)info->si_addr, - is_write, &uc->uc_sigmask); + is_write, &uc->uc_sigmask, puc); } #elif defined(__alpha__) @@ -704,7 +899,7 @@ int cpu_signal_handler(int host_signum, struct siginfo *info, } return handle_cpu_signal(pc, (unsigned long)info->si_addr, - is_write, &uc->uc_sigmask); + is_write, &uc->uc_sigmask, puc); } #elif defined(__sparc__) @@ -736,7 +931,7 @@ int cpu_signal_handler(int host_signum, struct siginfo *info, } } return handle_cpu_signal(pc, (unsigned long)info->si_addr, - is_write, sigmask); + is_write, sigmask, NULL); } #elif defined(__arm__) @@ -770,7 +965,7 @@ int cpu_signal_handler(int host_signum, struct siginfo *info, is_write = 0; return handle_cpu_signal(pc, (unsigned long)info->si_addr, is_write, - &uc->uc_sigmask); + &uc->uc_sigmask, puc); } #else @@ -778,3 +973,5 @@ int cpu_signal_handler(int host_signum, struct siginfo *info, #error host CPU specific signal handler needed #endif + +#endif /* !defined(CONFIG_SOFTMMU) */