}
#endif
+static inline void cpu_to_le16w(uint16_t *p, uint16_t v)
+{
+ *p = cpu_to_le16(v);
+}
-/* vl.c */
-extern int reset_requested;
+static inline void cpu_to_le32w(uint32_t *p, uint32_t v)
+{
+ *p = cpu_to_le32(v);
+}
+
+static inline uint16_t le16_to_cpup(const uint16_t *p)
+{
+ return le16_to_cpu(*p);
+}
+
+static inline uint32_t le32_to_cpup(const uint32_t *p)
+{
+ return le32_to_cpu(*p);
+}
+
+/* unaligned versions (optimized for frequent unaligned accesses)*/
+
+#if defined(__i386__) || defined(__powerpc__)
+
+#define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
+#define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
+#define le16_to_cpupu(p) le16_to_cpup(p)
+#define le32_to_cpupu(p) le32_to_cpup(p)
+
+#else
+
+static inline void cpu_to_le16wu(uint16_t *p, uint16_t v)
+{
+ uint8_t *p1 = (uint8_t *)p;
+
+ p1[0] = v;
+ p1[1] = v >> 8;
+}
+
+static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
+{
+ uint8_t *p1 = (uint8_t *)p;
+
+ p1[0] = v;
+ p1[1] = v >> 8;
+ p1[2] = v >> 16;
+ p1[3] = v >> 24;
+}
+
+static inline uint16_t le16_to_cpupu(const uint16_t *p)
+{
+ const uint8_t *p1 = (const uint8_t *)p;
+ return p1[0] | (p1[1] << 8);
+}
+
+static inline uint32_t le32_to_cpupu(const uint32_t *p)
+{
+ const uint8_t *p1 = (const uint8_t *)p;
+ return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24);
+}
+
+#endif
+/* vl.c */
uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
void hw_error(const char *fmt, ...);
+int get_image_size(const char *filename);
int load_image(const char *filename, uint8_t *addr);
extern const char *bios_dir;
void vm_start(void);
void vm_stop(int reason);
+typedef void QEMUResetHandler(void *opaque);
+
+void qemu_register_reset(QEMUResetHandler *func, void *opaque);
+void qemu_system_reset_request(void);
+void qemu_system_shutdown_request(void);
+
extern int audio_enabled;
extern int ram_size;
extern int bios_size;
+extern int rtc_utc;
+extern int cirrus_vga_enabled;
/* XXX: make it dynamic */
#if defined (TARGET_PPC)
#define BIOS_SIZE (512 * 1024)
#else
-#define BIOS_SIZE 0
+#define BIOS_SIZE ((256 + 64) * 1024)
#endif
+/* keyboard/mouse support */
+
+#define MOUSE_EVENT_LBUTTON 0x01
+#define MOUSE_EVENT_RBUTTON 0x02
+#define MOUSE_EVENT_MBUTTON 0x04
+
+typedef void QEMUPutKBDEvent(void *opaque, int keycode);
+typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
+
+void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
+void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
+
+void kbd_put_keycode(int keycode);
+void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
+
/* async I/O support */
typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
PCIMapIORegionFunc *map_func;
} PCIIORegion;
+#define PCI_ROM_SLOT 6
+#define PCI_NUM_REGIONS 7
struct PCIDevice {
/* PCI config space */
uint8_t config[256];
int bus_num;
int devfn;
char name[64];
- PCIIORegion io_regions[6];
+ PCIIORegion io_regions[PCI_NUM_REGIONS];
/* do not access the following fields */
PCIConfigReadFunc *config_read;
void pci_bios_init(void);
void pci_info(void);
+/* temporary: will be moved in platform specific file */
+void pci_prep_init(void);
+void pci_pmac_init(void);
+void pci_ppc_bios_init(void);
+
/* vga.c */
#define VGA_RAM_SIZE (4096 * 1024)
unsigned long vga_ram_offset, int vga_ram_size,
int is_pci);
void vga_update_display(void);
+void vga_invalidate_display(void);
void vga_screen_dump(const char *filename);
+/* cirrus_vga.c */
+void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
+
+void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
+
/* sdl.c */
void sdl_display_init(DisplayState *ds);
/* pckbd.c */
-void kbd_put_keycode(int keycode);
-
-#define MOUSE_EVENT_LBUTTON 0x01
-#define MOUSE_EVENT_RBUTTON 0x02
-#define MOUSE_EVENT_MBUTTON 0x04
-void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
-
void kbd_init(void);
/* mc146818rtc.c */
DisplayState *ds, const char **fd_filename, int snapshot,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename);
+void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
+ DisplayState *ds, const char **fd_filename, int snapshot,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename);
+void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
+ DisplayState *ds, const char **fd_filename, int snapshot,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename);
+#ifdef TARGET_PPC
+ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
+#endif
+void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
+
+extern CPUWriteMemoryFunc *PPC_io_write[];
+extern CPUReadMemoryFunc *PPC_io_read[];
+extern int prep_enabled;
+
+/* NVRAM helpers */
+#include "hw/m48t59.h"
+
+void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
+uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
+void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
+uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
+void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
+uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
+void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
+ const unsigned char *str, uint32_t max);
+int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
+void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
+ uint32_t start, uint32_t count);
+int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
+ const unsigned char *arch,
+ uint32_t RAM_size, int boot_device,
+ uint32_t kernel_image, uint32_t kernel_size,
+ uint32_t cmdline, uint32_t cmdline_size,
+ uint32_t initrd_image, uint32_t initrd_size,
+ uint32_t NVRAM_image);
+
+/* adb.c */
+
+#define MAX_ADB_DEVICES 16
+
+typedef struct ADBDevice ADBDevice;
+
+typedef void ADBDeviceReceivePacket(ADBDevice *d, const uint8_t *buf, int len);
+
+struct ADBDevice {
+ struct ADBBusState *bus;
+ int devaddr;
+ int handler;
+ ADBDeviceReceivePacket *receive_packet;
+ void *opaque;
+};
+
+typedef struct ADBBusState {
+ ADBDevice devices[MAX_ADB_DEVICES];
+ int nb_devices;
+} ADBBusState;
+
+void adb_receive_packet(ADBBusState *s, const uint8_t *buf, int len);
+void adb_send_packet(ADBBusState *s, const uint8_t *buf, int len);
+
+ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
+ ADBDeviceReceivePacket *receive_packet,
+ void *opaque);
+void adb_kbd_init(ADBBusState *bus);
+void adb_mouse_init(ADBBusState *bus);
+
+/* cuda.c */
+
+extern ADBBusState adb_bus;
+int cuda_init(void);
/* monitor.c */
void monitor_init(void);
projects / qemu / blobdiff