/*
- * PPC emulation helpers for qemu.
+ * PowerPC emulation helpers for qemu.
*
- * Copyright (c) 2003 Jocelyn Mayer
+ * Copyright (c) 2003-2005 Jocelyn Mayer
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#include <math.h>
#include "exec.h"
#define MEMSUFFIX _raw
#include "op_helper_mem.h"
#endif
+//#define DEBUG_OP
+//#define DEBUG_EXCEPTIONS
+//#define FLUSH_ALL_TLBS
+
+#define Ts0 (long)((target_long)T0)
+#define Ts1 (long)((target_long)T1)
+#define Ts2 (long)((target_long)T2)
+
/*****************************************************************************/
/* Exceptions processing helpers */
-void do_queue_exception_err (uint32_t exception, int error_code)
+void cpu_loop_exit(void)
+{
+ longjmp(env->jmp_env, 1);
+}
+
+void do_raise_exception_err (uint32_t exception, int error_code)
+{
+#if 0
+ printf("Raise exception %3x code : %d\n", exception, error_code);
+#endif
+ switch (exception) {
+ case EXCP_PROGRAM:
+ if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0)
+ return;
+ break;
+ default:
+ break;
+}
+ env->exception_index = exception;
+ env->error_code = error_code;
+ cpu_loop_exit();
+ }
+
+void do_raise_exception (uint32_t exception)
{
- /* Queue real PPC exceptions */
- if (exception < EXCP_PPC_MAX) {
- env->exceptions |= 1 << exception;
- env->errors[exception] = error_code;
+ do_raise_exception_err(exception, 0);
+}
+
+/*****************************************************************************/
+/* Fixed point operations helpers */
+void do_addo (void)
+{
+ T2 = T0;
+ T0 += T1;
+ if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
} else {
- /* Preserve compatibility with qemu core */
- env->exceptions |= 1;
- env->exception_index = exception;
- env->error_code = error_code;
+ xer_so = 1;
+ xer_ov = 1;
}
}
-void do_queue_exception (uint32_t exception)
+void do_addco (void)
{
- do_queue_exception_err(exception, 0);
+ T2 = T0;
+ T0 += T1;
+ if (likely(T0 >= T2)) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
+ }
+ if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ }
}
-void do_check_exception_state (void)
+void do_adde (void)
{
- if ((env->exceptions & 1) == 1 || check_exception_state(env)) {
- env->exceptions &= ~1;
- cpu_loop_exit();
+ T2 = T0;
+ T0 += T1 + xer_ca;
+ if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
}
}
-/*****************************************************************************/
-/* Helpers for "fat" micro operations */
-/* Special registers load and store */
-void do_load_cr (void)
+void do_addeo (void)
{
- T0 = (env->crf[0] << 28) |
- (env->crf[1] << 24) |
- (env->crf[2] << 20) |
- (env->crf[3] << 16) |
- (env->crf[4] << 12) |
- (env->crf[5] << 8) |
- (env->crf[6] << 4) |
- (env->crf[7] << 0);
+ T2 = T0;
+ T0 += T1 + xer_ca;
+ if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
+ }
+ if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ }
}
-void do_store_cr (uint32_t mask)
+void do_addmeo (void)
{
- int i, sh;
+ T1 = T0;
+ T0 += xer_ca + (-1);
+ if (likely(!(T1 & (T1 ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ }
+ if (likely(T1 != 0))
+ xer_ca = 1;
+}
- for (i = 0, sh = 7; i < 8; i++, sh --) {
- if (mask & (1 << sh))
- env->crf[i] = (T0 >> (sh * 4)) & 0xF;
+void do_addzeo (void)
+{
+ T1 = T0;
+ T0 += xer_ca;
+ if (likely(!((T1 ^ (-1)) & (T1 ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ }
+ if (likely(T0 >= T1)) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
}
}
-void do_load_xer (void)
+void do_divwo (void)
{
- T0 = (xer_so << XER_SO) |
- (xer_ov << XER_OV) |
- (xer_ca << XER_CA) |
- (xer_bc << XER_BC);
+ if (likely(!((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0))) {
+ xer_ov = 0;
+ T0 = (Ts0 / Ts1);
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ T0 = (-1) * ((uint32_t)T0 >> 31);
+ }
}
-void do_store_xer (void)
+void do_divwuo (void)
{
- xer_so = (T0 >> XER_SO) & 0x01;
- xer_ov = (T0 >> XER_OV) & 0x01;
- xer_ca = (T0 >> XER_CA) & 0x01;
- xer_bc = (T0 >> XER_BC) & 0x1f;
+ if (likely((uint32_t)T1 != 0)) {
+ xer_ov = 0;
+ T0 = (uint32_t)T0 / (uint32_t)T1;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ T0 = 0;
+ }
}
-void do_load_msr (void)
+void do_mullwo (void)
{
- T0 = (msr_pow << MSR_POW) |
- (msr_ile << MSR_ILE) |
- (msr_ee << MSR_EE) |
- (msr_pr << MSR_PR) |
- (msr_fp << MSR_FP) |
- (msr_me << MSR_ME) |
- (msr_fe0 << MSR_FE0) |
- (msr_se << MSR_SE) |
- (msr_be << MSR_BE) |
- (msr_fe1 << MSR_FE1) |
- (msr_ip << MSR_IP) |
- (msr_ir << MSR_IR) |
- (msr_dr << MSR_DR) |
- (msr_ri << MSR_RI) |
- (msr_le << MSR_LE);
+ int64_t res = (int64_t)Ts0 * (int64_t)Ts1;
+
+ if (likely((int32_t)res == res)) {
+ xer_ov = 0;
+ } else {
+ xer_ov = 1;
+ xer_so = 1;
+ }
+ T0 = (int32_t)res;
}
-void do_store_msr (void)
+void do_nego (void)
{
- if (((T0 >> MSR_IR) & 0x01) != msr_ir ||
- ((T0 >> MSR_DR) & 0x01) != msr_dr) {
- /* Flush all tlb when changing translation mode or privilege level */
- do_tlbia();
+ if (likely(T0 != INT32_MIN)) {
+ xer_ov = 0;
+ T0 = -Ts0;
+ } else {
+ xer_ov = 1;
+ xer_so = 1;
}
-#if 0
- if ((T0 >> MSR_IP) & 0x01) {
- printf("Halting CPU. Stop emulation\n");
- do_queue_exception(EXCP_HLT);
- cpu_loop_exit();
+}
+
+void do_subfo (void)
+{
+ T2 = T0;
+ T0 = T1 - T0;
+ if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
}
-#endif
- msr_pow = (T0 >> MSR_POW) & 0x03;
- msr_ile = (T0 >> MSR_ILE) & 0x01;
- msr_ee = (T0 >> MSR_EE) & 0x01;
- msr_pr = (T0 >> MSR_PR) & 0x01;
- msr_fp = (T0 >> MSR_FP) & 0x01;
- msr_me = (T0 >> MSR_ME) & 0x01;
- msr_fe0 = (T0 >> MSR_FE0) & 0x01;
- msr_se = (T0 >> MSR_SE) & 0x01;
- msr_be = (T0 >> MSR_BE) & 0x01;
- msr_fe1 = (T0 >> MSR_FE1) & 0x01;
- msr_ip = (T0 >> MSR_IP) & 0x01;
- msr_ir = (T0 >> MSR_IR) & 0x01;
- msr_dr = (T0 >> MSR_DR) & 0x01;
- msr_ri = (T0 >> MSR_RI) & 0x01;
- msr_le = (T0 >> MSR_LE) & 0x01;
+ RETURN();
}
-/* shift right arithmetic helper */
-void do_sraw (void)
+void do_subfco (void)
{
- int32_t ret;
+ T2 = T0;
+ T0 = T1 - T0;
+ if (likely(T0 > T1)) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
+ }
+ if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ }
+}
- xer_ca = 0;
- if (T1 & 0x20) {
- ret = (-1) * (T0 >> 31);
- if (ret < 0)
- xer_ca = 1;
+void do_subfe (void)
+{
+ T0 = T1 + ~T0 + xer_ca;
+ if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) {
+ xer_ca = 0;
} else {
- ret = (int32_t)T0 >> (T1 & 0x1f);
- if (ret < 0 && ((int32_t)T0 & ((1 << T1) - 1)) != 0)
- xer_ca = 1;
+ xer_ca = 1;
}
- (int32_t)T0 = ret;
}
-/* Floating point operations helpers */
-void do_load_fpscr (void)
+void do_subfeo (void)
{
- /* The 32 MSB of the target fpr are undefined.
- * They'll be zero...
- */
- union {
- double d;
- struct {
- uint32_t u[2];
- } s;
- } u;
- int i;
+ T2 = T0;
+ T0 = T1 + ~T0 + xer_ca;
+ if (likely(!((~T2 ^ T1 ^ (-1)) & (~T2 ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ }
+ if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
+ }
+}
- u.s.u[0] = 0;
- u.s.u[1] = 0;
- for (i = 0; i < 8; i++)
- u.s.u[1] |= env->fpscr[i] << (4 * i);
- FT0 = u.d;
+void do_subfmeo (void)
+{
+ T1 = T0;
+ T0 = ~T0 + xer_ca - 1;
+ if (likely(!(~T1 & (~T1 ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_so = 1;
+ xer_ov = 1;
+ }
+ if (likely(T1 != -1))
+ xer_ca = 1;
}
-void do_store_fpscr (uint32_t mask)
+void do_subfzeo (void)
{
- /*
- * We use only the 32 LSB of the incoming fpr
- */
- union {
- double d;
- struct {
- uint32_t u[2];
- } s;
- } u;
- int i;
-
- u.d = FT0;
- if (mask & 0x80)
- env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[1] >> 28) & ~0x9);
- for (i = 1; i < 7; i++) {
- if (mask & (1 << (7 - i)))
- env->fpscr[i] = (u.s.u[1] >> (4 * (7 - i))) & 0xF;
+ T1 = T0;
+ T0 = ~T0 + xer_ca;
+ if (likely(!((~T1 ^ (-1)) & ((~T1) ^ T0) & (1 << 31)))) {
+ xer_ov = 0;
+ } else {
+ xer_ov = 1;
+ xer_so = 1;
+ }
+ if (likely(T0 >= ~T1)) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
+ }
+}
+
+/* shift right arithmetic helper */
+void do_sraw (void)
+{
+ int32_t ret;
+
+ if (likely(!(T1 & 0x20UL))) {
+ if (likely(T1 != 0)) {
+ ret = (int32_t)T0 >> (T1 & 0x1fUL);
+ if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
+ }
+ } else {
+ ret = T0;
+ xer_ca = 0;
+ }
+ } else {
+ ret = (-1) * ((uint32_t)T0 >> 31);
+ if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) {
+ xer_ca = 0;
+ } else {
+ xer_ca = 1;
}
- /* TODO: update FEX & VX */
- /* Set rounding mode */
- switch (env->fpscr[0] & 0x3) {
- case 0:
- /* Best approximation (round to nearest) */
- fesetround(FE_TONEAREST);
- break;
- case 1:
- /* Smaller magnitude (round toward zero) */
- fesetround(FE_TOWARDZERO);
- break;
- case 2:
- /* Round toward +infinite */
- fesetround(FE_UPWARD);
- break;
- case 3:
- /* Round toward -infinite */
- fesetround(FE_DOWNWARD);
- break;
}
+ T0 = ret;
}
+/*****************************************************************************/
+/* Floating point operations helpers */
void do_fctiw (void)
{
union {
double d;
uint64_t i;
- } *p = (void *)&FT1;
+ } p;
- if (FT0 > (double)0x7FFFFFFF)
- p->i = 0x7FFFFFFFULL << 32;
- else if (FT0 < -(double)0x80000000)
- p->i = 0x80000000ULL << 32;
- else
- p->i = 0;
- p->i |= (uint32_t)FT0;
- FT0 = p->d;
+ /* XXX: higher bits are not supposed to be significant.
+ * to make tests easier, return the same as a real PowerPC 750 (aka G3)
+ */
+ p.i = float64_to_int32(FT0, &env->fp_status);
+ p.i |= 0xFFF80000ULL << 32;
+ FT0 = p.d;
}
void do_fctiwz (void)
union {
double d;
uint64_t i;
- } *p = (void *)&FT1;
- int cround = fegetround();
-
- fesetround(FE_TOWARDZERO);
- if (FT0 > (double)0x7FFFFFFF)
- p->i = 0x7FFFFFFFULL << 32;
- else if (FT0 < -(double)0x80000000)
- p->i = 0x80000000ULL << 32;
- else
- p->i = 0;
- p->i |= (uint32_t)FT0;
- FT0 = p->d;
- fesetround(cround);
+ } p;
+
+ /* XXX: higher bits are not supposed to be significant.
+ * to make tests easier, return the same as a real PowerPC 750 (aka G3)
+ */
+ p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status);
+ p.i |= 0xFFF80000ULL << 32;
+ FT0 = p.d;
}
-void do_fsqrt (void)
+void do_fnmadd (void)
{
- FT0 = sqrt(FT0);
+ FT0 = float64_mul(FT0, FT1, &env->fp_status);
+ FT0 = float64_add(FT0, FT2, &env->fp_status);
+ if (likely(!isnan(FT0)))
+ FT0 = float64_chs(FT0);
}
-void do_fsqrts (void)
+void do_fnmsub (void)
{
- FT0 = (float)sqrt((float)FT0);
+ FT0 = float64_mul(FT0, FT1, &env->fp_status);
+ FT0 = float64_sub(FT0, FT2, &env->fp_status);
+ if (likely(!isnan(FT0)))
+ FT0 = float64_chs(FT0);
+}
+
+void do_fsqrt (void)
+{
+ FT0 = float64_sqrt(FT0, &env->fp_status);
}
void do_fres (void)
{
- FT0 = 1.0 / FT0;
+ union {
+ double d;
+ uint64_t i;
+ } p;
+
+ if (likely(isnormal(FT0))) {
+ FT0 = (float)(1.0 / FT0);
+ } else {
+ p.d = FT0;
+ if (p.i == 0x8000000000000000ULL) {
+ p.i = 0xFFF0000000000000ULL;
+ } else if (p.i == 0x0000000000000000ULL) {
+ p.i = 0x7FF0000000000000ULL;
+ } else if (isnan(FT0)) {
+ p.i = 0x7FF8000000000000ULL;
+ } else if (FT0 < 0.0) {
+ p.i = 0x8000000000000000ULL;
+ } else {
+ p.i = 0x0000000000000000ULL;
+ }
+ FT0 = p.d;
+ }
}
-void do_fsqrte (void)
+void do_frsqrte (void)
{
- FT0 = 1.0 / sqrt(FT0);
+ union {
+ double d;
+ uint64_t i;
+ } p;
+
+ if (likely(isnormal(FT0) && FT0 > 0.0)) {
+ FT0 = float64_sqrt(FT0, &env->fp_status);
+ FT0 = float32_div(1.0, FT0, &env->fp_status);
+ } else {
+ p.d = FT0;
+ if (p.i == 0x8000000000000000ULL) {
+ p.i = 0xFFF0000000000000ULL;
+ } else if (p.i == 0x0000000000000000ULL) {
+ p.i = 0x7FF0000000000000ULL;
+ } else if (isnan(FT0)) {
+ if (!(p.i & 0x0008000000000000ULL))
+ p.i |= 0x000FFFFFFFFFFFFFULL;
+ } else if (FT0 < 0) {
+ p.i = 0x7FF8000000000000ULL;
+ } else {
+ p.i = 0x0000000000000000ULL;
+ }
+ FT0 = p.d;
+ }
}
void do_fsel (void)
{
if (FT0 >= 0)
- FT0 = FT2;
- else
FT0 = FT1;
+ else
+ FT0 = FT2;
}
void do_fcmpu (void)
{
- env->fpscr[4] &= ~0x1;
- if (isnan(FT0) || isnan(FT1)) {
- T0 = 0x01;
+ if (likely(!isnan(FT0) && !isnan(FT1))) {
+ if (float64_lt(FT0, FT1, &env->fp_status)) {
+ T0 = 0x08UL;
+ } else if (!float64_le(FT0, FT1, &env->fp_status)) {
+ T0 = 0x04UL;
+ } else {
+ T0 = 0x02UL;
+ }
+ } else {
+ T0 = 0x01UL;
env->fpscr[4] |= 0x1;
env->fpscr[6] |= 0x1;
- } else if (FT0 < FT1) {
- T0 = 0x08;
- } else if (FT0 > FT1) {
- T0 = 0x04;
- } else {
- T0 = 0x02;
}
- env->fpscr[3] |= T0;
+ env->fpscr[3] = T0;
}
void do_fcmpo (void)
{
env->fpscr[4] &= ~0x1;
- if (isnan(FT0) || isnan(FT1)) {
- T0 = 0x01;
+ if (likely(!isnan(FT0) && !isnan(FT1))) {
+ if (float64_lt(FT0, FT1, &env->fp_status)) {
+ T0 = 0x08UL;
+ } else if (!float64_le(FT0, FT1, &env->fp_status)) {
+ T0 = 0x04UL;
+ } else {
+ T0 = 0x02UL;
+ }
+ } else {
+ T0 = 0x01UL;
env->fpscr[4] |= 0x1;
/* I don't know how to test "quiet" nan... */
if (0 /* || ! quiet_nan(...) */) {
} else {
env->fpscr[4] |= 0x8;
}
- } else if (FT0 < FT1) {
- T0 = 0x08;
- } else if (FT0 > FT1) {
- T0 = 0x04;
- } else {
- T0 = 0x02;
}
- env->fpscr[3] |= T0;
+ env->fpscr[3] = T0;
}
-void do_fabs (void)
+void do_rfi (void)
{
- FT0 = fabsl(FT0);
+ env->nip = env->spr[SPR_SRR0] & ~0x00000003;
+ T0 = env->spr[SPR_SRR1] & ~0xFFFF0000UL;
+ do_store_msr(env, T0);
+#if defined (DEBUG_OP)
+ dump_rfi();
+#endif
+ env->interrupt_request |= CPU_INTERRUPT_EXITTB;
}
-void do_fnabs (void)
+void do_tw (uint32_t cmp, int flags)
{
- FT0 = -fabsl(FT0);
+ if (!likely(!((Ts0 < (int32_t)cmp && (flags & 0x10)) ||
+ (Ts0 > (int32_t)cmp && (flags & 0x08)) ||
+ (Ts0 == (int32_t)cmp && (flags & 0x04)) ||
+ (T0 < cmp && (flags & 0x02)) ||
+ (T0 > cmp && (flags & 0x01)))))
+ do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
}
/* Instruction cache invalidation helper */
-#define ICACHE_LINE_SIZE 32
-
void do_icbi (void)
{
- /* Invalidate one cache line */
+ uint32_t tmp;
+ /* Invalidate one cache line :
+ * PowerPC specification says this is to be treated like a load
+ * (not a fetch) by the MMU. To be sure it will be so,
+ * do the load "by hand".
+ */
+#if defined(TARGET_PPC64)
+ if (!msr_sf)
+ T0 &= 0xFFFFFFFFULL;
+#endif
+ tmp = ldl_kernel(T0);
T0 &= ~(ICACHE_LINE_SIZE - 1);
tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE);
}
+/*****************************************************************************/
+/* MMU related helpers */
/* TLB invalidation helpers */
void do_tlbia (void)
{
void do_tlbie (void)
{
+#if !defined(FLUSH_ALL_TLBS)
tlb_flush_page(env, T0);
-}
-
-/*****************************************************************************/
-/* Special helpers for debug */
-extern FILE *stdout;
-
-void dump_state (void)
-{
- cpu_ppc_dump_state(env, stdout, 0);
-}
-
-void dump_rfi (void)
-{
-#if 0
- printf("Return from interrupt %d => 0x%08x\n", pos, env->nip);
- // cpu_ppc_dump_state(env, stdout, 0);
-#endif
-}
-
-void dump_store_sr (int srnum)
-{
-#if 0
- printf("%s: reg=%d 0x%08x\n", __func__, srnum, T0);
+#else
+ do_tlbia();
#endif
}
-static void _dump_store_bat (char ID, int ul, int nr)
-{
- printf("Set %cBAT%d%c to 0x%08x (0x%08x)\n",
- ID, nr, ul == 0 ? 'u' : 'l', T0, env->nip);
-}
-
-void dump_store_ibat (int ul, int nr)
-{
- _dump_store_bat('I', ul, nr);
-}
-
-void dump_store_dbat (int ul, int nr)
-{
- _dump_store_bat('D', ul, nr);
-}
-
-void dump_store_tb (int ul)
-{
- printf("Set TB%c to 0x%08x\n", ul == 0 ? 'L' : 'U', T0);
+/*****************************************************************************/
+/* Softmmu support */
+#if !defined (CONFIG_USER_ONLY)
+
+#define MMUSUFFIX _mmu
+#define GETPC() (__builtin_return_address(0))
+
+#define SHIFT 0
+#include "softmmu_template.h"
+
+#define SHIFT 1
+#include "softmmu_template.h"
+
+#define SHIFT 2
+#include "softmmu_template.h"
+
+#define SHIFT 3
+#include "softmmu_template.h"
+
+/* try to fill the TLB and return an exception if error. If retaddr is
+ NULL, it means that the function was called in C code (i.e. not
+ from generated code or from helper.c) */
+/* XXX: fix it to restore all registers */
+void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr)
+{
+ TranslationBlock *tb;
+ CPUState *saved_env;
+ target_phys_addr_t pc;
+ int ret;
+
+ /* XXX: hack to restore env in all cases, even if not called from
+ generated code */
+ saved_env = env;
+ env = cpu_single_env;
+ ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1);
+ if (!likely(ret == 0)) {
+ if (likely(retaddr)) {
+ /* now we have a real cpu fault */
+ pc = (target_phys_addr_t)retaddr;
+ tb = tb_find_pc(pc);
+ if (likely(tb)) {
+ /* the PC is inside the translated code. It means that we have
+ a virtual CPU fault */
+ cpu_restore_state(tb, env, pc, NULL);
}
-
-void dump_update_tb(uint32_t param)
-{
-#if 0
- printf("Update TB: 0x%08x + %d => 0x%08x\n", T1, param, T0);
-#endif
+ }
+ do_raise_exception_err(env->exception_index, env->error_code);
+ }
+ env = saved_env;
}
+#endif /* !CONFIG_USER_ONLY */
projects / qemu / blobdiff