#ifdef TARGET_X86_64
void OPPROTO op_bswapq_T0(void)
{
- T0 = bswap64(T0);
+ helper_bswapq_T0();
}
#endif
void OPPROTO op_hlt(void)
{
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
+ env->hflags |= HF_HALTED_MASK;
env->exception_index = EXCP_HLT;
cpu_loop_exit();
}
void op_addl_A0_SS(void)
{
- A0 += (long)env->segs[R_SS].base;
+ A0 = (uint32_t)(A0 + env->segs[R_SS].base);
}
void op_subl_A0_2(void)
}
EAX = (EAX & ~0xffff) | al | (ah << 8);
CC_SRC = eflags;
+ FORCE_RET();
}
void OPPROTO op_aas(void)
}
EAX = (EAX & ~0xffff) | al | (ah << 8);
CC_SRC = eflags;
+ FORCE_RET();
}
void OPPROTO op_daa(void)
eflags |= parity_table[al]; /* pf */
eflags |= (al & 0x80); /* sf */
CC_SRC = eflags;
+ FORCE_RET();
}
void OPPROTO op_das(void)
eflags |= parity_table[al]; /* pf */
eflags |= (al & 0x80); /* sf */
CC_SRC = eflags;
+ FORCE_RET();
}
/* segment handling */
FORCE_RET();
}
+void OPPROTO op_fistt_ST0_A0(void)
+{
+#if defined(__sparc__) && !defined(__sparc_v9__)
+ register CPU86_LDouble d asm("o0");
+#else
+ CPU86_LDouble d;
+#endif
+ int val;
+
+ d = ST0;
+ val = floatx_to_int32_round_to_zero(d, &env->fp_status);
+ if (val != (int16_t)val)
+ val = -32768;
+ stw(A0, val);
+ FORCE_RET();
+}
+
+void OPPROTO op_fisttl_ST0_A0(void)
+{
+#if defined(__sparc__) && !defined(__sparc_v9__)
+ register CPU86_LDouble d asm("o0");
+#else
+ CPU86_LDouble d;
+#endif
+ int val;
+
+ d = ST0;
+ val = floatx_to_int32_round_to_zero(d, &env->fp_status);
+ stl(A0, val);
+ FORCE_RET();
+}
+
+void OPPROTO op_fisttll_ST0_A0(void)
+{
+#if defined(__sparc__) && !defined(__sparc_v9__)
+ register CPU86_LDouble d asm("o0");
+#else
+ CPU86_LDouble d;
+#endif
+ int64_t val;
+
+ d = ST0;
+ val = floatx_to_int64_round_to_zero(d, &env->fp_status);
+ stq(A0, val);
+ FORCE_RET();
+}
+
void OPPROTO op_fbld_ST0_A0(void)
{
helper_fbld_ST0_A0();