native FPU support in code copy mode

[qemu] / softmmu_template.h

diff --git a/softmmu_template.h b/softmmu_template.h
index 4f4f2f4..2203c5a 100644 (file)
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -76,14 +76,14 @@ static inline void glue(io_write, SUFFIX)(unsigned long physaddr,
 
     index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
 #if SHIFT <= 2
-    io_mem_write[index][SHIFT](physaddr, val);
+    io_mem_write[index][SHIFT](physaddr, val, tlb_addr);
 #else
 #ifdef TARGET_WORDS_BIGENDIAN
-    io_mem_write[index][2](physaddr, val >> 32);
-    io_mem_write[index][2](physaddr + 4, val);
+    io_mem_write[index][2](physaddr, val >> 32, tlb_addr);
+    io_mem_write[index][2](physaddr + 4, val, tlb_addr);
 #else
-    io_mem_write[index][2](physaddr, val);
-    io_mem_write[index][2](physaddr + 4, val >> 32);
+    io_mem_write[index][2](physaddr, val, tlb_addr);
+    io_mem_write[index][2](physaddr + 4, val >> 32, tlb_addr);
 #endif
 #endif /* SHIFT > 2 */
 }
@@ -162,6 +162,7 @@ static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(unsigned long addr,
 #else
             res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
 #endif
+            res = (DATA_TYPE)res;
         } else {
             /* unaligned/aligned access in the same page */
             res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
@@ -187,7 +188,7 @@ void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(unsigned long addr,
  redo:
     tlb_addr = env->tlb_write[is_user][index].address;
     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
-        physaddr = addr + env->tlb_read[is_user][index].addend;
+        physaddr = addr + env->tlb_write[is_user][index].addend;
         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)
@@ -223,7 +224,7 @@ static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(unsigned long addr,
  redo:
     tlb_addr = env->tlb_write[is_user][index].address;
     if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
-        physaddr = addr + env->tlb_read[is_user][index].addend;
+        physaddr = addr + env->tlb_write[is_user][index].addend;
         if (tlb_addr & ~TARGET_PAGE_MASK) {
             /* IO access */
             if ((addr & (DATA_SIZE - 1)) != 0)