#define DEBUG_LOGFILE "/tmp/qemu.log"
+#ifdef __APPLE__
+#include <crt_externs.h>
+# define environ (*_NSGetEnviron())
+#endif
+
static const char *interp_prefix = CONFIG_QEMU_PREFIX;
#if defined(__i386__) && !defined(CONFIG_STATIC)
/* for recent libc, we add these dummy symbols which are not declared
when generating a linked object (bug in ld ?) */
-#if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)
+#if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
+long __preinit_array_start[0];
+long __preinit_array_end[0];
long __init_array_start[0];
long __init_array_end[0];
long __fini_array_start[0];
return 0;
}
+int cpu_get_pic_interrupt(CPUState *env)
+{
+ return -1;
+}
+
+/* timers for rdtsc */
+
+#if defined(__i386__)
+
+int64_t cpu_get_real_ticks(void)
+{
+ int64_t val;
+ asm volatile ("rdtsc" : "=A" (val));
+ return val;
+}
+
+#elif defined(__x86_64__)
+
+int64_t cpu_get_real_ticks(void)
+{
+ uint32_t low,high;
+ int64_t val;
+ asm volatile("rdtsc" : "=a" (low), "=d" (high));
+ val = high;
+ val <<= 32;
+ val |= low;
+ return val;
+}
+
+#else
+
+static uint64_t emu_time;
+
+int64_t cpu_get_real_ticks(void)
+{
+ return emu_time++;
+}
+
+#endif
+
#ifdef TARGET_I386
/***********************************************************/
/* CPUX86 core interface */
-int cpu_x86_get_pic_interrupt(CPUState *env)
+uint64_t cpu_get_tsc(CPUX86State *env)
{
- return -1;
+ return cpu_get_real_ticks();
}
static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
void cpu_loop(CPUX86State *env)
{
int trapnr;
- uint8_t *pc;
+ target_ulong pc;
target_siginfo_t info;
for(;;) {
case EXCP_INTERRUPT:
/* just indicate that signals should be handled asap */
break;
+ case EXCP_DEBUG:
+ {
+ int sig;
+
+ sig = gdb_handlesig (env, TARGET_SIGTRAP);
+ if (sig)
+ {
+ info.si_signo = sig;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ queue_signal(info.si_signo, &info);
+ }
+ }
+ break;
default:
pc = env->segs[R_CS].base + env->eip;
fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
#ifdef TARGET_ARM
+/* XXX: find a better solution */
+extern void tb_invalidate_page_range(target_ulong start, target_ulong end);
+
+static void arm_cache_flush(target_ulong start, target_ulong last)
+{
+ target_ulong addr, last1;
+
+ if (last < start)
+ return;
+ addr = start;
+ for(;;) {
+ last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
+ if (last1 > last)
+ last1 = last;
+ tb_invalidate_page_range(addr, last1 + 1);
+ if (last1 == last)
+ break;
+ addr = last1 + 1;
+ }
+}
+
void cpu_loop(CPUARMState *env)
{
int trapnr;
trapnr = cpu_arm_exec(env);
switch(trapnr) {
case EXCP_UDEF:
- info.si_signo = SIGILL;
- info.si_errno = 0;
- info.si_code = TARGET_ILL_ILLOPN;
- info._sifields._sigfault._addr = env->regs[15];
- queue_signal(info.si_signo, &info);
+ {
+ TaskState *ts = env->opaque;
+ uint32_t opcode;
+
+ /* we handle the FPU emulation here, as Linux */
+ /* we get the opcode */
+ opcode = ldl_raw((uint8_t *)env->regs[15]);
+
+ if (EmulateAll(opcode, &ts->fpa, env->regs) == 0) {
+ info.si_signo = SIGILL;
+ info.si_errno = 0;
+ info.si_code = TARGET_ILL_ILLOPN;
+ info._sifields._sigfault._addr = env->regs[15];
+ queue_signal(info.si_signo, &info);
+ } else {
+ /* increment PC */
+ env->regs[15] += 4;
+ }
+ }
break;
case EXCP_SWI:
{
/* system call */
- insn = ldl((void *)(env->regs[15] - 4));
- n = insn & 0xffffff;
- if (n >= ARM_SYSCALL_BASE) {
+ if (env->thumb) {
+ insn = lduw((void *)(env->regs[15] - 2));
+ n = insn & 0xff;
+ } else {
+ insn = ldl((void *)(env->regs[15] - 4));
+ n = insn & 0xffffff;
+ }
+
+ if (n == ARM_NR_cacheflush) {
+ arm_cache_flush(env->regs[0], env->regs[1]);
+ } else if (n == ARM_NR_semihosting
+ || n == ARM_NR_thumb_semihosting) {
+ env->regs[0] = do_arm_semihosting (env);
+ } else if (n >= ARM_SYSCALL_BASE
+ || (env->thumb && n == ARM_THUMB_SYSCALL)) {
/* linux syscall */
- n -= ARM_SYSCALL_BASE;
+ if (env->thumb) {
+ n = env->regs[7];
+ } else {
+ n -= ARM_SYSCALL_BASE;
+ }
env->regs[0] = do_syscall(env,
n,
env->regs[0],
env->regs[2],
env->regs[3],
env->regs[4],
- 0);
+ env->regs[5]);
} else {
goto error;
}
case EXCP_INTERRUPT:
/* just indicate that signals should be handled asap */
break;
+ case EXCP_PREFETCH_ABORT:
+ case EXCP_DATA_ABORT:
+ {
+ info.si_signo = SIGSEGV;
+ info.si_errno = 0;
+ /* XXX: check env->error_code */
+ info.si_code = TARGET_SEGV_MAPERR;
+ info._sifields._sigfault._addr = env->cp15_6;
+ queue_signal(info.si_signo, &info);
+ }
+ break;
+ case EXCP_DEBUG:
+ {
+ int sig;
+
+ sig = gdb_handlesig (env, TARGET_SIGTRAP);
+ if (sig)
+ {
+ info.si_signo = sig;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ queue_signal(info.si_signo, &info);
+ }
+ }
+ break;
default:
error:
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
trapnr);
- cpu_arm_dump_state(env, stderr, 0);
+ cpu_dump_state(env, stderr, fprintf, 0);
abort();
}
process_pending_signals(env);
//#define DEBUG_WIN
-/* WARNING: dealing with register windows _is_ complicated */
+/* WARNING: dealing with register windows _is_ complicated. More info
+ can be found at http://www.sics.se/~psm/sparcstack.html */
static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
{
index = (index + cwp * 16) & (16 * NWINDOWS - 1);
return index;
}
-static inline void save_window_offset(CPUSPARCState *env, int offset)
+/* save the register window 'cwp1' */
+static inline void save_window_offset(CPUSPARCState *env, int cwp1)
{
- unsigned int new_wim, i, cwp1;
+ unsigned int i;
uint32_t *sp_ptr;
- new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
- ((1LL << NWINDOWS) - 1);
- /* save the window */
- cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
sp_ptr = (uint32_t *)(env->regbase[get_reg_index(env, cwp1, 6)]);
#if defined(DEBUG_WIN)
printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
(int)sp_ptr, cwp1);
#endif
- for(i = 0; i < 16; i++)
- stl_raw(sp_ptr + i, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
- env->wim = new_wim;
+ for(i = 0; i < 16; i++) {
+ put_user(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
+ sp_ptr++;
+ }
}
static void save_window(CPUSPARCState *env)
{
- save_window_offset(env, 2);
+ unsigned int new_wim;
+ new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
+ ((1LL << NWINDOWS) - 1);
+ save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
+ env->wim = new_wim;
}
static void restore_window(CPUSPARCState *env)
{
unsigned int new_wim, i, cwp1;
- uint32_t *sp_ptr;
+ uint32_t *sp_ptr, reg;
new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
((1LL << NWINDOWS) - 1);
printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
(int)sp_ptr, cwp1);
#endif
- for(i = 0; i < 16; i++)
- env->regbase[get_reg_index(env, cwp1, 8 + i)] = ldl_raw(sp_ptr + i);
+ for(i = 0; i < 16; i++) {
+ get_user(reg, sp_ptr);
+ env->regbase[get_reg_index(env, cwp1, 8 + i)] = reg;
+ sp_ptr++;
+ }
env->wim = new_wim;
}
static void flush_windows(CPUSPARCState *env)
{
int offset, cwp1;
-#if defined(DEBUG_WIN)
- printf("flush_windows:\n");
-#endif
- offset = 2;
+
+ offset = 1;
for(;;) {
/* if restore would invoke restore_window(), then we can stop */
- cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
+ cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
if (env->wim & (1 << cwp1))
break;
-#if defined(DEBUG_WIN)
- printf("offset=%d: ", offset);
-#endif
- save_window_offset(env, offset);
+ save_window_offset(env, cwp1);
offset++;
}
+ /* set wim so that restore will reload the registers */
+ cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
+ env->wim = 1 << cwp1;
+#if defined(DEBUG_WIN)
+ printf("flush_windows: nb=%d\n", offset - 1);
+#endif
}
void cpu_loop (CPUSPARCState *env)
{
int trapnr, ret;
+ target_siginfo_t info;
while (1) {
trapnr = cpu_sparc_exec (env);
env->npc = env->npc + 4;
break;
case 0x83: /* flush windows */
- // flush_windows(env);
+ flush_windows(env);
/* next instruction */
env->pc = env->npc;
env->npc = env->npc + 4;
break;
+#ifndef TARGET_SPARC64
case TT_WIN_OVF: /* window overflow */
save_window(env);
break;
case TT_WIN_UNF: /* window underflow */
restore_window(env);
break;
+ case TT_TFAULT:
+ case TT_DFAULT:
+ {
+ info.si_signo = SIGSEGV;
+ info.si_errno = 0;
+ /* XXX: check env->error_code */
+ info.si_code = TARGET_SEGV_MAPERR;
+ info._sifields._sigfault._addr = env->mmuregs[4];
+ queue_signal(info.si_signo, &info);
+ }
+ break;
+#else
+ // XXX
+#endif
+ case 0x100: // XXX, why do we get these?
+ break;
+ case EXCP_DEBUG:
+ {
+ int sig;
+
+ sig = gdb_handlesig (env, TARGET_SIGTRAP);
+ if (sig)
+ {
+ info.si_signo = sig;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ queue_signal(info.si_signo, &info);
+ }
+ }
+ break;
default:
printf ("Unhandled trap: 0x%x\n", trapnr);
- cpu_sparc_dump_state(env, stderr, 0);
+ cpu_dump_state(env, stderr, fprintf, 0);
exit (1);
}
process_pending_signals (env);
#ifdef TARGET_PPC
+static inline uint64_t cpu_ppc_get_tb (CPUState *env)
+{
+ /* TO FIX */
+ return 0;
+}
+
+uint32_t cpu_ppc_load_tbl (CPUState *env)
+{
+ return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
+}
+
+uint32_t cpu_ppc_load_tbu (CPUState *env)
+{
+ return cpu_ppc_get_tb(env) >> 32;
+}
+
+static void cpu_ppc_store_tb (CPUState *env, uint64_t value)
+{
+ /* TO FIX */
+}
+
+void cpu_ppc_store_tbu (CPUState *env, uint32_t value)
+{
+ cpu_ppc_store_tb(env, ((uint64_t)value << 32) | cpu_ppc_load_tbl(env));
+}
+
+void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
+{
+ cpu_ppc_store_tb(env, ((uint64_t)cpu_ppc_load_tbl(env) << 32) | value);
+}
+
+uint32_t cpu_ppc_load_decr (CPUState *env)
+{
+ /* TO FIX */
+ return -1;
+}
+
+void cpu_ppc_store_decr (CPUState *env, uint32_t value)
+{
+ /* TO FIX */
+}
+
void cpu_loop(CPUPPCState *env)
{
target_siginfo_t info;
if (trapnr != EXCP_SYSCALL_USER && trapnr != EXCP_BRANCH &&
trapnr != EXCP_TRACE) {
if (loglevel > 0) {
- cpu_ppc_dump_state(env, logfile, 0);
+ cpu_dump_state(env, logfile, fprintf, 0);
}
}
switch(trapnr) {
info._sifields._sigfault._addr = env->nip - 4;
queue_signal(info.si_signo, &info);
case EXCP_DSI:
- fprintf(stderr, "Invalid data memory access: 0x%08x\n", env->spr[DAR]);
+ fprintf(stderr, "Invalid data memory access: 0x%08x\n",
+ env->spr[SPR_DAR]);
if (loglevel) {
fprintf(logfile, "Invalid data memory access: 0x%08x\n",
- env->spr[DAR]);
+ env->spr[SPR_DAR]);
}
- switch (env->error_code & 0xF) {
- case EXCP_DSI_TRANSLATE:
+ switch (env->error_code & 0xFF000000) {
+ case 0x40000000:
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
info.si_code = TARGET_SEGV_MAPERR;
break;
- case EXCP_DSI_NOTSUP:
- case EXCP_DSI_EXTERNAL:
+ case 0x04000000:
info.si_signo = TARGET_SIGILL;
info.si_errno = 0;
info.si_code = TARGET_ILL_ILLADR;
break;
- case EXCP_DSI_PROT:
+ case 0x08000000:
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
info.si_code = TARGET_SEGV_ACCERR;
break;
- case EXCP_DSI_DABR:
- info.si_signo = TARGET_SIGTRAP;
- info.si_errno = 0;
- info.si_code = TARGET_TRAP_BRKPT;
- break;
default:
/* Let's send a regular segfault... */
fprintf(stderr, "Invalid segfault errno (%02x)\n",
fprintf(stderr, "Invalid instruction fetch\n");
if (loglevel)
fprintf(logfile, "Invalid instruction fetch\n");
- switch (env->error_code) {
- case EXCP_ISI_TRANSLATE:
+ switch (env->error_code & 0xFF000000) {
+ case 0x40000000:
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
info.si_code = TARGET_SEGV_MAPERR;
break;
- case EXCP_ISI_GUARD:
- info.si_signo = TARGET_SIGILL;
- info.si_errno = 0;
- info.si_code = TARGET_ILL_ILLADR;
- break;
- case EXCP_ISI_NOEXEC:
- case EXCP_ISI_PROT:
+ case 0x10000000:
+ case 0x08000000:
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
info.si_code = TARGET_SEGV_ACCERR;
if (loglevel)
fprintf(logfile, "Decrementer exception\n");
abort();
- case EXCP_RESA: /* Implementation specific */
- /* Should not happen ! */
- fprintf(stderr, "RESA exception should never happen !\n");
- if (loglevel)
- fprintf(logfile, "RESA exception should never happen !\n");
- abort();
- case EXCP_RESB: /* Implementation specific */
- /* Should not happen ! */
- fprintf(stderr, "RESB exception should never happen !\n");
- if (loglevel)
- fprintf(logfile, "RESB exception should never happen !\n");
- abort();
case EXCP_TRACE:
/* Do nothing: we use this to trace execution */
break;
abort();
case EXCP_MTMSR:
/* We reloaded the msr, just go on */
- if (msr_pr) {
+ if (msr_pr == 0) {
fprintf(stderr, "Tried to go into supervisor mode !\n");
if (loglevel)
fprintf(logfile, "Tried to go into supervisor mode !\n");
case EXCP_BRANCH:
/* We stopped because of a jump... */
break;
- case EXCP_RFI:
- /* Should not occur: we always are in user mode */
- fprintf(stderr, "Return from interrupt ?\n");
- if (loglevel)
- fprintf(logfile, "Return from interrupt ?\n");
- abort();
case EXCP_INTERRUPT:
/* Don't know why this should ever happen... */
break;
+ case EXCP_DEBUG:
+ {
+ int sig;
+
+ sig = gdb_handlesig (env, TARGET_SIGTRAP);
+ if (sig)
+ {
+ info.si_signo = sig;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ queue_signal(info.si_signo, &info);
+ }
+ }
+ break;
default:
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
trapnr);
}
abort();
}
- if (trapnr < EXCP_PPC_MAX)
- env->exceptions &= ~(1 << trapnr);
process_pending_signals(env);
- if (env->exceptions != 0) {
- check_exception_state(env);
- }
}
}
#endif
void usage(void)
{
- printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003 Fabrice Bellard\n"
- "usage: qemu-" TARGET_ARCH " [-h] [-d] [-L path] [-s size] program [arguments...]\n"
+ printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2004 Fabrice Bellard\n"
+ "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] program [arguments...]\n"
"Linux CPU emulator (compiled for %s emulation)\n"
"\n"
"-h print this help\n"
+ "-g wait gdb connection to port %d\n"
"-L path set the elf interpreter prefix (default=%s)\n"
"-s size set the stack size in bytes (default=%ld)\n"
"\n"
"debug options:\n"
- "-d activate log (logfile=%s)\n"
+#ifdef USE_CODE_COPY
+ "-no-code-copy disable code copy acceleration\n"
+#endif
+ "-d options activate log (logfile=%s)\n"
"-p pagesize set the host page size to 'pagesize'\n",
TARGET_ARCH,
+ DEFAULT_GDBSTUB_PORT,
interp_prefix,
x86_stack_size,
DEBUG_LOGFILE);
CPUState *env;
int optind;
const char *r;
+ int use_gdbstub = 0;
if (argc <= 1)
usage();
if (!strcmp(r, "-")) {
break;
} else if (!strcmp(r, "d")) {
- cpu_set_log(CPU_LOG_ALL);
+ int mask;
+ CPULogItem *item;
+
+ if (optind >= argc)
+ break;
+
+ r = argv[optind++];
+ mask = cpu_str_to_log_mask(r);
+ if (!mask) {
+ printf("Log items (comma separated):\n");
+ for(item = cpu_log_items; item->mask != 0; item++) {
+ printf("%-10s %s\n", item->name, item->help);
+ }
+ exit(1);
+ }
+ cpu_set_log(mask);
} else if (!strcmp(r, "s")) {
r = argv[optind++];
x86_stack_size = strtol(r, (char **)&r, 0);
} else if (!strcmp(r, "L")) {
interp_prefix = argv[optind++];
} else if (!strcmp(r, "p")) {
- host_page_size = atoi(argv[optind++]);
- if (host_page_size == 0 ||
- (host_page_size & (host_page_size - 1)) != 0) {
+ qemu_host_page_size = atoi(argv[optind++]);
+ if (qemu_host_page_size == 0 ||
+ (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
fprintf(stderr, "page size must be a power of two\n");
exit(1);
}
- } else {
+ } else if (!strcmp(r, "g")) {
+ use_gdbstub = 1;
+ } else
+#ifdef USE_CODE_COPY
+ if (!strcmp(r, "no-code-copy")) {
+ code_copy_enabled = 0;
+ } else
+#endif
+ {
usage();
}
}
/* Scan interp_prefix dir for replacement files. */
init_paths(interp_prefix);
- /* NOTE: we need to init the CPU at this stage to get the
- host_page_size */
+ /* NOTE: we need to init the CPU at this stage to get
+ qemu_host_page_size */
env = cpu_init();
if (elf_exec(filename, argv+optind, environ, regs, info) != 0) {
env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
env->hflags |= HF_PE_MASK;
+ if (env->cpuid_features & CPUID_SSE) {
+ env->cr[4] |= CR4_OSFXSR_MASK;
+ env->hflags |= HF_OSFXSR_MASK;
+ }
/* flags setup : we activate the IRQs by default as in user mode */
env->eflags |= IF_MASK;
env->eip = regs->eip;
/* linux interrupt setup */
- env->idt.base = (void *)idt_table;
+ env->idt.base = (long)idt_table;
env->idt.limit = sizeof(idt_table) - 1;
set_idt(0, 0);
set_idt(1, 0);
set_idt(0x80, 3);
/* linux segment setup */
- env->gdt.base = (void *)gdt_table;
+ env->gdt.base = (long)gdt_table;
env->gdt.limit = sizeof(gdt_table) - 1;
write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
env->regs[i] = regs->uregs[i];
}
env->cpsr = regs->uregs[16];
+ ts->stack_base = info->start_stack;
+ ts->heap_base = info->brk;
+ /* This will be filled in on the first SYS_HEAPINFO call. */
+ ts->heap_limit = 0;
}
#elif defined(TARGET_SPARC)
{
}
#elif defined(TARGET_PPC)
{
+ ppc_def_t *def;
int i;
+
+ /* Choose and initialise CPU */
+ /* XXX: CPU model (or PVR) should be provided on command line */
+ // ppc_find_by_name("750gx", &def);
+ // ppc_find_by_name("750fx", &def);
+ // ppc_find_by_name("750p", &def);
+ ppc_find_by_name("750", &def);
+ // ppc_find_by_name("G3", &def);
+ // ppc_find_by_name("604r", &def);
+ // ppc_find_by_name("604e", &def);
+ // ppc_find_by_name("604", &def);
+ if (def == NULL) {
+ cpu_abort(cpu_single_env,
+ "Unable to find PowerPC CPU definition\n");
+ }
+ cpu_ppc_register(cpu_single_env, def);
+
for (i = 0; i < 32; i++) {
- if (i != 12 && i != 6)
+ if (i != 12 && i != 6 && i != 13)
env->msr[i] = (regs->msr >> i) & 1;
}
env->nip = regs->nip;
#error unsupported target CPU
#endif
+ if (use_gdbstub) {
+ gdbserver_start (DEFAULT_GDBSTUB_PORT);
+ gdb_handlesig(env, 0);
+ }
cpu_loop(env);
/* never exits */
return 0;