* This code is licensed under the GNU GPL v2.
*/
-#include "vl.h"
+#include "hw.h"
+#include "pxa.h"
+#include "arm-misc.h"
+#include "sysemu.h"
+#include "pcmcia.h"
+#include "i2c.h"
+#include "flash.h"
+#include "qemu-timer.h"
+#include "devices.h"
+#include "console.h"
+#include "block.h"
+#include "audio/audio.h"
+#include "boards.h"
#define spitz_printf(format, ...) \
fprintf(stderr, "%s: " format, __FUNCTION__, ##__VA_ARGS__)
#undef REG_FMT
+#if TARGET_PHYS_ADDR_BITS == 32
+#define REG_FMT "0x%02x"
+#else
#define REG_FMT "0x%02lx"
+#endif
/* Spitz Flash */
#define FLASH_BASE 0x0c000000
return 0;
}
+static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
+{
+ struct sl_nand_s *s = (struct sl_nand_s *) opaque;
+ addr -= s->target_base;
+
+ if (addr == FLASH_FLASHIO)
+ return ecc_digest(&s->ecc, nand_getio(s->nand)) |
+ (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
+
+ return sl_readb(opaque, addr);
+}
+
static void sl_writeb(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
}
}
+static void sl_save(QEMUFile *f, void *opaque)
+{
+ struct sl_nand_s *s = (struct sl_nand_s *) opaque;
+
+ qemu_put_8s(f, &s->ctl);
+ ecc_put(f, &s->ecc);
+}
+
+static int sl_load(QEMUFile *f, void *opaque, int version_id)
+{
+ struct sl_nand_s *s = (struct sl_nand_s *) opaque;
+
+ qemu_get_8s(f, &s->ctl);
+ ecc_get(f, &s->ecc);
+
+ return 0;
+}
+
enum {
FLASH_128M,
FLASH_1024M,
CPUReadMemoryFunc *sl_readfn[] = {
sl_readb,
sl_readb,
- sl_readb,
+ sl_readl,
};
CPUWriteMemoryFunc *sl_writefn[] = {
sl_writeb,
iomemtype = cpu_register_io_memory(0, sl_readfn,
sl_writefn, s);
cpu_register_physical_memory(s->target_base, 0x40, iomemtype);
+
+ register_savevm("sl_flash", 0, 0, sl_save, sl_load, s);
}
/* Spitz Keyboard */
{ 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
{ 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
{ 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
- { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x3d },
- { 0x37, 0x38, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
+ { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
+ { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
{ 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
};
static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, };
struct spitz_keyboard_s {
- struct pxa2xx_state_s *cpu;
+ qemu_irq sense[SPITZ_KEY_SENSE_NUM];
+ qemu_irq *strobe;
+ qemu_irq gpiomap[5];
int keymap[0x80];
uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
uint16_t strobe_state;
if (strobe) {
sense |= 1 << i;
if (!(s->sense_state & (1 << i)))
- pxa2xx_gpio_set(s->cpu->gpio, spitz_gpio_key_sense[i], 1);
+ qemu_irq_raise(s->sense[i]);
} else if (s->sense_state & (1 << i))
- pxa2xx_gpio_set(s->cpu->gpio, spitz_gpio_key_sense[i], 0);
+ qemu_irq_lower(s->sense[i]);
}
s->sense_state = sense;
}
-static void spitz_keyboard_strobe(int line, int level,
- struct spitz_keyboard_s *s)
+static void spitz_keyboard_strobe(void *opaque, int line, int level)
{
- int i;
- for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
- if (spitz_gpio_key_strobe[i] == line) {
- if (level)
- s->strobe_state |= 1 << i;
- else
- s->strobe_state &= ~(1 << i);
-
- spitz_keyboard_sense_update(s);
- break;
- }
+ struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
+
+ if (level)
+ s->strobe_state |= 1 << line;
+ else
+ s->strobe_state &= ~(1 << line);
+ spitz_keyboard_sense_update(s);
}
static void spitz_keyboard_keydown(struct spitz_keyboard_s *s, int keycode)
/* Handle the additional keys */
if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
- pxa2xx_gpio_set(s->cpu->gpio, spitz_gpiomap[spitz_keycode & 0xf],
- (keycode < 0x80) ^
+ qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^
spitz_gpio_invert[spitz_keycode & 0xf]);
return;
}
s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */
s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */
s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */
+ s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */
+ s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */
s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */
s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */
s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */
s->pre_map[0x2b ] = 0x25 | FN; /* backslash */
s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */
s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */
+ s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */
s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */
+ s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */
s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */
s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */
s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */
#undef CTRL
#undef FN
+static void spitz_keyboard_save(QEMUFile *f, void *opaque)
+{
+ struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
+ int i;
+
+ qemu_put_be16s(f, &s->sense_state);
+ qemu_put_be16s(f, &s->strobe_state);
+ for (i = 0; i < 5; i ++)
+ qemu_put_byte(f, spitz_gpio_invert[i]);
+}
+
+static int spitz_keyboard_load(QEMUFile *f, void *opaque, int version_id)
+{
+ struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
+ int i;
+
+ qemu_get_be16s(f, &s->sense_state);
+ qemu_get_be16s(f, &s->strobe_state);
+ for (i = 0; i < 5; i ++)
+ spitz_gpio_invert[i] = qemu_get_byte(f);
+
+ /* Release all pressed keys */
+ memset(s->keyrow, 0, sizeof(s->keyrow));
+ spitz_keyboard_sense_update(s);
+ s->modifiers = 0;
+ s->imodifiers = 0;
+ s->fifopos = 0;
+ s->fifolen = 0;
+
+ return 0;
+}
+
static void spitz_keyboard_register(struct pxa2xx_state_s *cpu)
{
int i, j;
s = (struct spitz_keyboard_s *)
qemu_mallocz(sizeof(struct spitz_keyboard_s));
memset(s, 0, sizeof(struct spitz_keyboard_s));
- s->cpu = cpu;
for (i = 0; i < 0x80; i ++)
s->keymap[i] = -1;
if (spitz_keymap[i][j] != -1)
s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
+ for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
+ s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]];
+
+ for (i = 0; i < 5; i ++)
+ s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]];
+
+ s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s,
+ SPITZ_KEY_STROBE_NUM);
for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
- pxa2xx_gpio_handler_set(cpu->gpio, spitz_gpio_key_strobe[i],
- (gpio_handler_t) spitz_keyboard_strobe, s);
+ pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]);
spitz_keyboard_pre_map(s);
qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s);
+
+ register_savevm("spitz_keyboard", 0, 0,
+ spitz_keyboard_save, spitz_keyboard_load, s);
}
/* SCOOP devices */
struct scoop_info_s {
target_phys_addr_t target_base;
+ qemu_irq handler[16];
+ qemu_irq *in;
uint16_t status;
uint16_t power;
uint32_t gpio_level;
uint32_t gpio_dir;
uint32_t prev_level;
- struct {
- gpio_handler_t fn;
- void *opaque;
- } handler[16];
uint16_t mcr;
uint16_t cdr;
for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {
bit = ffs(diff) - 1;
- if (s->handler[bit].fn)
- s->handler[bit].fn(bit, (level >> bit) & 1,
- s->handler[bit].opaque);
+ qemu_set_irq(s->handler[bit], (level >> bit) & 1);
}
s->prev_level = level;
scoop_writeb,
};
-static inline void scoop_gpio_set(struct scoop_info_s *s, int line, int level)
+static void scoop_gpio_set(void *opaque, int line, int level)
{
- if (line >= 16) {
- spitz_printf("No GPIO pin %i\n", line);
- return;
- }
+ struct scoop_info_s *s = (struct scoop_info_s *) s;
if (level)
s->gpio_level |= (1 << line);
s->gpio_level &= ~(1 << line);
}
-static inline void scoop_gpio_handler_set(struct scoop_info_s *s, int line,
- gpio_handler_t handler, void *opaque) {
+static inline qemu_irq *scoop_gpio_in_get(struct scoop_info_s *s)
+{
+ return s->in;
+}
+
+static inline void scoop_gpio_out_set(struct scoop_info_s *s, int line,
+ qemu_irq handler) {
if (line >= 16) {
spitz_printf("No GPIO pin %i\n", line);
return;
}
- s->handler[line].fn = handler;
- s->handler[line].opaque = opaque;
+ s->handler[line] = handler;
+}
+
+static void scoop_save(QEMUFile *f, void *opaque)
+{
+ struct scoop_info_s *s = (struct scoop_info_s *) opaque;
+ qemu_put_be16s(f, &s->status);
+ qemu_put_be16s(f, &s->power);
+ qemu_put_be32s(f, &s->gpio_level);
+ qemu_put_be32s(f, &s->gpio_dir);
+ qemu_put_be32s(f, &s->prev_level);
+ qemu_put_be16s(f, &s->mcr);
+ qemu_put_be16s(f, &s->cdr);
+ qemu_put_be16s(f, &s->ccr);
+ qemu_put_be16s(f, &s->irr);
+ qemu_put_be16s(f, &s->imr);
+ qemu_put_be16s(f, &s->isr);
+ qemu_put_be16s(f, &s->gprr);
+}
+
+static int scoop_load(QEMUFile *f, void *opaque, int version_id)
+{
+ struct scoop_info_s *s = (struct scoop_info_s *) opaque;
+ qemu_get_be16s(f, &s->status);
+ qemu_get_be16s(f, &s->power);
+ qemu_get_be32s(f, &s->gpio_level);
+ qemu_get_be32s(f, &s->gpio_dir);
+ qemu_get_be32s(f, &s->prev_level);
+ qemu_get_be16s(f, &s->mcr);
+ qemu_get_be16s(f, &s->cdr);
+ qemu_get_be16s(f, &s->ccr);
+ qemu_get_be16s(f, &s->irr);
+ qemu_get_be16s(f, &s->imr);
+ qemu_get_be16s(f, &s->isr);
+ qemu_get_be16s(f, &s->gprr);
+
+ return 0;
}
static struct scoop_info_s *spitz_scoop_init(struct pxa2xx_state_s *cpu,
s[0].status = 0x02;
s[1].status = 0x02;
+ s[0].in = qemu_allocate_irqs(scoop_gpio_set, &s[0], 16);
iomemtype = cpu_register_io_memory(0, scoop_readfn,
scoop_writefn, &s[0]);
- cpu_register_physical_memory(s[0].target_base, 0xfff, iomemtype);
+ cpu_register_physical_memory(s[0].target_base, 0x1000, iomemtype);
+ register_savevm("scoop", 0, 0, scoop_save, scoop_load, &s[0]);
if (count < 2)
return s;
+ s[1].in = qemu_allocate_irqs(scoop_gpio_set, &s[1], 16);
iomemtype = cpu_register_io_memory(0, scoop_readfn,
scoop_writefn, &s[1]);
- cpu_register_physical_memory(s[1].target_base, 0xfff, iomemtype);
+ cpu_register_physical_memory(s[1].target_base, 0x1000, iomemtype);
+ register_savevm("scoop", 1, 0, scoop_save, scoop_load, &s[1]);
return s;
}
spitz_printf("LCD Backlight now off\n");
}
-static void spitz_bl_bit5(int line, int level, void *opaque)
+static inline void spitz_bl_bit5(void *opaque, int line, int level)
{
int prev = bl_intensity;
spitz_bl_update((struct pxa2xx_state_s *) opaque);
}
-static void spitz_bl_power(int line, int level, void *opaque)
+static inline void spitz_bl_power(void *opaque, int line, int level)
{
bl_power = !!level;
spitz_bl_update((struct pxa2xx_state_s *) opaque);
max111x_write(max1111, value);
}
-static void corgi_ssp_gpio_cs(int line, int level, struct pxa2xx_state_s *s)
+static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
{
- if (line == SPITZ_GPIO_LCDCON_CS)
+ switch (line) {
+ case 0:
lcd_en = !level;
- else if (line == SPITZ_GPIO_ADS7846_CS)
+ break;
+ case 1:
ads_en = !level;
- else if (line == SPITZ_GPIO_MAX1111_CS)
+ break;
+ case 2:
max_en = !level;
+ break;
+ }
}
#define MAX1111_BATT_VOLT 1
#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
-static void spitz_adc_temp_on(int line, int level, void *opaque)
+static void spitz_adc_temp_on(void *opaque, int line, int level)
{
if (!max1111)
return;
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
}
-static void spitz_pendown_set(void *opaque, int line, int level)
+static void spitz_ssp_save(QEMUFile *f, void *opaque)
{
- struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
- pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_TP_INT, level);
+ qemu_put_be32(f, lcd_en);
+ qemu_put_be32(f, ads_en);
+ qemu_put_be32(f, max_en);
+ qemu_put_be32(f, bl_intensity);
+ qemu_put_be32(f, bl_power);
+}
+
+static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id)
+{
+ lcd_en = qemu_get_be32(f);
+ ads_en = qemu_get_be32(f);
+ max_en = qemu_get_be32(f);
+ bl_intensity = qemu_get_be32(f);
+ bl_power = qemu_get_be32(f);
+
+ return 0;
}
static void spitz_ssp_attach(struct pxa2xx_state_s *cpu)
{
+ qemu_irq *chipselects;
+
lcd_en = ads_en = max_en = 0;
- ads7846 = ads7846_init(qemu_allocate_irqs(spitz_pendown_set, cpu, 1)[0]);
+ ads7846 = ads7846_init(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]);
max1111 = max1111_init(0);
max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
pxa2xx_ssp_attach(cpu->ssp[CORGI_SSP_PORT - 1], corgi_ssp_read,
corgi_ssp_write, cpu);
- pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
- (gpio_handler_t) corgi_ssp_gpio_cs, cpu);
- pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
- (gpio_handler_t) corgi_ssp_gpio_cs, cpu);
- pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
- (gpio_handler_t) corgi_ssp_gpio_cs, cpu);
+ chipselects = qemu_allocate_irqs(corgi_ssp_gpio_cs, cpu, 3);
+ pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS, chipselects[0]);
+ pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS, chipselects[1]);
+ pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS, chipselects[2]);
bl_intensity = 0x20;
bl_power = 0;
+
+ register_savevm("spitz_ssp", 0, 0, spitz_ssp_save, spitz_ssp_load, cpu);
}
/* CF Microdrive */
static void spitz_microdrive_attach(struct pxa2xx_state_s *cpu)
{
struct pcmcia_card_s *md;
- BlockDriverState *bs = bs_table[0];
+ int index;
+ BlockDriverState *bs;
- if (bs && bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
+ index = drive_get_index(IF_IDE, 0, 0);
+ if (index == -1)
+ return;
+ bs = drives_table[index].bdrv;
+ if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
md = dscm1xxxx_init(bs);
- pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
+ pxa2xx_pcmcia_attach(cpu->pcmcia[1], md);
}
}
-/* Other peripherals */
+/* Wm8750 and Max7310 on I2C */
+
+#define AKITA_MAX_ADDR 0x18
+#define SPITZ_WM_ADDRL 0x1b
+#define SPITZ_WM_ADDRH 0x1a
+
+#define SPITZ_GPIO_WM 5
-static void spitz_charge_switch(int line, int level, void *opaque)
+#ifdef HAS_AUDIO
+static void spitz_wm8750_addr(void *opaque, int line, int level)
{
- spitz_printf("Charging %s.\n", level ? "off" : "on");
+ i2c_slave *wm = (i2c_slave *) opaque;
+ if (level)
+ i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
+ else
+ i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
}
+#endif
-static void spitz_discharge_switch(int line, int level, void *opaque)
+static void spitz_i2c_setup(struct pxa2xx_state_s *cpu)
{
- spitz_printf("Discharging %s.\n", level ? "on" : "off");
+ /* Attach the CPU on one end of our I2C bus. */
+ i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
+
+#ifdef HAS_AUDIO
+ AudioState *audio;
+ i2c_slave *wm;
+
+ audio = AUD_init();
+ if (!audio)
+ return;
+ /* Attach a WM8750 to the bus */
+ wm = wm8750_init(bus, audio);
+
+ spitz_wm8750_addr(wm, 0, 0);
+ pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM,
+ qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
+ /* .. and to the sound interface. */
+ cpu->i2s->opaque = wm;
+ cpu->i2s->codec_out = wm8750_dac_dat;
+ cpu->i2s->codec_in = wm8750_adc_dat;
+ wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
+#endif
}
-static void spitz_greenled_switch(int line, int level, void *opaque)
+static void spitz_akita_i2c_setup(struct pxa2xx_state_s *cpu)
{
- spitz_printf("Green LED %s.\n", level ? "on" : "off");
+ /* Attach a Max7310 to Akita I2C bus. */
+ i2c_set_slave_address(max7310_init(pxa2xx_i2c_bus(cpu->i2c[0])),
+ AKITA_MAX_ADDR);
}
-static void spitz_orangeled_switch(int line, int level, void *opaque)
+/* Other peripherals */
+
+static void spitz_out_switch(void *opaque, int line, int level)
{
- spitz_printf("Orange LED %s.\n", level ? "on" : "off");
+ switch (line) {
+ case 0:
+ spitz_printf("Charging %s.\n", level ? "off" : "on");
+ break;
+ case 1:
+ spitz_printf("Discharging %s.\n", level ? "on" : "off");
+ break;
+ case 2:
+ spitz_printf("Green LED %s.\n", level ? "on" : "off");
+ break;
+ case 3:
+ spitz_printf("Orange LED %s.\n", level ? "on" : "off");
+ break;
+ case 4:
+ spitz_bl_bit5(opaque, line, level);
+ break;
+ case 5:
+ spitz_bl_power(opaque, line, level);
+ break;
+ case 6:
+ spitz_adc_temp_on(opaque, line, level);
+ break;
+ }
}
#define SPITZ_SCP_LED_GREEN 1
static void spitz_scoop_gpio_setup(struct pxa2xx_state_s *cpu,
struct scoop_info_s *scp, int num)
{
- scoop_gpio_handler_set(&scp[0], SPITZ_SCP_CHRG_ON,
- spitz_charge_switch, cpu);
- scoop_gpio_handler_set(&scp[0], SPITZ_SCP_JK_B,
- spitz_discharge_switch, cpu);
- scoop_gpio_handler_set(&scp[0], SPITZ_SCP_LED_GREEN,
- spitz_greenled_switch, cpu);
- scoop_gpio_handler_set(&scp[0], SPITZ_SCP_LED_ORANGE,
- spitz_orangeled_switch, cpu);
+ qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
+
+ scoop_gpio_out_set(&scp[0], SPITZ_SCP_CHRG_ON, outsignals[0]);
+ scoop_gpio_out_set(&scp[0], SPITZ_SCP_JK_B, outsignals[1]);
+ scoop_gpio_out_set(&scp[0], SPITZ_SCP_LED_GREEN, outsignals[2]);
+ scoop_gpio_out_set(&scp[0], SPITZ_SCP_LED_ORANGE, outsignals[3]);
if (num >= 2) {
- scoop_gpio_handler_set(&scp[1], SPITZ_SCP2_BACKLIGHT_CONT,
- spitz_bl_bit5, cpu);
- scoop_gpio_handler_set(&scp[1], SPITZ_SCP2_BACKLIGHT_ON,
- spitz_bl_power, cpu);
+ scoop_gpio_out_set(&scp[1], SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
+ scoop_gpio_out_set(&scp[1], SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
}
- scoop_gpio_handler_set(&scp[0], SPITZ_SCP_ADC_TEMP_ON,
- spitz_adc_temp_on, cpu);
+ scoop_gpio_out_set(&scp[0], SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
}
#define SPITZ_GPIO_HSYNC 22
#define SPITZ_GPIO_CF2_IRQ 106
#define SPITZ_GPIO_CF2_CD 93
-int spitz_hsync;
+static int spitz_hsync;
-static void spitz_lcd_hsync_handler(void *opaque)
+static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
{
struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
- pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_HSYNC, spitz_hsync);
+ qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync);
spitz_hsync ^= 1;
}
-static void spitz_mmc_coverswitch_change(void *opaque, int in)
-{
- struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
- pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SD_DETECT, in);
-}
-
-static void spitz_mmc_writeprotect_change(void *opaque, int wp)
-{
- struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
- pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SD_WP, wp);
-}
-
-static void spitz_pcmcia_cb(void *opaque, int line, int level)
-{
- struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
- static const int gpio_map[] = {
- SPITZ_GPIO_CF1_IRQ, SPITZ_GPIO_CF1_CD,
- SPITZ_GPIO_CF2_IRQ, SPITZ_GPIO_CF2_CD,
- };
- pxa2xx_gpio_set(cpu->gpio, gpio_map[line], level);
-}
-
static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
{
- qemu_irq *pcmcia_cb;
+ qemu_irq lcd_hsync;
/*
* Bad hack: We toggle the LCD hsync GPIO on every GPIO status
* read to satisfy broken guests that poll-wait for hsync.
* wouldn't guarantee that a guest ever exits the loop.
*/
spitz_hsync = 0;
- pxa2xx_gpio_read_notifier(cpu->gpio, spitz_lcd_hsync_handler, cpu);
- pxa2xx_lcd_vsync_cb(cpu->lcd, spitz_lcd_hsync_handler, cpu);
+ lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
+ pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
+ pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
/* MMC/SD host */
- pxa2xx_mmci_handlers(cpu->mmc, cpu, spitz_mmc_writeprotect_change,
- spitz_mmc_coverswitch_change);
+ pxa2xx_mmci_handlers(cpu->mmc,
+ pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP],
+ pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]);
/* Battery lock always closed */
- pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_BAT_COVER, 1);
+ qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]);
/* Handle reset */
- pxa2xx_gpio_handler_set(cpu->gpio, SPITZ_GPIO_ON_RESET, pxa2xx_reset, cpu);
+ pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
/* PCMCIA signals: card's IRQ and Card-Detect */
- pcmcia_cb = qemu_allocate_irqs(spitz_pcmcia_cb, cpu, slots * 2);
if (slots >= 1)
- pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], pcmcia_cb[0], pcmcia_cb[1]);
+ pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
+ pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ],
+ pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]);
if (slots >= 2)
- pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1], pcmcia_cb[2], pcmcia_cb[3]);
+ pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
+ pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ],
+ pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]);
/* Initialise the screen rotation related signals */
spitz_gpio_invert[3] = 0; /* Always open */
} else { /* Portrait mode */
spitz_gpio_invert[4] = 1;
}
- pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SWA, spitz_gpio_invert[3]);
- pxa2xx_gpio_set(cpu->gpio, SPITZ_GPIO_SWB, spitz_gpio_invert[4]);
+ qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA],
+ spitz_gpio_invert[3]);
+ qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB],
+ spitz_gpio_invert[4]);
}
/* Write the bootloader parameters memory area. */
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
/* Setup CPU & memory */
- if (ram_size < spitz_ram + spitz_rom) {
+ if (ram_size < spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE) {
fprintf(stderr, "This platform requires %i bytes of memory\n",
- spitz_ram + spitz_rom);
+ spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE);
exit(1);
}
cpu = pxa270_init(spitz_ram, ds, cpu_model);
spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
+ spitz_i2c_setup(cpu);
+
+ if (model == akita)
+ spitz_akita_i2c_setup(cpu);
+
if (model == terrier)
- /* A 6.0 GB microdrive is permanently sitting in CF slot 0. */
+ /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
spitz_microdrive_attach(cpu);
else if (model != akita)
- /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
+ /* A 4.0 GB microdrive is permanently sitting in CF slot 1. */
spitz_microdrive_attach(cpu);
/* Setup initial (reset) machine state */
sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE);
}
-static void spitz_init(int ram_size, int vga_ram_size, int boot_device,
- DisplayState *ds, const char **fd_filename, int snapshot,
+static void spitz_init(int ram_size, int vga_ram_size,
+ const char *boot_device, DisplayState *ds,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
}
-static void borzoi_init(int ram_size, int vga_ram_size, int boot_device,
- DisplayState *ds, const char **fd_filename, int snapshot,
+static void borzoi_init(int ram_size, int vga_ram_size,
+ const char *boot_device, DisplayState *ds,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
}
-static void akita_init(int ram_size, int vga_ram_size, int boot_device,
- DisplayState *ds, const char **fd_filename, int snapshot,
+static void akita_init(int ram_size, int vga_ram_size,
+ const char *boot_device, DisplayState *ds,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
}
-static void terrier_init(int ram_size, int vga_ram_size, int boot_device,
- DisplayState *ds, const char **fd_filename, int snapshot,
+static void terrier_init(int ram_size, int vga_ram_size,
+ const char *boot_device, DisplayState *ds,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
projects / qemu / blobdiff