update

[qemu] / hw / openpic.c

diff --git a/hw/openpic.c b/hw/openpic.c
index d193cfe..08fb9bd 100644 (file)
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -320,8 +320,9 @@ static void openpic_update_irq(openpic_t *opp, int n_IRQ)
     }
 }
 
-void openpic_set_irq(openpic_t *opp, int n_IRQ, int level)
+void openpic_set_irq(void *opaque, int n_IRQ, int level)
 {
+    openpic_t *opp = opaque;
     IRQ_src_t *src;
 
     src = &opp->src[n_IRQ];
@@ -345,7 +346,7 @@ static void openpic_reset (openpic_t *opp)
     int i;
 
     opp->glbc = 0x80000000;
-    /* Initialise controler registers */
+    /* Initialise controller registers */
     opp->frep = ((EXT_IRQ - 1) << 16) | ((MAX_CPU - 1) << 8) | VID;
     opp->veni = VENI;
     opp->spve = 0x000000FF;
@@ -629,7 +630,7 @@ static void openpic_timer_write (void *opaque, uint32_t addr, uint32_t val)
         break;
     case 0x10: /* TIBC */
        if ((opp->timers[idx].ticc & 0x80000000) != 0 &&
-           (val & 0x800000000) == 0 &&
+           (val & 0x80000000) == 0 &&
             (opp->timers[idx].tibc & 0x80000000) != 0)
            opp->timers[idx].ticc &= ~0x80000000;
        opp->timers[idx].tibc = val;