*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
*
* *****************************************************************
*
switch ((addr - 0x100) % 0x20) {
case HPET_TN_CFG:
dprintf("qemu: hpet_ram_writel HPET_TN_CFG\n");
- timer->config = hpet_fixup_reg(new_val, old_val, 0x3e4e);
+ timer->config = hpet_fixup_reg(new_val, old_val,
+ HPET_TN_CFG_WRITE_MASK);
if (new_val & HPET_TN_32BIT) {
timer->cmp = (uint32_t)timer->cmp;
timer->period = (uint32_t)timer->period;
(timer->config & HPET_TN_SETVAL))
timer->cmp = (timer->cmp & 0xffffffff00000000ULL)
| new_val;
- else {
+ if (timer_is_periodic(timer)) {
/*
* FIXME: Clamp period to reasonable min value?
* Clamp period to reasonable max value
case HPET_ID:
return;
case HPET_CFG:
- s->config = hpet_fixup_reg(new_val, old_val, 0x3);
+ s->config = hpet_fixup_reg(new_val, old_val,
+ HPET_CFG_WRITE_MASK);
if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
/* Enable main counter and interrupt generation. */
s->hpet_offset = ticks_to_ns(s->hpet_counter)
}
hpet_reset(s);
register_savevm("hpet", -1, 1, hpet_save, hpet_load, s);
- qemu_register_reset(hpet_reset, s);
+ qemu_register_reset(hpet_reset, 0, s);
/* HPET Area */
iomemtype = cpu_register_io_memory(0, hpet_ram_read,
hpet_ram_write, s);