ptr += 8 * 12 + 4;
cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
}
+#elif defined (TARGET_MIPS)
+static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
+{
+ int i;
+ uint8_t *ptr;
+
+ ptr = mem_buf;
+ for (i = 0; i < 32; i++)
+ {
+ *(uint32_t *)ptr = tswapl(env->gpr[i]);
+ ptr += 4;
+ }
+
+ *(uint32_t *)ptr = tswapl(env->CP0_Status);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->LO);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->HI);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->CP0_Cause);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->PC);
+ ptr += 4;
+
+ /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
+
+ return ptr - mem_buf;
+}
+
+static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
+{
+ int i;
+ uint8_t *ptr;
+
+ ptr = mem_buf;
+ for (i = 0; i < 32; i++)
+ {
+ env->gpr[i] = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+ }
+
+ env->CP0_Status = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->LO = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->HI = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->CP0_Cause = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->PC = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+}
+#elif defined (TARGET_SH4)
+static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
+{
+ uint32_t *ptr = (uint32_t *)mem_buf;
+ int i;
+
+#define SAVE(x) *ptr++=tswapl(x)
+ for (i = 0; i < 16; i++) SAVE(env->gregs[i]);
+ SAVE (env->pc);
+ SAVE (env->pr);
+ SAVE (env->gbr);
+ SAVE (env->vbr);
+ SAVE (env->mach);
+ SAVE (env->macl);
+ SAVE (env->sr);
+ SAVE (0); /* TICKS */
+ SAVE (0); /* STALLS */
+ SAVE (0); /* CYCLES */
+ SAVE (0); /* INSTS */
+ SAVE (0); /* PLR */
+
+ return ((uint8_t *)ptr - mem_buf);
+}
+
+static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
+{
+ uint32_t *ptr = (uint32_t *)mem_buf;
+ int i;
+
+#define LOAD(x) (x)=*ptr++;
+ for (i = 0; i < 16; i++) LOAD(env->gregs[i]);
+ LOAD (env->pc);
+ LOAD (env->pr);
+ LOAD (env->gbr);
+ LOAD (env->vbr);
+ LOAD (env->mach);
+ LOAD (env->macl);
+ LOAD (env->sr);
+}
#else
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
{
env->npc = addr + 4;
#elif defined (TARGET_ARM)
env->regs[15] = addr;
+#elif defined (TARGET_SH4)
+ env->pc = addr;
#endif
}
#ifdef CONFIG_USER_ONLY
env->npc = addr + 4;
#elif defined (TARGET_ARM)
env->regs[15] = addr;
+#elif defined (TARGET_SH4)
+ env->pc = addr;
#endif
}
cpu_single_step(env, 1);
if (*p == ',')
p++;
len = strtoul(p, NULL, 16);
- if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0)
- memset(mem_buf, 0, len);
- memtohex(buf, mem_buf, len);
- put_packet(s, buf);
+ if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
+ put_packet (s, "E14");
+ } else {
+ memtohex(buf, mem_buf, len);
+ put_packet(s, buf);
+ }
break;
case 'M':
addr = strtoul(p, (char **)&p, 16);
if (reason == EXCP_DEBUG) {
tb_flush(s->env);
ret = SIGTRAP;
- }
- else
+ } else if (reason == EXCP_INTERRUPT) {
+ ret = SIGINT;
+ } else {
ret = 0;
+ }
snprintf(buf, sizeof(buf), "S%02x", ret);
put_packet(s, buf);
}