static int gdbserver_fd = -1;
typedef struct GDBState {
+ CPUState *env; /* current CPU */
enum RSState state; /* parsing state */
int fd;
char line_buf[4096];
memset (ptr, 0, 8 * 12 + 4);
ptr += 8 * 12 + 4;
/* CPSR (4 bytes). */
- *(uint32_t *)ptr = tswapl (env->cpsr);
+ *(uint32_t *)ptr = tswapl (cpsr_read(env));
ptr += 4;
return ptr - mem_buf;
}
/* Ignore FPA regs and scr. */
ptr += 8 * 12 + 4;
- env->cpsr = tswapl(*(uint32_t *)ptr);
+ cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
+}
+#elif defined (TARGET_MIPS)
+static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
+{
+ int i;
+ uint8_t *ptr;
+
+ ptr = mem_buf;
+ for (i = 0; i < 32; i++)
+ {
+ *(uint32_t *)ptr = tswapl(env->gpr[i]);
+ ptr += 4;
+ }
+
+ *(uint32_t *)ptr = tswapl(env->CP0_Status);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->LO);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->HI);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->CP0_BadVAddr);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->CP0_Cause);
+ ptr += 4;
+
+ *(uint32_t *)ptr = tswapl(env->PC);
+ ptr += 4;
+
+ /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
+
+ return ptr - mem_buf;
+}
+
+static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
+{
+ int i;
+ uint8_t *ptr;
+
+ ptr = mem_buf;
+ for (i = 0; i < 32; i++)
+ {
+ env->gpr[i] = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+ }
+
+ env->CP0_Status = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->LO = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->HI = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->CP0_BadVAddr = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->CP0_Cause = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
+
+ env->PC = tswapl(*(uint32_t *)ptr);
+ ptr += 4;
}
#else
static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
#elif defined (TARGET_SPARC)
env->pc = addr;
env->npc = addr + 4;
+#elif defined (TARGET_ARM)
+ env->regs[15] = addr;
#endif
}
#ifdef CONFIG_USER_ONLY
#elif defined (TARGET_SPARC)
env->pc = addr;
env->npc = addr + 4;
+#elif defined (TARGET_ARM)
+ env->regs[15] = addr;
#endif
}
cpu_single_step(env, 1);
if (*p == ',')
p++;
len = strtoul(p, NULL, 16);
- if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0)
- memset(mem_buf, 0, len);
- memtohex(buf, mem_buf, len);
- put_packet(s, buf);
+ if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
+ put_packet (s, "E14");
+ } else {
+ memtohex(buf, mem_buf, len);
+ put_packet(s, buf);
+ }
break;
case 'M':
addr = strtoul(p, (char **)&p, 16);
int ret;
/* disable single step if it was enable */
- cpu_single_step(cpu_single_env, 0);
+ cpu_single_step(s->env, 0);
if (reason == EXCP_DEBUG) {
- tb_flush(cpu_single_env);
+ tb_flush(s->env);
ret = SIGTRAP;
}
else
}
#endif
-static void gdb_read_byte(GDBState *s, CPUState *env, int ch)
+static void gdb_read_byte(GDBState *s, int ch)
{
+ CPUState *env = s->env;
int i, csum;
char reply[1];
int i;
for (i = 0; i < n; i++)
- gdb_read_byte (s, env, buf[i]);
+ gdb_read_byte (s, buf[i]);
}
else if (n == 0 || errno != EAGAIN)
{
vm_start();
} else {
for(i = 0; i < size; i++)
- gdb_read_byte(s, cpu_single_env, buf[i]);
+ gdb_read_byte(s, buf[i]);
}
}
return;
}
#endif
+ s->env = first_cpu; /* XXX: allow to change CPU */
s->fd = fd;
fcntl(fd, F_SETFL, O_NONBLOCK);