#include <unistd.h>
#include <fcntl.h>
-#include "config.h"
+#include "config-host.h"
/* elf format definitions. We use these macros to test the CPU to
allow cross compilation (this tool must be ran on the build
#define elf_check_arch(x) ( ((x) == EM_386) || ((x) == EM_486) )
#undef ELF_USES_RELOCA
+#elif defined(HOST_AMD64)
+
+#define ELF_CLASS ELFCLASS64
+#define ELF_ARCH EM_X86_64
+#define elf_check_arch(x) ((x) == EM_X86_64)
+#define ELF_USES_RELOCA
+
#elif defined(HOST_PPC)
#define ELF_CLASS ELFCLASS32
#define elf_check_arch(x) ((x) == EM_SPARCV9)
#define ELF_USES_RELOCA
+#elif defined(HOST_ARM)
+
+#define ELF_CLASS ELFCLASS32
+#define ELF_ARCH EM_ARM
+#define elf_check_arch(x) ((x) == EM_ARM)
+#define ELF_USES_RELOC
+
+#elif defined(HOST_M68K)
+
+#define ELF_CLASS ELFCLASS32
+#define ELF_ARCH EM_68K
+#define elf_check_arch(x) ((x) == EM_68K)
+#define ELF_USES_RELOCA
+
#else
#error unsupported CPU - please update the code
#endif
#define SHT_RELOC SHT_REL
#endif
-#include "thunk.h"
+#include "bswap.h"
+
+enum {
+ OUT_GEN_OP,
+ OUT_CODE,
+ OUT_INDEX_OP,
+};
/* all dynamically generated functions begin with this code */
#define OP_PREFIX "op_"
return 1;
}
+#ifdef HOST_ARM
+
+int arm_emit_ldr_info(const char *name, unsigned long start_offset,
+ FILE *outfile, uint8_t *p_start, uint8_t *p_end,
+ ELF_RELOC *relocs, int nb_relocs)
+{
+ uint8_t *p;
+ uint32_t insn;
+ int offset, min_offset, pc_offset, data_size;
+ uint8_t data_allocated[1024];
+ unsigned int data_index;
+
+ memset(data_allocated, 0, sizeof(data_allocated));
+
+ p = p_start;
+ min_offset = p_end - p_start;
+ while (p < p_start + min_offset) {
+ insn = get32((uint32_t *)p);
+ if ((insn & 0x0d5f0000) == 0x051f0000) {
+ /* ldr reg, [pc, #im] */
+ offset = insn & 0xfff;
+ if (!(insn & 0x00800000))
+ offset = -offset;
+ if ((offset & 3) !=0)
+ error("%s:%04x: ldr pc offset must be 32 bit aligned",
+ name, start_offset + p - p_start);
+ pc_offset = p - p_start + offset + 8;
+ if (pc_offset <= (p - p_start) ||
+ pc_offset >= (p_end - p_start))
+ error("%s:%04x: ldr pc offset must point inside the function code",
+ name, start_offset + p - p_start);
+ if (pc_offset < min_offset)
+ min_offset = pc_offset;
+ if (outfile) {
+ /* ldr position */
+ fprintf(outfile, " arm_ldr_ptr->ptr = gen_code_ptr + %d;\n",
+ p - p_start);
+ /* ldr data index */
+ data_index = ((p_end - p_start) - pc_offset - 4) >> 2;
+ fprintf(outfile, " arm_ldr_ptr->data_ptr = arm_data_ptr + %d;\n",
+ data_index);
+ fprintf(outfile, " arm_ldr_ptr++;\n");
+ if (data_index >= sizeof(data_allocated))
+ error("%s: too many data", name);
+ if (!data_allocated[data_index]) {
+ ELF_RELOC *rel;
+ int i, addend, type;
+ const char *sym_name, *p;
+ char relname[1024];
+
+ data_allocated[data_index] = 1;
+
+ /* data value */
+ addend = get32((uint32_t *)(p_start + pc_offset));
+ relname[0] = '\0';
+ for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
+ if (rel->r_offset == (pc_offset + start_offset)) {
+ sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
+ /* the compiler leave some unnecessary references to the code */
+ if (strstart(sym_name, "__op_param", &p)) {
+ snprintf(relname, sizeof(relname), "param%s", p);
+ } else {
+ snprintf(relname, sizeof(relname), "(long)(&%s)", sym_name);
+ }
+ type = ELF32_R_TYPE(rel->r_info);
+ if (type != R_ARM_ABS32)
+ error("%s: unsupported data relocation", name);
+ break;
+ }
+ }
+ fprintf(outfile, " arm_data_ptr[%d] = 0x%x",
+ data_index, addend);
+ if (relname[0] != '\0')
+ fprintf(outfile, " + %s", relname);
+ fprintf(outfile, ";\n");
+ }
+ }
+ }
+ p += 4;
+ }
+ data_size = (p_end - p_start) - min_offset;
+ if (data_size > 0 && outfile) {
+ fprintf(outfile, " arm_data_ptr += %d;\n", data_size >> 2);
+ }
+
+ /* the last instruction must be a mov pc, lr */
+ if (p == p_start)
+ goto arm_ret_error;
+ p -= 4;
+ insn = get32((uint32_t *)p);
+ if ((insn & 0xffff0000) != 0xe91b0000) {
+ arm_ret_error:
+ if (!outfile)
+ printf("%s: invalid epilog\n", name);
+ }
+ return p - p_start;
+}
+#endif
+
+
#define MAX_ARGS 3
/* generate op code */
start_offset = offset;
switch(ELF_ARCH) {
case EM_386:
+ case EM_X86_64:
{
int len;
len = p_end - p_start;
{
uint8_t *p;
p = p_end - 4;
+#if 0
+ /* XXX: check why it occurs */
if (p == p_start)
error("empty code for %s", name);
+#endif
if (get32((uint32_t *)p) != 0x6bfa8001)
error("ret expected at the end of %s", name);
copy_size = p - p_start;
case EM_SPARC:
case EM_SPARC32PLUS:
{
- uint32_t start_insn, end_insn1, end_insn2, skip_insn;
+ uint32_t start_insn, end_insn1, end_insn2;
uint8_t *p;
p = (void *)(p_end - 8);
if (p <= p_start)
} else {
error("No save at the beginning of %s", name);
}
-
+#if 0
/* Skip a preceeding nop, if present. */
if (p > p_start) {
skip_insn = get32((uint32_t *)(p - 0x4));
if (skip_insn == 0x01000000)
p -= 4;
}
-
+#endif
copy_size = p - p_start;
}
break;
copy_size = p - p_start;
}
break;
+#ifdef HOST_ARM
+ case EM_ARM:
+ if ((p_end - p_start) <= 16)
+ error("%s: function too small", name);
+ if (get32((uint32_t *)p_start) != 0xe1a0c00d ||
+ (get32((uint32_t *)(p_start + 4)) & 0xffff0000) != 0xe92d0000 ||
+ get32((uint32_t *)(p_start + 8)) != 0xe24cb004)
+ error("%s: invalid prolog", name);
+ p_start += 12;
+ start_offset += 12;
+ copy_size = arm_emit_ldr_info(name, start_offset, NULL, p_start, p_end,
+ relocs, nb_relocs);
+ break;
+#endif
+ case EM_68K:
+ {
+ uint8_t *p;
+ p = (void *)(p_end - 2);
+ if (p == p_start)
+ error("empty code for %s", name);
+ // remove NOP's, probably added for alignment
+ while ((get16((uint16_t *)p) == 0x4e71) &&
+ (p>p_start))
+ p -= 2;
+ if (get16((uint16_t *)p) != 0x4e75)
+ error("rts expected at the end of %s", name);
+ copy_size = p - p_start;
+ }
+ break;
default:
error("unknown ELF architecture");
}
for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
if (rel->r_offset >= start_offset &&
- rel->r_offset < start_offset + copy_size) {
+ rel->r_offset < start_offset + (p_end - p_start)) {
sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
if (strstart(sym_name, "__op_param", &p)) {
n = strtoul(p, NULL, 10);
for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
if (rel->r_offset >= start_offset &&
- rel->r_offset < start_offset + copy_size) {
+ rel->r_offset < start_offset + (p_end - p_start)) {
sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
if (*sym_name &&
!strstart(sym_name, "__op_param", NULL) &&
{
ElfW(Sym) *sym;
const char *sym_name, *p;
- target_ulong val;
+ unsigned long val;
int n;
for(i = 0, sym = symtab; i < nb_syms; i++, sym++) {
sym_name = strtab + sym->st_name;
if (strstart(sym_name, "__op_label", &p)) {
uint8_t *ptr;
- int addend;
unsigned long offset;
/* test if the variable refers to a label inside
if (!ptr)
error("__op_labelN in invalid section");
offset = sym->st_value;
- addend = 0;
+ val = *(unsigned long *)(ptr + offset);
#ifdef ELF_USES_RELOCA
{
int reloc_shndx, nb_relocs1, j;
rel = (ELF_RELOC *)sdata[reloc_shndx];
for(j = 0; j < nb_relocs1; j++) {
if (rel->r_offset == offset) {
- addend = rel->r_addend;
+ val = rel->r_addend;
break;
}
rel++;
}
}
#endif
- val = *(target_ulong *)(ptr + offset);
- val += addend;
if (val >= start_offset && val < start_offset + copy_size) {
n = strtol(p, NULL, 10);
- fprintf(outfile, " label_offsets[%d] = %d + (gen_code_ptr - gen_code_buf);\n", n, val - start_offset);
+ fprintf(outfile, " label_offsets[%d] = %ld + (gen_code_ptr - gen_code_buf);\n", n, val - start_offset);
}
}
}
if (rel->r_offset >= start_offset &&
rel->r_offset < start_offset + copy_size) {
sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
+ if (strstart(sym_name, "__op_jmp", &p)) {
+ int n;
+ n = strtol(p, NULL, 10);
+ /* __op_jmp relocations are done at
+ runtime to do translated block
+ chaining: the offset of the instruction
+ needs to be stored */
+ fprintf(outfile, " jmp_offsets[%d] = %d + (gen_code_ptr - gen_code_buf);\n",
+ n, rel->r_offset - start_offset);
+ continue;
+ }
+
if (strstart(sym_name, "__op_param", &p)) {
snprintf(name, sizeof(name), "param%s", p);
} else {
}
}
}
+#elif defined(HOST_AMD64)
+ {
+ char name[256];
+ int type;
+ int addend;
+ for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
+ if (rel->r_offset >= start_offset &&
+ rel->r_offset < start_offset + copy_size) {
+ sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
+ if (strstart(sym_name, "__op_param", &p)) {
+ snprintf(name, sizeof(name), "param%s", p);
+ } else {
+ snprintf(name, sizeof(name), "(long)(&%s)", sym_name);
+ }
+ type = ELF32_R_TYPE(rel->r_info);
+ addend = rel->r_addend;
+ switch(type) {
+ case R_X86_64_32:
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = (uint32_t)%s + %d;\n",
+ rel->r_offset - start_offset, name, addend);
+ break;
+ case R_X86_64_32S:
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = (int32_t)%s + %d;\n",
+ rel->r_offset - start_offset, name, addend);
+ break;
+ case R_X86_64_PC32:
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s - (long)(gen_code_ptr + %d) + %d;\n",
+ rel->r_offset - start_offset, name, rel->r_offset - start_offset, addend);
+ break;
+ default:
+ error("unsupported AMD64 relocation (%d)", type);
+ }
+ }
+ }
+ }
#elif defined(HOST_PPC)
{
char name[256];
}
}
}
+#elif defined(HOST_ARM)
+ {
+ char name[256];
+ int type;
+ int addend;
+
+ arm_emit_ldr_info(name, start_offset, outfile, p_start, p_end,
+ relocs, nb_relocs);
+
+ for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
+ if (rel->r_offset >= start_offset &&
+ rel->r_offset < start_offset + copy_size) {
+ sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
+ /* the compiler leave some unnecessary references to the code */
+ if (sym_name[0] == '\0')
+ continue;
+ if (strstart(sym_name, "__op_param", &p)) {
+ snprintf(name, sizeof(name), "param%s", p);
+ } else {
+ snprintf(name, sizeof(name), "(long)(&%s)", sym_name);
+ }
+ type = ELF32_R_TYPE(rel->r_info);
+ addend = get32((uint32_t *)(text + rel->r_offset));
+ switch(type) {
+ case R_ARM_ABS32:
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s + %d;\n",
+ rel->r_offset - start_offset, name, addend);
+ break;
+ case R_ARM_PC24:
+ fprintf(outfile, " arm_reloc_pc24((uint32_t *)(gen_code_ptr + %d), 0x%x, %s);\n",
+ rel->r_offset - start_offset, addend, name);
+ break;
+ default:
+ error("unsupported arm relocation (%d)", type);
+ }
+ }
+ }
+ }
+#elif defined(HOST_M68K)
+ {
+ char name[256];
+ int type;
+ int addend;
+ Elf32_Sym *sym;
+ for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
+ if (rel->r_offset >= start_offset &&
+ rel->r_offset < start_offset + copy_size) {
+ sym = &(symtab[ELFW(R_SYM)(rel->r_info)]);
+ sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
+ if (strstart(sym_name, "__op_param", &p)) {
+ snprintf(name, sizeof(name), "param%s", p);
+ } else {
+ snprintf(name, sizeof(name), "(long)(&%s)", sym_name);
+ }
+ type = ELF32_R_TYPE(rel->r_info);
+ addend = get32((uint32_t *)(text + rel->r_offset)) + rel->r_addend;
+ switch(type) {
+ case R_68K_32:
+ fprintf(outfile, " /* R_68K_32 RELOC, offset %x */\n", rel->r_offset) ;
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s + %#x;\n",
+ rel->r_offset - start_offset, name, addend );
+ break;
+ case R_68K_PC32:
+ fprintf(outfile, " /* R_68K_PC32 RELOC, offset %x */\n", rel->r_offset);
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s - (long)(gen_code_ptr + %#x) + %#x;\n",
+ rel->r_offset - start_offset, name, rel->r_offset - start_offset, /*sym->st_value+*/ addend);
+ break;
+ default:
+ error("unsupported m68k relocation (%d)", type);
+ }
+ }
+ }
+ }
#else
#error unsupported CPU
#endif
}
/* load an elf object file */
-int load_elf(const char *filename, FILE *outfile, int do_print_enum)
+int load_elf(const char *filename, FILE *outfile, int out_type)
{
int fd;
struct elf_shdr *sec, *symtab_sec, *strtab_sec, *text_sec;
}
}
- if (do_print_enum) {
+ if (out_type == OUT_INDEX_OP) {
fprintf(outfile, "DEF(end, 0, 0)\n");
+ fprintf(outfile, "DEF(nop, 0, 0)\n");
+ fprintf(outfile, "DEF(nop1, 1, 0)\n");
+ fprintf(outfile, "DEF(nop2, 2, 0)\n");
+ fprintf(outfile, "DEF(nop3, 3, 0)\n");
for(i = 0, sym = symtab; i < nb_syms; i++, sym++) {
const char *name, *p;
name = strtab + sym->st_name;
text, relocs, nb_relocs, 2);
}
}
+ } else if (out_type == OUT_GEN_OP) {
+ /* generate gen_xxx functions */
+
+ for(i = 0, sym = symtab; i < nb_syms; i++, sym++) {
+ const char *name;
+ name = strtab + sym->st_name;
+ if (strstart(name, OP_PREFIX, NULL)) {
+ if (sym->st_shndx != (text_sec - shdr))
+ error("invalid section for opcode (0x%x)", sym->st_shndx);
+ gen_code(name, sym->st_value, sym->st_size, outfile,
+ text, relocs, nb_relocs, 0);
+ }
+ }
+
} else {
/* generate big code generation switch */
-#ifdef HOST_ALPHA
-fprintf(outfile,
-"register int gp asm(\"$29\");\n"
-"static inline void immediate_ldah(void *p, int val) {\n"
-" uint32_t *dest = p;\n"
-" long high = ((val >> 16) + ((val >> 15) & 1)) & 0xffff;\n"
-"\n"
-" *dest &= ~0xffff;\n"
-" *dest |= high;\n"
-" *dest |= 31 << 16;\n"
-"}\n"
-"static inline void immediate_lda(void *dest, int val) {\n"
-" *(uint16_t *) dest = val;\n"
-"}\n"
-"void fix_bsr(void *p, int offset) {\n"
-" uint32_t *dest = p;\n"
-" *dest &= ~((1 << 21) - 1);\n"
-" *dest |= (offset >> 2) & ((1 << 21) - 1);\n"
-"}\n");
-#endif
fprintf(outfile,
"int dyngen_code(uint8_t *gen_code_buf,\n"
" uint16_t *label_offsets, uint16_t *jmp_offsets,\n"
"{\n"
" uint8_t *gen_code_ptr;\n"
" const uint16_t *opc_ptr;\n"
-" const uint32_t *opparam_ptr;\n"
+" const uint32_t *opparam_ptr;\n");
+
+#ifdef HOST_ARM
+fprintf(outfile,
+" uint8_t *last_gen_code_ptr = gen_code_buf;\n"
+" LDREntry *arm_ldr_ptr = arm_ldr_table;\n"
+" uint32_t *arm_data_ptr = arm_data_table;\n");
+#endif
+
+fprintf(outfile,
+"\n"
" gen_code_ptr = gen_code_buf;\n"
" opc_ptr = opc_buf;\n"
" opparam_ptr = opparam_buf;\n");
/* Generate prologue, if needed. */
- switch(ELF_ARCH) {
- case EM_SPARC:
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x9c23a080; /* sub %%sp, 128, %%sp */\n");
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0xbc27a080; /* sub %%fp, 128, %%fp */\n");
- break;
-
- case EM_SPARCV9:
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x9c23a100; /* sub %%sp, 256, %%sp */\n");
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0xbc27a100; /* sub %%fp, 256, %%fp */\n");
- break;
- };
fprintf(outfile,
" for(;;) {\n"
}
fprintf(outfile,
+" case INDEX_op_nop:\n"
+" break;\n"
+" case INDEX_op_nop1:\n"
+" opparam_ptr++;\n"
+" break;\n"
+" case INDEX_op_nop2:\n"
+" opparam_ptr += 2;\n"
+" break;\n"
+" case INDEX_op_nop3:\n"
+" opparam_ptr += 3;\n"
+" break;\n"
" default:\n"
" goto the_end;\n"
-" }\n"
+" }\n");
+
+#ifdef HOST_ARM
+/* generate constant table if needed */
+fprintf(outfile,
+" if ((gen_code_ptr - last_gen_code_ptr) >= (MAX_FRAG_SIZE - MAX_OP_SIZE)) {\n"
+" gen_code_ptr = arm_flush_ldr(gen_code_ptr, arm_ldr_table, arm_ldr_ptr, arm_data_table, arm_data_ptr, 1);\n"
+" last_gen_code_ptr = gen_code_ptr;\n"
+" arm_ldr_ptr = arm_ldr_table;\n"
+" arm_data_ptr = arm_data_table;\n"
+" }\n");
+#endif
+
+
+fprintf(outfile,
" }\n"
" the_end:\n"
);
-/* generate epilogue */
- switch(ELF_ARCH) {
- case EM_386:
- fprintf(outfile, "*gen_code_ptr++ = 0xc3; /* ret */\n");
- break;
- case EM_PPC:
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x4e800020; /* blr */\n");
- break;
- case EM_S390:
- fprintf(outfile, "*((uint16_t *)gen_code_ptr)++ = 0x07fe; /* br %%r14 */\n");
- break;
- case EM_ALPHA:
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x6bfa8001; /* ret */\n");
- break;
- case EM_IA_64:
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x00840008; /* br.ret.sptk.many b0;; */\n");
- break;
- case EM_SPARC:
- case EM_SPARC32PLUS:
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0xbc07a080; /* add %%fp, 256, %%fp */\n");
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x81c62008; /* jmpl %%i0 + 8, %%g0 */\n");
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x9c03a080; /* add %%sp, 256, %%sp */\n");
- break;
- case EM_SPARCV9:
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x81c7e008; /* ret */\n");
- fprintf(outfile, "*((uint32_t *)gen_code_ptr)++ = 0x81e80000; /* restore */\n");
- break;
- default:
- error("unknown ELF architecture");
- }
-
+/* generate some code patching */
+#ifdef HOST_ARM
+fprintf(outfile, "gen_code_ptr = arm_flush_ldr(gen_code_ptr, arm_ldr_table, arm_ldr_ptr, arm_data_table, arm_data_ptr, 0);\n");
+#endif
+ /* flush instruction cache */
+ fprintf(outfile, "flush_icache_range((unsigned long)gen_code_buf, (unsigned long)gen_code_ptr);\n");
+
fprintf(outfile, "return gen_code_ptr - gen_code_buf;\n");
fprintf(outfile, "}\n\n");
-/* generate gen_xxx functions */
-/* XXX: suppress the use of these functions to simplify code */
- for(i = 0, sym = symtab; i < nb_syms; i++, sym++) {
- const char *name;
- name = strtab + sym->st_name;
- if (strstart(name, OP_PREFIX, NULL)) {
- if (sym->st_shndx != (text_sec - shdr))
- error("invalid section for opcode (0x%x)", sym->st_shndx);
- gen_code(name, sym->st_value, sym->st_size, outfile,
- text, relocs, nb_relocs, 0);
- }
- }
}
close(fd);
"usage: dyngen [-o outfile] [-c] objfile\n"
"Generate a dynamic code generator from an object file\n"
"-c output enum of operations\n"
+ "-g output gen_op_xx() functions\n"
);
exit(1);
}
int main(int argc, char **argv)
{
- int c, do_print_enum;
+ int c, out_type;
const char *filename, *outfilename;
FILE *outfile;
outfilename = "out.c";
- do_print_enum = 0;
+ out_type = OUT_CODE;
for(;;) {
- c = getopt(argc, argv, "ho:c");
+ c = getopt(argc, argv, "ho:cg");
if (c == -1)
break;
switch(c) {
outfilename = optarg;
break;
case 'c':
- do_print_enum = 1;
+ out_type = OUT_INDEX_OP;
+ break;
+ case 'g':
+ out_type = OUT_GEN_OP;
break;
}
}
outfile = fopen(outfilename, "w");
if (!outfile)
error("could not open '%s'", outfilename);
- load_elf(filename, outfile, do_print_enum);
+ load_elf(filename, outfile, out_type);
fclose(outfile);
return 0;
}
projects / qemu / blobdiff