/* Actually, address between memaddr and memaddr + len was
out of bounds. */
(*info->fprintf_func) (info->stream,
- "Address 0x%llx is out of bounds.\n", memaddr);
+ "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}
/* This could be in a separate file, to save miniscule amounts of space
bfd_vma addr;
struct disassemble_info *info;
{
- (*info->fprintf_func) (info->stream, "0x%llx", addr);
+ (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}
/* Just return the given address. */
values:
i386 - nonzero means 16 bit code
arm - nonzero means thumb code
+ ppc - nonzero means little endian
other targets - unused
*/
void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
- if (cpu_single_env->msr[MSR_LE])
+ if (flags)
disasm_info.endian = BFD_ENDIAN_LITTLE;
#ifdef TARGET_PPC64
disasm_info.mach = bfd_mach_ppc64;
disasm_info.mach = bfd_mach_ppc;
#endif
print_insn = print_insn_ppc;
+#elif defined(TARGET_M68K)
+ print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
+#ifdef TARGET_WORDS_BIGENDIAN
print_insn = print_insn_big_mips;
#else
+ print_insn = print_insn_little_mips;
+#endif
+#elif defined(TARGET_M68K)
+ print_insn = print_insn_m68k;
+#elif defined(TARGET_SH4)
+ disasm_info.mach = bfd_mach_sh4;
+ print_insn = print_insn_sh;
+#else
fprintf(out, "0x" TARGET_FMT_lx
": Asm output not supported on this arch\n", code);
return;
print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
print_insn = print_insn_little_mips;
+#elif defined(__m68k__)
+ print_insn = print_insn_m68k;
#else
fprintf(out, "0x%lx: Asm output not supported on this arch\n",
(long) code);
for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
fprintf(out, "0x%08lx: ", pc);
#ifdef __arm__
- /* since data are included in the code, it is better to
+ /* since data is included in the code, it is better to
display code data too */
- if (is_host) {
- fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
- }
+ fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
#endif
count = print_insn(pc, &disasm_info);
fprintf(out, "\n");
void term_printf(const char *fmt, ...);
static int monitor_disas_is_physical;
+static CPUState *monitor_disas_env;
static int
monitor_read_memory (memaddr, myaddr, length, info)
if (monitor_disas_is_physical) {
cpu_physical_memory_rw(memaddr, myaddr, length, 0);
} else {
- cpu_memory_rw_debug(cpu_single_env, memaddr,myaddr, length, 0);
+ cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
}
return 0;
}
return 0;
}
-void monitor_disas(target_ulong pc, int nb_insn, int is_physical, int flags)
+void monitor_disas(CPUState *env,
+ target_ulong pc, int nb_insn, int is_physical, int flags)
{
int count, i;
struct disassemble_info disasm_info;
INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
+ monitor_disas_env = env;
monitor_disas_is_physical = is_physical;
disasm_info.read_memory_func = monitor_read_memory;
disasm_info.mach = bfd_mach_ppc;
#endif
print_insn = print_insn_ppc;
+#elif defined(TARGET_M68K)
+ print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
+#ifdef TARGET_WORDS_BIGENDIAN
print_insn = print_insn_big_mips;
#else
+ print_insn = print_insn_little_mips;
+#endif
+#elif defined(TARGET_M68K)
+ print_insn = print_insn_m68k;
+#else
term_printf("0x" TARGET_FMT_lx
": Asm output not supported on this arch\n", pc);
return;