native FPU support in code copy mode

[qemu] / cpu-all.h

diff --git a/cpu-all.h b/cpu-all.h
index a01818a..247674c 100644 (file)
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -56,6 +56,39 @@ typedef union {
 
 /* CPU memory access without any memory or io remapping */
 
+/*
+ * the generic syntax for the memory accesses is:
+ *
+ * load: ld{type}{sign}{size}{endian}_{access_type}(ptr)
+ *
+ * store: st{type}{size}{endian}_{access_type}(ptr, val)
+ *
+ * type is:
+ * (empty): integer access
+ *   f    : float access
+ * 
+ * sign is:
+ * (empty): for floats or 32 bit size
+ *   u    : unsigned
+ *   s    : signed
+ *
+ * size is:
+ *   b: 8 bits
+ *   w: 16 bits
+ *   l: 32 bits
+ *   q: 64 bits
+ * 
+ * endian is:
+ * (empty): target cpu endianness or 8 bit access
+ *   r    : reversed target cpu endianness (not implemented yet)
+ *   be   : big endian (not implemented yet)
+ *   le   : little endian (not implemented yet)
+ *
+ * access_type is:
+ *   raw    : host memory access
+ *   user   : user mode access using soft MMU
+ *   kernel : kernel mode access using soft MMU
+ */
 static inline int ldub_raw(void *ptr)
 {
     return *(uint8_t *)ptr;
@@ -195,20 +228,47 @@ static inline void stfq_raw(void *ptr, double v)
 
 static inline int lduw_raw(void *ptr)
 {
+#if defined(__i386__)
+    int val;
+    asm volatile ("movzwl %1, %0\n"
+                  "xchgb %b0, %h0\n"
+                  : "=q" (val)
+                  : "m" (*(uint16_t *)ptr));
+    return val;
+#else
     uint8_t *b = (uint8_t *) ptr;
-    return (b[0]<<8|b[1]);
+    return ((b[0] << 8) | b[1]);
+#endif
 }
 
 static inline int ldsw_raw(void *ptr)
 {
-    int8_t *b = (int8_t *) ptr;
-    return (b[0]<<8|b[1]);
+#if defined(__i386__)
+    int val;
+    asm volatile ("movzwl %1, %0\n"
+                  "xchgb %b0, %h0\n"
+                  : "=q" (val)
+                  : "m" (*(uint16_t *)ptr));
+    return (int16_t)val;
+#else
+    uint8_t *b = (uint8_t *) ptr;
+    return (int16_t)((b[0] << 8) | b[1]);
+#endif
 }
 
 static inline int ldl_raw(void *ptr)
 {
+#if defined(__i386__)
+    int val;
+    asm volatile ("movl %1, %0\n"
+                  "bswap %0\n"
+                  : "=r" (val)
+                  : "m" (*(uint32_t *)ptr));
+    return val;
+#else
     uint8_t *b = (uint8_t *) ptr;
-    return (b[0]<<24|b[1]<<16|b[2]<<8|b[3]);
+    return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];
+#endif
 }
 
 static inline uint64_t ldq_raw(void *ptr)
@@ -221,18 +281,32 @@ static inline uint64_t ldq_raw(void *ptr)
 
 static inline void stw_raw(void *ptr, int v)
 {
+#if defined(__i386__)
+    asm volatile ("xchgb %b0, %h0\n"
+                  "movw %w0, %1\n"
+                  : "=q" (v)
+                  : "m" (*(uint16_t *)ptr), "0" (v));
+#else
     uint8_t *d = (uint8_t *) ptr;
     d[0] = v >> 8;
     d[1] = v;
+#endif
 }
 
 static inline void stl_raw(void *ptr, int v)
 {
+#if defined(__i386__)
+    asm volatile ("bswap %0\n"
+                  "movl %0, %1\n"
+                  : "=r" (v)
+                  : "m" (*(uint32_t *)ptr), "0" (v));
+#else
     uint8_t *d = (uint8_t *) ptr;
     d[0] = v >> 24;
     d[1] = v >> 16;
     d[2] = v >> 8;
     d[3] = v;
+#endif
 }
 
 static inline void stq_raw(void *ptr, uint64_t v)
@@ -464,9 +538,11 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
 
 void cpu_abort(CPUState *env, const char *fmt, ...);
 extern CPUState *cpu_single_env;
+extern int code_copy_enabled;
 
-#define CPU_INTERRUPT_EXIT 0x01 /* wants exit from main loop */
-#define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */
+#define CPU_INTERRUPT_EXIT   0x01 /* wants exit from main loop */
+#define CPU_INTERRUPT_HARD   0x02 /* hardware interrupt pending */
+#define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
 void cpu_interrupt(CPUState *s, int mask);
 
 int cpu_breakpoint_insert(CPUState *env, uint32_t pc);
@@ -523,10 +599,21 @@ int cpu_register_io_memory(int io_index,
                            CPUReadMemoryFunc **mem_read,
                            CPUWriteMemoryFunc **mem_write);
 
-void cpu_physical_memory_rw(CPUState *env, uint8_t *buf, target_ulong addr, 
+void cpu_physical_memory_rw(target_ulong addr, uint8_t *buf,
                             int len, int is_write);
-int cpu_memory_rw_debug(CPUState *env, 
-                        uint8_t *buf, target_ulong addr, int len, int is_write);
+static inline void cpu_physical_memory_read(target_ulong addr, uint8_t *buf,
+                                            int len)
+{
+    cpu_physical_memory_rw(addr, buf, len, 0);
+}
+static inline void cpu_physical_memory_write(target_ulong addr, const uint8_t *buf,
+                                            int len)
+{
+    cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
+}
+
+int cpu_memory_rw_debug(CPUState *env, target_ulong addr, 
+                        uint8_t *buf, int len, int is_write);
 
 /* read dirty bit (return 0 or 1) */
 static inline int cpu_physical_memory_is_dirty(target_ulong addr)