+/* vga.c */
+
+#define VGA_RAM_SIZE (8192 * 1024)
+
+typedef struct DisplayState {
+ uint8_t *data;
+ int linesize;
+ int depth;
+ void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
+ void (*dpy_resize)(struct DisplayState *s, int w, int h);
+ void (*dpy_refresh)(struct DisplayState *s);
+} DisplayState;
+
+static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
+{
+ s->dpy_update(s, x, y, w, h);
+}
+
+static inline void dpy_resize(DisplayState *s, int w, int h)
+{
+ s->dpy_resize(s, w, h);
+}
+
+int vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
+void vga_update_display(void);
+
+/* sdl.c */
+void sdl_display_init(DisplayState *ds);
+
+/* ide.c */
+#define MAX_DISKS 4
+
+extern BlockDriverState *bs_table[MAX_DISKS];
+
+void ide_init(void);
+void ide_set_geometry(int n, int cyls, int heads, int secs);
+void ide_set_cdrom(int n, int is_cdrom);
+
+/* oss.c */
+typedef enum {
+ AUD_FMT_U8,
+ AUD_FMT_S8,
+ AUD_FMT_U16,
+ AUD_FMT_S16
+} audfmt_e;
+
+void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt);
+void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt);
+int AUD_write (void *in_buf, int size);
+void AUD_run (void);
+void AUD_adjust_estimate (int _leftover);
+int AUD_get_free (void);
+int AUD_get_live (void);
+int AUD_get_buffer_size (void);
+void AUD_init (void);
+
+/* dma.c */
+typedef int (*DMA_read_handler) (uint32_t addr, int size, int *irq);
+typedef int (*DMA_misc_handler) (int);
+
+int DMA_get_channel_mode (int nchan);
+void DMA_hold_DREQ (int nchan);
+void DMA_release_DREQ (int nchan);
+void DMA_run (void);
+void DMA_init (void);
+void DMA_register_channel (int nchan,
+ DMA_read_handler read_handler,
+ DMA_misc_handler misc_handler);
+
+/* sb16.c */
+void SB16_run (void);
+void SB16_init (void);
+