2 * Copyright (C) 2005-2007 by Texas Instruments
3 * Some code has been taken from tusb6010.c
4 * Copyrights for that are attributable to:
5 * Copyright (C) 2006 Nokia Corporation
6 * Jarkko Nikula <jarkko.nikula@nokia.com>
7 * Tony Lindgren <tony@atomide.com>
9 * This file is part of the Inventra Controller Driver for Linux.
11 * The Inventra Controller Driver for Linux is free software; you
12 * can redistribute it and/or modify it under the terms of the GNU
13 * General Public License version 2 as published by the Free Software
16 * The Inventra Controller Driver for Linux is distributed in
17 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
18 * without even the implied warranty of MERCHANTABILITY or
19 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
20 * License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with The Inventra Controller Driver for Linux ; if not,
24 * write to the Free Software Foundation, Inc., 59 Temple Place,
25 * Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/module.h>
29 #include <linux/kernel.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/init.h>
33 #include <linux/list.h>
34 #include <linux/clk.h>
37 #include <asm/mach-types.h>
38 #include <mach/hardware.h>
41 #include <linux/i2c/twl4030.h>
43 #include "musb_core.h"
46 #ifdef CONFIG_ARCH_OMAP3430
47 #define get_cpu_rev() 2
50 #define MUSB_TIMEOUT_A_WAIT_BCON 1100
52 static struct timer_list musb_idle_timer;
54 static void musb_vbus_work(struct work_struct *data)
56 struct musb *musb = container_of(data, struct musb, vbus_work);
57 u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
59 /* clear/set requirements for musb to work with DPS on omap3 */
60 if (musb->board && musb->board->set_pm_limits && !musb->is_charger)
61 musb->board->set_pm_limits(musb->controller,
62 (devctl & MUSB_DEVCTL_VBUS));
65 static void musb_do_idle(unsigned long _musb)
67 struct musb *musb = (void *)_musb;
69 #ifdef CONFIG_USB_MUSB_HDRC_HCD
74 spin_lock_irqsave(&musb->lock, flags);
76 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
78 switch (musb->xceiv->state) {
79 case OTG_STATE_A_WAIT_BCON:
80 if(host_mode(musb->mregs))
81 break; /*Don't time out*/
83 devctl &= ~MUSB_DEVCTL_SESSION;
84 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
86 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
87 if (!host_mode(musb->mregs)) {
88 musb->xceiv->state = OTG_STATE_B_IDLE;
91 musb->xceiv->state = OTG_STATE_A_IDLE;
95 #ifdef CONFIG_USB_MUSB_HDRC_HCD
96 case OTG_STATE_A_SUSPEND:
97 /* finish RESUME signaling? */
98 if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
99 power = musb_readb(musb->mregs, MUSB_POWER);
100 power &= ~MUSB_POWER_RESUME;
101 DBG(1, "root port resume stopped, power %02x\n", power);
102 musb_writeb(musb->mregs, MUSB_POWER, power);
104 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
105 | MUSB_PORT_STAT_RESUME);
106 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
107 usb_hcd_poll_rh_status(musb_to_hcd(musb));
108 /* NOTE: it might really be A_WAIT_BCON ... */
109 musb->xceiv->state = OTG_STATE_A_HOST;
113 #ifdef CONFIG_USB_MUSB_HDRC_HCD
114 case OTG_STATE_A_HOST:
117 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
118 if (!host_mode(musb->mregs))
119 musb->xceiv->state = OTG_STATE_B_IDLE;
120 /*Don't time out if host*/
122 // musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
127 spin_unlock_irqrestore(&musb->lock, flags);
131 void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
133 unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
134 static unsigned long last_timer;
137 timeout = default_timeout;
139 /* Never idle if active, or when VBUS timeout is not set as host */
140 if (musb->is_active || ((musb->a_wait_bcon == 0)
141 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
142 DBG(6, "%s active, deleting timer\n", otg_state_string(musb));
143 del_timer(&musb_idle_timer);
144 last_timer = jiffies;
148 if (time_after(last_timer, timeout)) {
149 if (!timer_pending(&musb_idle_timer))
150 last_timer = timeout;
152 DBG(6, "Longer idle timer already pending, ignoring\n");
156 last_timer = timeout;
158 DBG(6, "%s inactive, for idle timer for %lu ms\n",
159 otg_state_string(musb),
160 (unsigned long)jiffies_to_msecs(timeout - jiffies));
161 mod_timer(&musb_idle_timer, timeout);
164 void musb_platform_enable(struct musb *musb)
166 twl4030_upd_usb_suspended(0);
168 void musb_platform_disable(struct musb *musb)
170 twl4030_upd_usb_suspended(musb->is_suspended);
172 static void omap_vbus_power(struct musb *musb, int is_on, int sleeping)
176 static void omap_set_vbus(struct musb *musb, int is_on)
179 /* HDRC controls CPEN, but beware current surges during device
180 * connect. They can trigger transient overcurrent conditions
181 * that must be ignored.
184 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
188 musb->xceiv->default_a = 1;
189 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
190 devctl |= MUSB_DEVCTL_SESSION;
193 if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) {
194 /*Power is already applied. Skip VRISE and go directly to BCON.*/
195 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
202 /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
203 * jumping right to B_IDLE...
206 musb->xceiv->default_a = 0;
207 musb->xceiv->state = OTG_STATE_B_IDLE;
208 devctl &= ~MUSB_DEVCTL_SESSION;
212 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
214 DBG(1, "VBUS %s, devctl %02x "
215 /* otg %3x conf %08x prcm %08x */ "\n",
216 otg_state_string(musb),
217 musb_readb(musb->mregs, MUSB_DEVCTL));
219 static int omap_set_power(struct otg_transceiver *x, unsigned mA)
224 static int musb_platform_resume(struct musb *musb);
226 int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
229 struct usb_bus *host;
230 u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
232 devctl |= MUSB_DEVCTL_SESSION;
233 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
236 #ifdef CONFIG_USB_MUSB_HDRC_HCD
238 hcd = musb_to_hcd(musb);
239 host = hcd_to_bus(hcd);
241 otg_set_host(musb->xceiv, host);
244 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
245 case MUSB_PERIPHERAL:
246 otg_set_peripheral(musb->xceiv, &musb->g);
249 #ifdef CONFIG_USB_MUSB_OTG
259 int __init musb_platform_init(struct musb *musb)
261 struct otg_transceiver *x = otg_get_transceiver();
264 #if defined(CONFIG_ARCH_OMAP2430)
265 omap_cfg_reg(AE5_2430_USB0HS_STP);
268 musb->suspendm = true;
270 musb_platform_resume(musb);
272 l = omap_readl(OTG_SYSCONFIG);
273 l &= ~ENABLEWAKEUP; /* disable wakeup */
274 l &= ~NOSTDBY; /* remove possible nostdby */
275 l |= SMARTSTDBY; /* enable smart standby */
276 l &= ~AUTOIDLE; /* disable auto idle */
277 l &= ~NOIDLE; /* remove possible noidle */
278 l |= SMARTIDLE; /* enable smart idle */
280 * MUSB AUTOIDLE don't work in 3430.
281 * Workaround by Richard Woodruff/TI
283 if (!cpu_is_omap3430())
284 l |= AUTOIDLE; /* enable auto idle */
285 omap_writel(l, OTG_SYSCONFIG);
287 l = omap_readl(OTG_INTERFSEL);
289 omap_writel(l, OTG_INTERFSEL);
291 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
292 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
293 omap_readl(OTG_REVISION), omap_readl(OTG_SYSCONFIG),
294 omap_readl(OTG_SYSSTATUS), omap_readl(OTG_INTERFSEL),
295 omap_readl(OTG_SIMENABLE));
297 omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
299 if (is_host_enabled(musb))
300 musb->board_set_vbus = omap_set_vbus;
301 if (is_peripheral_enabled(musb))
302 musb->xceiv->set_power = omap_set_power;
303 musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
305 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
306 INIT_WORK(&musb->vbus_work, musb_vbus_work);
311 int musb_platform_suspend(struct musb *musb)
319 l = omap_readl(OTG_FORCESTDBY);
320 l |= ENABLEFORCE; /* enable MSTANDBY */
321 omap_writel(l, OTG_FORCESTDBY);
323 l = omap_readl(OTG_SYSCONFIG);
324 l |= ENABLEWAKEUP; /* enable wakeup */
325 omap_writel(l, OTG_SYSCONFIG);
327 if (musb->xceiv->set_suspend)
328 musb->xceiv->set_suspend(musb->xceiv, 1);
331 musb->set_clock(musb->clock, 0);
333 clk_disable(musb->clock);
338 static int musb_platform_resume(struct musb *musb)
345 if (musb->xceiv->set_suspend)
346 musb->xceiv->set_suspend(musb->xceiv, 0);
349 musb->set_clock(musb->clock, 1);
351 clk_enable(musb->clock);
353 l = omap_readl(OTG_SYSCONFIG);
354 l &= ~ENABLEWAKEUP; /* disable wakeup */
355 omap_writel(l, OTG_SYSCONFIG);
357 l = omap_readl(OTG_FORCESTDBY);
358 l &= ~ENABLEFORCE; /* disable MSTANDBY */
359 omap_writel(l, OTG_FORCESTDBY);
365 int musb_platform_exit(struct musb *musb)
368 omap_vbus_power(musb, 0 /*off*/, 1);
370 musb_platform_suspend(musb);
372 clk_put(musb->clock);
380 void musb_save_ctx_and_suspend(struct usb_gadget *gadget, int overwrite)
382 struct musb *musb = gadget_to_musb(gadget);
387 spin_lock_irqsave(&musb->lock, flags);
389 /* Save register context */
391 spin_unlock_irqrestore(&musb->lock, flags);
393 DBG(3, "allow sleep\n");
394 /* Do soft reset. This needs to be done with broken AUTOIDLE */
395 tmo = jiffies + msecs_to_jiffies(300);
396 omap_writel(SOFTRST, OTG_SYSCONFIG);
397 while (!omap_readl(OTG_SYSSTATUS)) {
398 if (time_after(jiffies, tmo)) {
399 WARN(1, "musb failed to recover from reset!");
404 l = omap_readl(OTG_FORCESTDBY);
405 l |= ENABLEFORCE; /* enable MSTANDBY */
406 omap_writel(l, OTG_FORCESTDBY);
408 l = ENABLEWAKEUP; /* enable wakeup */
409 omap_writel(l, OTG_SYSCONFIG);
410 /* Use AUTOIDLE here or the device may fail to hit sleep */
412 omap_writel(l, OTG_SYSCONFIG);
414 if (musb->board && musb->board->xceiv_power)
415 musb->board->xceiv_power(0);
416 /* Now it's safe to get rid of the buggy AUTOIDLE */
418 omap_writel(l, OTG_SYSCONFIG);
420 musb->is_charger = 0;
422 /* clear constraints */
423 if (musb->board && musb->board->set_pm_limits)
424 musb->board->set_pm_limits(musb->controller, 0);
426 EXPORT_SYMBOL_GPL(musb_save_ctx_and_suspend);
428 void musb_restore_ctx_and_resume(struct usb_gadget *gadget)
430 struct musb *musb = gadget_to_musb(gadget);
435 DBG(3, "restoring register context for %s\n","musb_restore_ctx_and_resume");
437 if (musb->board && musb->board->xceiv_power)
438 musb->board->xceiv_power(1);
440 spin_lock_irqsave(&musb->lock, flags);
442 musb->set_clock(musb->clock, 1);
444 clk_enable(musb->clock);
446 if(host_mode(musb->mregs)) {
447 musb_force_term(musb->mregs,MUSB_TERM_HOST_FULLSPEED);
448 r = musb_ulpi_readb(musb->mregs,ISP1704_FUNC_CTRL);
450 /* Recover OTG control */
451 r = musb_ulpi_readb(musb->mregs, ISP1704_OTG_CTRL);
452 r |= ISP1704_OTG_CTRL_IDPULLUP | ISP1704_OTG_CTRL_DP_PULLDOWN;
453 musb_ulpi_writeb(musb->mregs, ISP1704_OTG_CTRL, r);
454 r = ISP1704_FUNC_CTRL_FULL_SPEED;
456 /* Recover FUNC control */
457 r |= ISP1704_FUNC_CTRL_SUSPENDM | ISP1704_FUNC_CTRL_RESET;
458 musb_ulpi_writeb(musb->mregs, ISP1704_FUNC_CTRL, r);
460 l = omap_readl(OTG_SYSCONFIG);
461 l &= ~ENABLEWAKEUP; /* disable wakeup */
462 omap_writel(l, OTG_SYSCONFIG);
464 l = omap_readl(OTG_FORCESTDBY);
465 l &= ~ENABLEFORCE; /* disable MSTANDBY */
466 omap_writel(l, OTG_FORCESTDBY);
468 l = omap_readl(OTG_SYSCONFIG);
469 l &= ~ENABLEWAKEUP; /* disable wakeup */
470 l &= ~NOSTDBY; /* remove possible nostdby */
471 l |= SMARTSTDBY; /* enable smart standby */
472 l &= ~AUTOIDLE; /* disable auto idle */
473 l &= ~NOIDLE; /* remove possible noidle */
474 l |= SMARTIDLE; /* enable smart idle */
475 omap_writel(l, OTG_SYSCONFIG);
477 l = omap_readl(OTG_INTERFSEL);
479 omap_writel(l, OTG_INTERFSEL);
481 /* Restore register context */
482 musb_restore_ctx(musb);
484 /* set constraints */
485 schedule_work(&musb->vbus_work);
486 spin_unlock_irqrestore(&musb->lock, flags);
488 EXPORT_SYMBOL_GPL(musb_restore_ctx_and_resume);