2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
38 static const int tcg_target_reg_alloc_order[] = {
48 static const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX };
49 static const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX };
51 static uint8_t *tb_ret_addr;
53 static void patch_reloc(uint8_t *code_ptr, int type,
54 tcg_target_long value, tcg_target_long addend)
59 *(uint32_t *)code_ptr = value;
62 *(uint32_t *)code_ptr = value - (long)code_ptr;
69 /* maximum number of register used for input function arguments */
70 static inline int tcg_target_get_call_iarg_regs_count(int flags)
72 flags &= TCG_CALL_TYPE_MASK;
74 case TCG_CALL_TYPE_STD:
76 case TCG_CALL_TYPE_REGPARM_1:
77 case TCG_CALL_TYPE_REGPARM_2:
78 case TCG_CALL_TYPE_REGPARM:
79 return flags - TCG_CALL_TYPE_REGPARM_1 + 1;
85 /* parse target specific constraints */
86 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
94 tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX);
98 tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX);
101 ct->ct |= TCG_CT_REG;
102 tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX);
105 ct->ct |= TCG_CT_REG;
106 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX);
109 ct->ct |= TCG_CT_REG;
110 tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI);
113 ct->ct |= TCG_CT_REG;
114 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI);
117 ct->ct |= TCG_CT_REG;
118 tcg_regset_set32(ct->u.regs, 0, 0xf);
121 ct->ct |= TCG_CT_REG;
122 tcg_regset_set32(ct->u.regs, 0, 0xff);
125 /* qemu_ld/st address constraint */
127 ct->ct |= TCG_CT_REG;
128 tcg_regset_set32(ct->u.regs, 0, 0xff);
129 tcg_regset_reset_reg(ct->u.regs, TCG_REG_EAX);
130 tcg_regset_reset_reg(ct->u.regs, TCG_REG_EDX);
140 /* test if a constant matches the constraint */
141 static inline int tcg_target_const_match(tcg_target_long val,
142 const TCGArgConstraint *arg_ct)
146 if (ct & TCG_CT_CONST)
183 #define P_EXT 0x100 /* 0x0f opcode prefix */
185 static const uint8_t tcg_cond_to_jcc[10] = {
186 [TCG_COND_EQ] = JCC_JE,
187 [TCG_COND_NE] = JCC_JNE,
188 [TCG_COND_LT] = JCC_JL,
189 [TCG_COND_GE] = JCC_JGE,
190 [TCG_COND_LE] = JCC_JLE,
191 [TCG_COND_GT] = JCC_JG,
192 [TCG_COND_LTU] = JCC_JB,
193 [TCG_COND_GEU] = JCC_JAE,
194 [TCG_COND_LEU] = JCC_JBE,
195 [TCG_COND_GTU] = JCC_JA,
198 static inline void tcg_out_opc(TCGContext *s, int opc)
205 static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm)
208 tcg_out8(s, 0xc0 | (r << 3) | rm);
211 /* rm == -1 means no register index */
212 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm,
217 tcg_out8(s, 0x05 | (r << 3));
218 tcg_out32(s, offset);
219 } else if (offset == 0 && rm != TCG_REG_EBP) {
220 if (rm == TCG_REG_ESP) {
221 tcg_out8(s, 0x04 | (r << 3));
224 tcg_out8(s, 0x00 | (r << 3) | rm);
226 } else if ((int8_t)offset == offset) {
227 if (rm == TCG_REG_ESP) {
228 tcg_out8(s, 0x44 | (r << 3));
231 tcg_out8(s, 0x40 | (r << 3) | rm);
235 if (rm == TCG_REG_ESP) {
236 tcg_out8(s, 0x84 | (r << 3));
239 tcg_out8(s, 0x80 | (r << 3) | rm);
241 tcg_out32(s, offset);
245 static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
248 tcg_out_modrm(s, 0x8b, ret, arg);
251 static inline void tcg_out_movi(TCGContext *s, TCGType type,
252 int ret, int32_t arg)
256 tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret);
258 tcg_out8(s, 0xb8 + ret);
263 static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
264 int arg1, tcg_target_long arg2)
267 tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2);
270 static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
271 int arg1, tcg_target_long arg2)
274 tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2);
277 static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val)
279 if (val == (int8_t)val) {
280 tcg_out_modrm(s, 0x83, c, r0);
283 tcg_out_modrm(s, 0x81, c, r0);
288 static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
291 tgen_arithi(s, ARITH_ADD, reg, val);
294 static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
297 TCGLabel *l = &s->labels[label_index];
300 val = l->u.value - (tcg_target_long)s->code_ptr;
302 if ((int8_t)val1 == val1) {
306 tcg_out8(s, 0x70 + opc);
311 tcg_out32(s, val - 5);
314 tcg_out8(s, 0x80 + opc);
315 tcg_out32(s, val - 6);
323 tcg_out8(s, 0x80 + opc);
325 tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4);
330 static void tcg_out_brcond(TCGContext *s, int cond,
331 TCGArg arg1, TCGArg arg2, int const_arg2,
337 tcg_out_modrm(s, 0x85, arg1, arg1);
339 tgen_arithi(s, ARITH_CMP, arg1, arg2);
342 tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3), arg2, arg1);
344 tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
347 /* XXX: we implement it at the target level to avoid having to
348 handle cross basic blocks temporaries */
349 static void tcg_out_brcond2(TCGContext *s,
350 const TCGArg *args, const int *const_args)
353 label_next = gen_new_label();
356 tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next);
357 tcg_out_brcond(s, TCG_COND_EQ, args[1], args[3], const_args[3], args[5]);
360 tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], args[5]);
361 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], args[5]);
364 tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
365 tcg_out_jxx(s, JCC_JNE, label_next);
366 tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
369 tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
370 tcg_out_jxx(s, JCC_JNE, label_next);
371 tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
374 tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
375 tcg_out_jxx(s, JCC_JNE, label_next);
376 tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
379 tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
380 tcg_out_jxx(s, JCC_JNE, label_next);
381 tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
384 tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
385 tcg_out_jxx(s, JCC_JNE, label_next);
386 tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
389 tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
390 tcg_out_jxx(s, JCC_JNE, label_next);
391 tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
394 tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
395 tcg_out_jxx(s, JCC_JNE, label_next);
396 tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
399 tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
400 tcg_out_jxx(s, JCC_JNE, label_next);
401 tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
406 tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr);
409 #if defined(CONFIG_SOFTMMU)
411 #include "../../softmmu_defs.h"
413 static void *qemu_ld_helpers[4] = {
420 static void *qemu_st_helpers[4] = {
428 /* XXX: qemu_ld and qemu_st could be modified to clobber only EDX and
429 EAX. It will be useful once fixed registers globals are less
431 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
434 int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
435 #if defined(CONFIG_SOFTMMU)
436 uint8_t *label1_ptr, *label2_ptr;
438 #if TARGET_LONG_BITS == 64
439 #if defined(CONFIG_SOFTMMU)
451 #if TARGET_LONG_BITS == 64
460 #if defined(CONFIG_SOFTMMU)
461 tcg_out_mov(s, r1, addr_reg);
463 tcg_out_mov(s, r0, addr_reg);
465 tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
466 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
468 tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
469 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
471 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
472 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
474 tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
475 tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
476 tcg_out8(s, (5 << 3) | r1);
477 tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_read));
480 tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
482 tcg_out_mov(s, r0, addr_reg);
484 #if TARGET_LONG_BITS == 32
486 tcg_out8(s, 0x70 + JCC_JE);
487 label1_ptr = s->code_ptr;
491 tcg_out8(s, 0x70 + JCC_JNE);
492 label3_ptr = s->code_ptr;
495 /* cmp 4(r1), addr_reg2 */
496 tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
499 tcg_out8(s, 0x70 + JCC_JE);
500 label1_ptr = s->code_ptr;
504 *label3_ptr = s->code_ptr - label3_ptr - 1;
507 /* XXX: move that code at the end of the TB */
508 #if TARGET_LONG_BITS == 32
509 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
511 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
512 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
515 tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] -
516 (tcg_target_long)s->code_ptr - 4);
521 tcg_out_modrm(s, 0xbe | P_EXT, data_reg, TCG_REG_EAX);
525 tcg_out_modrm(s, 0xbf | P_EXT, data_reg, TCG_REG_EAX);
529 tcg_out_modrm(s, 0xb6 | P_EXT, data_reg, TCG_REG_EAX);
533 tcg_out_modrm(s, 0xb7 | P_EXT, data_reg, TCG_REG_EAX);
537 tcg_out_mov(s, data_reg, TCG_REG_EAX);
540 if (data_reg == TCG_REG_EDX) {
541 tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */
542 tcg_out_mov(s, data_reg2, TCG_REG_EAX);
544 tcg_out_mov(s, data_reg, TCG_REG_EAX);
545 tcg_out_mov(s, data_reg2, TCG_REG_EDX);
552 label2_ptr = s->code_ptr;
556 *label1_ptr = s->code_ptr - label1_ptr - 1;
559 tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
560 offsetof(CPUTLBEntry, addr_read));
565 #ifdef TARGET_WORDS_BIGENDIAN
573 tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, 0);
577 tcg_out_modrm_offset(s, 0xbe | P_EXT, data_reg, r0, 0);
581 tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
583 /* rolw $8, data_reg */
585 tcg_out_modrm(s, 0xc1, 0, data_reg);
591 tcg_out_modrm_offset(s, 0xbf | P_EXT, data_reg, r0, 0);
593 /* rolw $8, data_reg */
595 tcg_out_modrm(s, 0xc1, 0, data_reg);
598 /* movswl data_reg, data_reg */
599 tcg_out_modrm(s, 0xbf | P_EXT, data_reg, data_reg);
603 /* movl (r0), data_reg */
604 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
607 tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
611 /* XXX: could be nicer */
612 if (r0 == data_reg) {
616 tcg_out_mov(s, r1, r0);
620 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
621 tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 4);
623 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 4);
624 tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
626 tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 0);
628 tcg_out_opc(s, (0xc8 + data_reg2) | P_EXT);
635 #if defined(CONFIG_SOFTMMU)
637 *label2_ptr = s->code_ptr - label2_ptr - 1;
642 static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
645 int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
646 #if defined(CONFIG_SOFTMMU)
647 uint8_t *label1_ptr, *label2_ptr;
649 #if TARGET_LONG_BITS == 64
650 #if defined(CONFIG_SOFTMMU)
662 #if TARGET_LONG_BITS == 64
672 #if defined(CONFIG_SOFTMMU)
673 tcg_out_mov(s, r1, addr_reg);
675 tcg_out_mov(s, r0, addr_reg);
677 tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
678 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
680 tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
681 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
683 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
684 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
686 tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
687 tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
688 tcg_out8(s, (5 << 3) | r1);
689 tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_write));
692 tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
694 tcg_out_mov(s, r0, addr_reg);
696 #if TARGET_LONG_BITS == 32
698 tcg_out8(s, 0x70 + JCC_JE);
699 label1_ptr = s->code_ptr;
703 tcg_out8(s, 0x70 + JCC_JNE);
704 label3_ptr = s->code_ptr;
707 /* cmp 4(r1), addr_reg2 */
708 tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
711 tcg_out8(s, 0x70 + JCC_JE);
712 label1_ptr = s->code_ptr;
716 *label3_ptr = s->code_ptr - label3_ptr - 1;
719 /* XXX: move that code at the end of the TB */
720 #if TARGET_LONG_BITS == 32
722 tcg_out_mov(s, TCG_REG_EDX, data_reg);
723 tcg_out_mov(s, TCG_REG_ECX, data_reg2);
724 tcg_out8(s, 0x6a); /* push Ib */
725 tcg_out8(s, mem_index);
727 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
728 (tcg_target_long)s->code_ptr - 4);
729 tcg_out_addi(s, TCG_REG_ESP, 4);
734 tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_EDX, data_reg);
738 tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg);
741 tcg_out_mov(s, TCG_REG_EDX, data_reg);
744 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
746 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
747 (tcg_target_long)s->code_ptr - 4);
751 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
752 tcg_out8(s, 0x6a); /* push Ib */
753 tcg_out8(s, mem_index);
754 tcg_out_opc(s, 0x50 + data_reg2); /* push */
755 tcg_out_opc(s, 0x50 + data_reg); /* push */
757 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
758 (tcg_target_long)s->code_ptr - 4);
759 tcg_out_addi(s, TCG_REG_ESP, 12);
761 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
765 tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_ECX, data_reg);
769 tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg);
772 tcg_out_mov(s, TCG_REG_ECX, data_reg);
775 tcg_out8(s, 0x6a); /* push Ib */
776 tcg_out8(s, mem_index);
778 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
779 (tcg_target_long)s->code_ptr - 4);
780 tcg_out_addi(s, TCG_REG_ESP, 4);
786 label2_ptr = s->code_ptr;
790 *label1_ptr = s->code_ptr - label1_ptr - 1;
793 tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
794 offsetof(CPUTLBEntry, addr_write));
799 #ifdef TARGET_WORDS_BIGENDIAN
807 tcg_out_modrm_offset(s, 0x88, data_reg, r0, 0);
811 tcg_out_mov(s, r1, data_reg);
812 tcg_out8(s, 0x66); /* rolw $8, %ecx */
813 tcg_out_modrm(s, 0xc1, 0, r1);
819 tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
823 tcg_out_mov(s, r1, data_reg);
825 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
829 tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
833 tcg_out_mov(s, r1, data_reg2);
835 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
836 tcg_out_modrm_offset(s, 0x89, r1, r0, 0);
837 tcg_out_mov(s, r1, data_reg);
839 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
840 tcg_out_modrm_offset(s, 0x89, r1, r0, 4);
842 tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
843 tcg_out_modrm_offset(s, 0x89, data_reg2, r0, 4);
850 #if defined(CONFIG_SOFTMMU)
852 *label2_ptr = s->code_ptr - label2_ptr - 1;
856 static inline void tcg_out_op(TCGContext *s, int opc,
857 const TCGArg *args, const int *const_args)
862 case INDEX_op_exit_tb:
863 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, args[0]);
864 tcg_out8(s, 0xe9); /* jmp tb_ret_addr */
865 tcg_out32(s, tb_ret_addr - s->code_ptr - 4);
867 case INDEX_op_goto_tb:
868 if (s->tb_jmp_offset) {
869 /* direct jump method */
870 tcg_out8(s, 0xe9); /* jmp im */
871 s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
874 /* indirect jump method */
876 tcg_out_modrm_offset(s, 0xff, 4, -1,
877 (tcg_target_long)(s->tb_next + args[0]));
879 s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
884 tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
886 tcg_out_modrm(s, 0xff, 2, args[0]);
892 tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
894 tcg_out_modrm(s, 0xff, 4, args[0]);
898 tcg_out_jxx(s, JCC_JMP, args[0]);
900 case INDEX_op_movi_i32:
901 tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
903 case INDEX_op_ld8u_i32:
905 tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]);
907 case INDEX_op_ld8s_i32:
909 tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]);
911 case INDEX_op_ld16u_i32:
913 tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]);
915 case INDEX_op_ld16s_i32:
917 tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]);
919 case INDEX_op_ld_i32:
921 tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]);
923 case INDEX_op_st8_i32:
925 tcg_out_modrm_offset(s, 0x88, args[0], args[1], args[2]);
927 case INDEX_op_st16_i32:
930 tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
932 case INDEX_op_st_i32:
934 tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
936 case INDEX_op_sub_i32:
939 case INDEX_op_and_i32:
942 case INDEX_op_or_i32:
945 case INDEX_op_xor_i32:
948 case INDEX_op_add_i32:
952 tgen_arithi(s, c, args[0], args[2]);
954 tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
957 case INDEX_op_mul_i32:
961 if (val == (int8_t)val) {
962 tcg_out_modrm(s, 0x6b, args[0], args[0]);
965 tcg_out_modrm(s, 0x69, args[0], args[0]);
969 tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]);
972 case INDEX_op_mulu2_i32:
973 tcg_out_modrm(s, 0xf7, 4, args[3]);
975 case INDEX_op_div2_i32:
976 tcg_out_modrm(s, 0xf7, 7, args[4]);
978 case INDEX_op_divu2_i32:
979 tcg_out_modrm(s, 0xf7, 6, args[4]);
981 case INDEX_op_shl_i32:
986 tcg_out_modrm(s, 0xd1, c, args[0]);
988 tcg_out_modrm(s, 0xc1, c, args[0]);
989 tcg_out8(s, args[2]);
992 tcg_out_modrm(s, 0xd3, c, args[0]);
995 case INDEX_op_shr_i32:
998 case INDEX_op_sar_i32:
1002 case INDEX_op_add2_i32:
1004 tgen_arithi(s, ARITH_ADD, args[0], args[4]);
1006 tcg_out_modrm(s, 0x01 | (ARITH_ADD << 3), args[4], args[0]);
1008 tgen_arithi(s, ARITH_ADC, args[1], args[5]);
1010 tcg_out_modrm(s, 0x01 | (ARITH_ADC << 3), args[5], args[1]);
1012 case INDEX_op_sub2_i32:
1014 tgen_arithi(s, ARITH_SUB, args[0], args[4]);
1016 tcg_out_modrm(s, 0x01 | (ARITH_SUB << 3), args[4], args[0]);
1018 tgen_arithi(s, ARITH_SBB, args[1], args[5]);
1020 tcg_out_modrm(s, 0x01 | (ARITH_SBB << 3), args[5], args[1]);
1022 case INDEX_op_brcond_i32:
1023 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], args[3]);
1025 case INDEX_op_brcond2_i32:
1026 tcg_out_brcond2(s, args, const_args);
1029 case INDEX_op_qemu_ld8u:
1030 tcg_out_qemu_ld(s, args, 0);
1032 case INDEX_op_qemu_ld8s:
1033 tcg_out_qemu_ld(s, args, 0 | 4);
1035 case INDEX_op_qemu_ld16u:
1036 tcg_out_qemu_ld(s, args, 1);
1038 case INDEX_op_qemu_ld16s:
1039 tcg_out_qemu_ld(s, args, 1 | 4);
1041 case INDEX_op_qemu_ld32u:
1042 tcg_out_qemu_ld(s, args, 2);
1044 case INDEX_op_qemu_ld64:
1045 tcg_out_qemu_ld(s, args, 3);
1048 case INDEX_op_qemu_st8:
1049 tcg_out_qemu_st(s, args, 0);
1051 case INDEX_op_qemu_st16:
1052 tcg_out_qemu_st(s, args, 1);
1054 case INDEX_op_qemu_st32:
1055 tcg_out_qemu_st(s, args, 2);
1057 case INDEX_op_qemu_st64:
1058 tcg_out_qemu_st(s, args, 3);
1066 static const TCGTargetOpDef x86_op_defs[] = {
1067 { INDEX_op_exit_tb, { } },
1068 { INDEX_op_goto_tb, { } },
1069 { INDEX_op_call, { "ri" } },
1070 { INDEX_op_jmp, { "ri" } },
1071 { INDEX_op_br, { } },
1072 { INDEX_op_mov_i32, { "r", "r" } },
1073 { INDEX_op_movi_i32, { "r" } },
1074 { INDEX_op_ld8u_i32, { "r", "r" } },
1075 { INDEX_op_ld8s_i32, { "r", "r" } },
1076 { INDEX_op_ld16u_i32, { "r", "r" } },
1077 { INDEX_op_ld16s_i32, { "r", "r" } },
1078 { INDEX_op_ld_i32, { "r", "r" } },
1079 { INDEX_op_st8_i32, { "q", "r" } },
1080 { INDEX_op_st16_i32, { "r", "r" } },
1081 { INDEX_op_st_i32, { "r", "r" } },
1083 { INDEX_op_add_i32, { "r", "0", "ri" } },
1084 { INDEX_op_sub_i32, { "r", "0", "ri" } },
1085 { INDEX_op_mul_i32, { "r", "0", "ri" } },
1086 { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
1087 { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } },
1088 { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } },
1089 { INDEX_op_and_i32, { "r", "0", "ri" } },
1090 { INDEX_op_or_i32, { "r", "0", "ri" } },
1091 { INDEX_op_xor_i32, { "r", "0", "ri" } },
1093 { INDEX_op_shl_i32, { "r", "0", "ci" } },
1094 { INDEX_op_shr_i32, { "r", "0", "ci" } },
1095 { INDEX_op_sar_i32, { "r", "0", "ci" } },
1097 { INDEX_op_brcond_i32, { "r", "ri" } },
1099 { INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1100 { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1101 { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },
1103 #if TARGET_LONG_BITS == 32
1104 { INDEX_op_qemu_ld8u, { "r", "L" } },
1105 { INDEX_op_qemu_ld8s, { "r", "L" } },
1106 { INDEX_op_qemu_ld16u, { "r", "L" } },
1107 { INDEX_op_qemu_ld16s, { "r", "L" } },
1108 { INDEX_op_qemu_ld32u, { "r", "L" } },
1109 { INDEX_op_qemu_ld64, { "r", "r", "L" } },
1111 { INDEX_op_qemu_st8, { "cb", "L" } },
1112 { INDEX_op_qemu_st16, { "L", "L" } },
1113 { INDEX_op_qemu_st32, { "L", "L" } },
1114 { INDEX_op_qemu_st64, { "L", "L", "L" } },
1116 { INDEX_op_qemu_ld8u, { "r", "L", "L" } },
1117 { INDEX_op_qemu_ld8s, { "r", "L", "L" } },
1118 { INDEX_op_qemu_ld16u, { "r", "L", "L" } },
1119 { INDEX_op_qemu_ld16s, { "r", "L", "L" } },
1120 { INDEX_op_qemu_ld32u, { "r", "L", "L" } },
1121 { INDEX_op_qemu_ld64, { "r", "r", "L", "L" } },
1123 { INDEX_op_qemu_st8, { "cb", "L", "L" } },
1124 { INDEX_op_qemu_st16, { "L", "L", "L" } },
1125 { INDEX_op_qemu_st32, { "L", "L", "L" } },
1126 { INDEX_op_qemu_st64, { "L", "L", "L", "L" } },
1131 static int tcg_target_callee_save_regs[] = {
1132 /* TCG_REG_EBP, */ /* currently used for the global env, so no
1139 static inline void tcg_out_push(TCGContext *s, int reg)
1141 tcg_out_opc(s, 0x50 + reg);
1144 static inline void tcg_out_pop(TCGContext *s, int reg)
1146 tcg_out_opc(s, 0x58 + reg);
1149 /* Generate global QEMU prologue and epilogue code */
1150 void tcg_target_qemu_prologue(TCGContext *s)
1152 int i, frame_size, push_size, stack_addend;
1155 /* save all callee saved registers */
1156 for(i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {
1157 tcg_out_push(s, tcg_target_callee_save_regs[i]);
1159 /* reserve some stack space */
1160 push_size = 4 + ARRAY_SIZE(tcg_target_callee_save_regs) * 4;
1161 frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE;
1162 frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) &
1163 ~(TCG_TARGET_STACK_ALIGN - 1);
1164 stack_addend = frame_size - push_size;
1165 tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
1167 tcg_out_modrm(s, 0xff, 4, TCG_REG_EAX); /* jmp *%eax */
1170 tb_ret_addr = s->code_ptr;
1171 tcg_out_addi(s, TCG_REG_ESP, stack_addend);
1172 for(i = ARRAY_SIZE(tcg_target_callee_save_regs) - 1; i >= 0; i--) {
1173 tcg_out_pop(s, tcg_target_callee_save_regs[i]);
1175 tcg_out8(s, 0xc3); /* ret */
1178 void tcg_target_init(TCGContext *s)
1181 if ((1 << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry))
1184 tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xff);
1185 tcg_regset_set32(tcg_target_call_clobber_regs, 0,
1186 (1 << TCG_REG_EAX) |
1187 (1 << TCG_REG_EDX) |
1188 (1 << TCG_REG_ECX));
1190 tcg_regset_clear(s->reserved_regs);
1191 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ESP);
1193 tcg_add_target_add_op_defs(x86_op_defs);