2 * PPC emulation micro-operations for qemu.
4 * Copyright (c) 2003 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #define Ts0 (int32_t)T0
28 #define Ts1 (int32_t)T1
29 #define Ts2 (int32_t)T2
31 #define FT0 (env->ft0)
32 #define FT1 (env->ft1)
33 #define FT2 (env->ft2)
35 #define FTS0 ((float)env->ft0)
36 #define FTS1 ((float)env->ft1)
37 #define FTS2 ((float)env->ft2)
39 #define PPC_OP(name) void glue(op_, name)(void)
42 #include "op_template.h"
45 #include "op_template.h"
48 #include "op_template.h"
51 #include "op_template.h"
54 #include "op_template.h"
57 #include "op_template.h"
60 #include "op_template.h"
63 #include "op_template.h"
66 #include "op_template.h"
69 #include "op_template.h"
72 #include "op_template.h"
75 #include "op_template.h"
78 #include "op_template.h"
81 #include "op_template.h"
84 #include "op_template.h"
87 #include "op_template.h"
90 #include "op_template.h"
93 #include "op_template.h"
96 #include "op_template.h"
99 #include "op_template.h"
102 #include "op_template.h"
105 #include "op_template.h"
108 #include "op_template.h"
111 #include "op_template.h"
114 #include "op_template.h"
117 #include "op_template.h"
120 #include "op_template.h"
123 #include "op_template.h"
126 #include "op_template.h"
129 #include "op_template.h"
132 #include "op_template.h"
135 #include "op_template.h"
137 /* PPC state maintenance operations */
145 } else if (Ts0 > 0) {
160 } else if (Ts0 > 0) {
173 env->crf[0] = 0x02 | xer_ov;
180 env->crf[0] = 0x04 | xer_ov;
184 /* Set Rc1 (for floating point arithmetic) */
187 env->crf[1] = regs->fpscr[7];
210 /* Generate exceptions */
211 PPC_OP(queue_exception_err)
213 do_queue_exception_err(PARAM(1), PARAM(2));
216 PPC_OP(queue_exception)
218 do_queue_exception(PARAM(1));
221 PPC_OP(process_exceptions)
224 if (env->exceptions != 0) {
225 do_check_exception_state();
229 /* Segment registers load and store with immediate index */
232 T0 = regs->sr[T1 >> 28];
238 #if defined (DEBUG_OP)
239 dump_store_sr(T1 >> 28);
241 regs->sr[T1 >> 28] = T0;
262 /* Load/store special registers */
271 do_store_cr(PARAM(1));
277 T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1);
322 T0 = regs->spr[PARAM(1)];
328 regs->spr[PARAM(1)] = T0;
356 /* Update time base */
362 #if defined (DEBUG_OP)
363 dump_update_tb(PARAM(1));
366 T1 = regs->tb[1] + 1;
375 T0 = regs->tb[PARAM(1)];
381 regs->tb[PARAM(1)] = T0;
382 #if defined (DEBUG_OP)
383 dump_store_tb(PARAM(1));
388 /* Update decrementer */
396 do_queue_exception(EXCP_DECR);
405 if (Ts0 < 0 && Ts1 > 0) {
406 do_queue_exception(EXCP_DECR);
413 T0 = regs->IBAT[PARAM(1)][PARAM(2)];
418 #if defined (DEBUG_OP)
419 dump_store_ibat(PARAM(1), PARAM(2));
421 regs->IBAT[PARAM(1)][PARAM(2)] = T0;
426 T0 = regs->DBAT[PARAM(1)][PARAM(2)];
431 #if defined (DEBUG_OP)
432 dump_store_dbat(PARAM(1), PARAM(2));
434 regs->DBAT[PARAM(1)][PARAM(2)] = T0;
446 do_store_fpscr(PARAM(1));
452 regs->fpscr[7] &= ~0x8;
459 T0 = (T0 >> PARAM(1)) & 1;
465 T1 = (T1 >> PARAM(1)) & 1;
471 T1 = (T1 & PARAM(1)) | (T0 << PARAM(2));
476 #define EIP regs->nip
485 JUMP_TB(b1, PARAM1, 0, PARAM2);
496 JUMP_TB(btest, PARAM1, 0, PARAM2);
498 JUMP_TB(btest, PARAM1, 1, PARAM3);
523 /* tests with result in T0 */
530 PPC_OP(test_ctr_true)
532 T0 = (regs->ctr != 0 && (T0 & PARAM(1)) != 0);
535 PPC_OP(test_ctr_false)
537 T0 = (regs->ctr != 0 && (T0 & PARAM(1)) == 0);
542 T0 = (regs->ctr == 0);
545 PPC_OP(test_ctrz_true)
547 T0 = (regs->ctr == 0 && (T0 & PARAM(1)) != 0);
550 PPC_OP(test_ctrz_false)
552 T0 = (regs->ctr == 0 && (T0 & PARAM(1)) == 0);
557 T0 = (T0 & PARAM(1));
562 T0 = ((T0 & PARAM(1)) == 0);
565 /* CTR maintenance */
572 /*** Integer arithmetic ***/
584 if ((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)) {
615 if ((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)) {
625 /* candidate for helper (too long) */
630 if (T0 < T2 || (xer_ca == 1 && T0 == T2)) {
642 if (T0 < T2 || (xer_ca == 1 && T0 == T2)) {
647 if ((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)) {
663 /* add immediate carrying */
676 /* add to minus one extended */
690 if (T1 & (T1 ^ T0) & (1 << 31)) {
701 /* add to zero extended */
718 if ((T1 ^ (-1)) & (T1 ^ T0) & (1 << 31)) {
733 /* candidate for helper (too long) */
736 if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
737 Ts0 = (-1) * (T0 >> 31);
746 if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
749 T0 = (-1) * (T0 >> 31);
757 /* divide word unsigned */
781 /* multiply high word */
784 Ts0 = ((int64_t)Ts0 * (int64_t)Ts1) >> 32;
788 /* multiply high word unsigned */
791 T0 = ((uint64_t)T0 * (uint64_t)T1) >> 32;
795 /* multiply low immediate */
802 /* multiply low word */
811 int64_t res = (int64_t)Ts0 * (int64_t)Ts1;
813 if ((int32_t)res != res) {
826 if (T0 != 0x80000000) {
834 if (T0 == 0x80000000) {
855 if (((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)) {
864 /* substract from carrying */
885 if (((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)) {
894 /* substract from extended */
895 /* candidate for helper (too long) */
898 T0 = T1 + ~T0 + xer_ca;
899 if (T0 < T1 || (xer_ca == 1 && T0 == T1)) {
910 T0 = T1 + ~T0 + xer_ca;
911 if ((~T2 ^ T1 ^ (-1)) & (~T2 ^ T0) & (1 << 31)) {
917 if (T0 < T1 || (xer_ca == 1 && T0 == T1)) {
925 /* substract from immediate carrying */
928 T0 = PARAM(1) + ~T0 + 1;
929 if (T0 <= PARAM(1)) {
937 /* substract from minus one extended */
940 T0 = ~T0 + xer_ca - 1;
950 T0 = ~T0 + xer_ca - 1;
951 if (~T1 & (~T1 ^ T0) & (1 << 31)) {
962 /* substract from zero extended */
979 if ((~T1 ^ (-1)) & ((~T1) ^ T0) & (1 << 31)) {
993 /*** Integer comparison ***/
999 } else if (Ts0 > Ts1) {
1007 /* compare immediate */
1010 if (Ts0 < SPARAM(1)) {
1012 } else if (Ts0 > SPARAM(1)) {
1020 /* compare logical */
1025 } else if (T0 > T1) {
1033 /* compare logical immediate */
1036 if (T0 < PARAM(1)) {
1038 } else if (T0 > PARAM(1)) {
1046 /*** Integer logical ***/
1068 /* count leading zero */
1072 for (T0 = 32; T1 > 0; T0--)
1084 /* extend sign byte */
1091 /* extend sign half word */
1147 /*** Integer rotate ***/
1148 /* rotate left word immediate then mask insert */
1151 T0 = (rotl(T0, PARAM(1)) & PARAM(2)) | (T1 & PARAM(3));
1155 /* rotate left immediate then and with mask insert */
1158 T0 = rotl(T0, PARAM(1));
1164 T0 = T0 << PARAM(1);
1170 T0 = T0 >> PARAM(1);
1174 /* rotate left word then and with mask insert */
1177 T0 = rotl(T0, PARAM(1)) & PARAM(2);
1189 T0 = rotl(T0, T1) & PARAM(1);
1193 /*** Integer shift ***/
1194 /* shift left word */
1205 /* shift right algebraic word */
1212 /* shift right algebraic word immediate */
1216 Ts0 = Ts0 >> PARAM(1);
1217 if (Ts1 < 0 && (Ts1 & PARAM(2)) != 0) {
1225 /* shift right word */
1236 /*** Floating-Point arithmetic ***/
1244 /* fadds - fadds. */
1258 /* fsubs - fsubs. */
1272 /* fmuls - fmuls. */
1286 /* fdivs - fdivs. */
1293 /* fsqrt - fsqrt. */
1300 /* fsqrts - fsqrts. */
1314 /* frsqrte - frsqrte. */
1328 /*** Floating-Point multiply-and-add ***/
1329 /* fmadd - fmadd. */
1332 FT0 = (FT0 * FT1) + FT2;
1336 /* fmadds - fmadds. */
1339 FTS0 = (FTS0 * FTS1) + FTS2;
1343 /* fmsub - fmsub. */
1346 FT0 = (FT0 * FT1) - FT2;
1350 /* fmsubs - fmsubs. */
1353 FTS0 = (FTS0 * FTS1) - FTS2;
1357 /* fnmadd - fnmadd. - fnmadds - fnmadds. */
1360 FT0 = -((FT0 * FT1) + FT2);
1364 /* fnmadds - fnmadds. */
1367 FTS0 = -((FTS0 * FTS1) + FTS2);
1371 /* fnmsub - fnmsub. */
1374 FT0 = -((FT0 * FT1) - FT2);
1378 /* fnmsubs - fnmsubs. */
1381 FTS0 = -((FTS0 * FTS1) - FTS2);
1385 /*** Floating-Point round & convert ***/
1393 /* fctiw - fctiw. */
1400 /* fctiwz - fctiwz. */
1408 /*** Floating-Point compare ***/
1423 /*** Floating-point move ***/
1445 /* Load and store */
1446 #if defined(CONFIG_USER_ONLY)
1447 #define MEMSUFFIX _raw
1450 #define MEMSUFFIX _user
1453 #define MEMSUFFIX _kernel
1457 /* Return from interrupt */
1460 T0 = regs->spr[SRR1] & ~0xFFFF0000;
1464 regs->nip = regs->spr[SRR0] & ~0x00000003;
1465 if (env->exceptions != 0) {
1466 do_check_exception_state();
1474 if ((Ts0 < Ts1 && (PARAM(1) & 0x10)) ||
1475 (Ts0 > Ts1 && (PARAM(1) & 0x08)) ||
1476 (Ts0 == Ts1 && (PARAM(1) & 0x04)) ||
1477 (T0 < T1 && (PARAM(1) & 0x02)) ||
1478 (T0 > T1 && (PARAM(1) & 0x01)))
1479 do_queue_exception_err(EXCP_PROGRAM, EXCP_TRAP);
1485 if ((Ts0 < SPARAM(1) && (PARAM(2) & 0x10)) ||
1486 (Ts0 > SPARAM(1) && (PARAM(2) & 0x08)) ||
1487 (Ts0 == SPARAM(1) && (PARAM(2) & 0x04)) ||
1488 (T0 < (uint32_t)SPARAM(1) && (PARAM(2) & 0x02)) ||
1489 (T0 > (uint32_t)SPARAM(1) && (PARAM(2) & 0x01)))
1490 do_queue_exception_err(EXCP_PROGRAM, EXCP_TRAP);
1494 /* Instruction cache block invalidate */