1 #if !defined(__QEMU_MIPS_EXEC_H__)
2 #define __QEMU_MIPS_EXEC_H__
7 #include "dyngen-exec.h"
9 register struct CPUMIPSState *env asm(AREG0);
11 #if defined (USE_64BITS_REGS)
12 typedef int64_t host_int_t;
13 typedef uint64_t host_uint_t;
15 typedef int32_t host_int_t;
16 typedef uint32_t host_uint_t;
19 register host_uint_t T0 asm(AREG1);
20 register host_uint_t T1 asm(AREG2);
21 register host_uint_t T2 asm(AREG3);
23 #if defined (USE_HOST_FLOAT_REGS)
24 #error "implement me."
26 #define FDT0 (env->ft0.fd)
27 #define FDT1 (env->ft1.fd)
28 #define FDT2 (env->ft2.fd)
29 #define FST0 (env->ft0.fs[FP_ENDIAN_IDX])
30 #define FST1 (env->ft1.fs[FP_ENDIAN_IDX])
31 #define FST2 (env->ft2.fs[FP_ENDIAN_IDX])
32 #define DT0 (env->ft0.d)
33 #define DT1 (env->ft1.d)
34 #define DT2 (env->ft2.d)
35 #define WT0 (env->ft0.w[FP_ENDIAN_IDX])
36 #define WT1 (env->ft1.w[FP_ENDIAN_IDX])
37 #define WT2 (env->ft2.w[FP_ENDIAN_IDX])
40 #if defined (DEBUG_OP)
41 #define RETURN() __asm__ __volatile__("nop");
43 #define RETURN() __asm__ __volatile__("");
49 #if !defined(CONFIG_USER_ONLY)
50 #include "softmmu_exec.h"
51 #endif /* !defined(CONFIG_USER_ONLY) */
53 static inline void env_to_regs(void)
57 static inline void regs_to_env(void)
61 #if (HOST_LONG_BITS == 32)
69 void do_mfc0_random(void);
70 void do_mfc0_count(void);
71 void do_mtc0_entryhi(uint32_t in);
72 void do_mtc0_status_debug(uint32_t old, uint32_t val);
73 void do_mtc0_status_irqraise_debug(void);
79 void dump_fpu(CPUState *env);
80 void fpu_dump_state(CPUState *env, FILE *f,
81 int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
85 void do_lwl_raw (uint32_t);
86 void do_lwr_raw (uint32_t);
87 uint32_t do_swl_raw (uint32_t);
88 uint32_t do_swr_raw (uint32_t);
89 #if !defined(CONFIG_USER_ONLY)
90 void do_lwl_user (uint32_t);
91 void do_lwl_kernel (uint32_t);
92 void do_lwr_user (uint32_t);
93 void do_lwr_kernel (uint32_t);
94 uint32_t do_swl_user (uint32_t);
95 uint32_t do_swl_kernel (uint32_t);
96 uint32_t do_swr_user (uint32_t);
97 uint32_t do_swr_kernel (uint32_t);
99 void do_pmon (int function);
103 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
104 int is_user, int is_softmmu);
105 void do_interrupt (CPUState *env);
107 void cpu_loop_exit(void);
108 void do_raise_exception_err (uint32_t exception, int error_code);
109 void do_raise_exception (uint32_t exception);
110 void do_raise_exception_direct (uint32_t exception);
112 void cpu_dump_state(CPUState *env, FILE *f,
113 int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
115 void cpu_mips_irqctrl_init (void);
116 uint32_t cpu_mips_get_random (CPUState *env);
117 uint32_t cpu_mips_get_count (CPUState *env);
118 void cpu_mips_store_count (CPUState *env, uint32_t value);
119 void cpu_mips_store_compare (CPUState *env, uint32_t value);
120 void cpu_mips_clock_init (CPUState *env);
121 void cpu_mips_tlb_flush (CPUState *env, int flush_global);
123 #endif /* !defined(__QEMU_MIPS_EXEC_H__) */