initial upstream import
[drnoksnes] / snes9x.h
1 /*
2  * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
3  *
4  * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and
5  *                           Jerremy Koot (jkoot@snes9x.com)
6  *
7  * Super FX C emulator code 
8  * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and
9  *                           Gary Henderson.
10  * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_.
11  *
12  * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson.
13  * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_.
14  * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com).
15  *
16  * DOS port code contains the works of other authors. See headers in
17  * individual files.
18  *
19  * Snes9x homepage: http://www.snes9x.com
20  *
21  * Permission to use, copy, modify and distribute Snes9x in both binary and
22  * source form, for non-commercial purposes, is hereby granted without fee,
23  * providing that this license information and copyright notice appear with
24  * all copies and any derived work.
25  *
26  * This software is provided 'as-is', without any express or implied
27  * warranty. In no event shall the authors be held liable for any damages
28  * arising from the use of this software.
29  *
30  * Snes9x is freeware for PERSONAL USE only. Commercial users should
31  * seek permission of the copyright holders first. Commercial use includes
32  * charging money for Snes9x or software derived from Snes9x.
33  *
34  * The copyright holders request that bug fixes and improvements to the code
35  * should be forwarded to them so everyone can benefit from the modifications
36  * in future versions.
37  *
38  * Super NES and Super Nintendo Entertainment System are trademarks of
39  * Nintendo Co., Limited and its subsidiary companies.
40  */
41 #ifndef _SNES9X_H_
42 #define _SNES9X_H_
43
44 #define VERSION "1.39"
45
46 #include <stdio.h>
47 #include <stdlib.h>
48
49 #ifdef __WIN32__
50 #include "..\wsnes9x.h"
51 #include "..\zlib\zlib.h"
52 #endif
53
54 #include "port.h"
55 #include "65c816.h"
56 #include "messages.h"
57
58 #if defined(USE_GLIDE) && !defined(GFX_MULTI_FORMAT)
59 #define GFX_MULTI_FORMAT
60 #endif
61
62 #define ROM_NAME_LEN 23
63
64 #ifdef ZLIB
65 //#ifndef __WIN32__
66 #include "zlib.h"
67 //#endif
68 #define STREAM gzFile
69 #define READ_STREAM(p,l,s) gzread (s,p,l)
70 #define WRITE_STREAM(p,l,s) gzwrite (s,p,l)
71 #define OPEN_STREAM(f,m) gzopen (f,m)
72 #define CLOSE_STREAM(s) gzclose (s)
73 #define SEEK_STREAM(p,r,s) gzseek(s,p,r)
74 #else
75 #ifdef __GP32__
76 #define STREAM long * //F_HANDLE * 
77 #define READ_STREAM(p,l,s) gp32_fread ((unsigned char*)p,(long)l,s)
78 #define WRITE_STREAM(p,l,s) gp32_fwrite ((unsigned char*)p,(long)l,s)
79 #define OPEN_STREAM(f,m) gp32_fopen ((char*)f,(char*)m)
80 #define CLOSE_STREAM(s) gp32_fclose (s)
81 #define SEEK_STREAM(p,r,s) gp32_fseek(p,r,s)
82
83 #else
84 #define STREAM FILE *
85 #define READ_STREAM(p,l,s) fread (p,1,l,s)
86 #define WRITE_STREAM(p,l,s) fwrite (p,1,l,s)
87 #define OPEN_STREAM(f,m) fopen (f,m)
88 #define CLOSE_STREAM(s) fclose (s)
89 #define SEEK_STREAM(p,r,s) fseek(s,p,r)
90 #define FROM_CURRENT SEEK_CUR
91 #endif
92 #endif
93
94
95 /* SNES screen width and height */
96 #define SNES_WIDTH              256
97 #define SNES_HEIGHT             224
98 #define SNES_HEIGHT_EXTENDED    239
99 #define IMAGE_WIDTH             (Settings.SupportHiRes ? SNES_WIDTH * 2 : SNES_WIDTH)
100 #define IMAGE_HEIGHT            (Settings.SupportHiRes ? SNES_HEIGHT_EXTENDED * 2 : SNES_HEIGHT_EXTENDED)
101
102 #define SNES_MAX_NTSC_VCOUNTER  262
103 #define SNES_MAX_PAL_VCOUNTER   312
104 #define SNES_HCOUNTER_MAX       342
105 #define SPC700_TO_65C816_RATIO  2
106 #define AUTO_FRAMERATE          200
107
108 #define PPU_IGNORE_FIXEDCOLCHANGES                      (1<<0)
109 #define PPU_IGNORE_WINDOW                                       (1<<1)
110 #define PPU_IGNORE_ADDSUB                                       (1<<2)
111 #define PPU_IGNORE_PALWRITE                                     (1<<3)
112 #define GFX_IGNORE_OBJ                                          (1<<4)
113 #define GFX_IGNORE_BG0                                          (1<<5)
114 #define GFX_IGNORE_BG1                                          (1<<6)
115 #define GFX_IGNORE_BG2                                          (1<<7)
116 #define GFX_IGNORE_BG3                                          (1<<8)
117
118 // NTSC master clock signal 21.47727MHz
119 // PPU: master clock / 4
120 // 1 / PPU clock * 342 -> 63.695us
121 // 63.695us / (1 / 3.579545MHz) -> 228 cycles per scanline
122 // From Earth Worm Jim: APU executes an average of 65.14285714 cycles per
123 // scanline giving an APU clock speed of 1.022731096MHz
124
125 // PAL master clock signal 21.28137MHz
126 // PPU: master clock / 4
127 // 1 / PPU clock * 342 -> 64.281us
128 // 64.281us / (1 / 3.546895MHz) -> 228 cycles per scanline.
129
130 //#define SNES_SCANLINE_TIME (63.695e-6)
131 //#define SNES_CLOCK_SPEED (3579545)
132
133 //#define SNES_CLOCK_LEN (1.0 / SNES_CLOCK_SPEED)
134
135 #ifdef VAR_CYCLES
136 //#define SNES_CYCLES_PER_SCANLINE ((uint32) ((SNES_SCANLINE_TIME / SNES_CLOCK_LEN) * 6 + 0.5))
137 #define SNES_CYCLES_PER_SCANLINE ((uint32)(228*6))
138 #else
139 #define SNES_CYCLES_PER_SCANLINE ((uint32) (SNES_SCANLINE_TIME / SNES_CLOCK_LEN + 0.5))
140 #endif
141
142 #define SNES_TR_MASK        (1 << 4)
143 #define SNES_TL_MASK        (1 << 5)
144 #define SNES_X_MASK         (1 << 6)
145 #define SNES_A_MASK         (1 << 7)
146 #define SNES_RIGHT_MASK     (1 << 8)
147 #define SNES_LEFT_MASK      (1 << 9)
148 #define SNES_DOWN_MASK      (1 << 10)
149 #define SNES_UP_MASK        (1 << 11)
150 #define SNES_START_MASK     (1 << 12)
151 #define SNES_SELECT_MASK    (1 << 13)
152 #define SNES_Y_MASK         (1 << 14)
153 #define SNES_B_MASK         (1 << 15)
154
155 enum {
156     SNES_MULTIPLAYER5,
157     SNES_JOYPAD,
158     SNES_MOUSE_SWAPPED,
159     SNES_MOUSE,
160     SNES_SUPERSCOPE,
161         SNES_JUSTIFIER,
162         SNES_JUSTIFIER_2,
163     SNES_MAX_CONTROLLER_OPTIONS
164 };
165
166 #define DEBUG_MODE_FLAG     (1 << 0)
167 #define TRACE_FLAG                      (1 << 1)
168 #define SINGLE_STEP_FLAG    (1 << 2)
169 #define BREAK_FLAG                      (1 << 3)
170 #define SCAN_KEYS_FLAG      (1 << 4)
171 #define SAVE_SNAPSHOT_FLAG  (1 << 5)
172 #define DELAYED_NMI_FLAG    (1 << 6)
173 #define NMI_FLAG                        (1 << 7)
174 #define PROCESS_SOUND_FLAG  (1 << 8)
175 #define FRAME_ADVANCE_FLAG  (1 << 9)
176 #define DELAYED_NMI_FLAG2   (1 << 10)
177 #define IRQ_PENDING_FLAG    (1 << 11)
178
179 #ifdef VAR_CYCLES
180 #define ONE_CYCLE 6
181 #define SLOW_ONE_CYCLE 8
182 #define TWO_CYCLES 12
183 #else
184 #define ONE_CYCLE 1
185 #define SLOW_ONE_CYCLE 1
186 #define TWO_CYCLES 2
187 #endif
188
189
190 #undef MEMMAP_BLOCK_SIZE
191 #define MEMMAP_BLOCK_SIZE (0x1000)
192 #undef MEMMAP_NUM_BLOCKS
193 #define MEMMAP_NUM_BLOCKS (0x1000000 / MEMMAP_BLOCK_SIZE)
194
195 struct SCPUState{
196     uint32  Flags;                                      //0
197     bool8   BranchSkip;                         //4
198     bool8   NMIActive;                          //5
199     bool8   IRQActive;                          //6
200     bool8   WaitingForInterrupt;        //7
201     struct SRegisters Regs;                     //8
202                 //uint8  PB;                            //8
203                 //uint8  DB;                            //9
204                 //pair   P;                                     //10
205                 //pair   A;                                     //12
206                 //pair   D;                                     //14
207                 //pair   X;                                     //16
208                 //pair   S;                                     //18
209                 //pair   Y;                                     //20
210             //uint16 PC;                                //22
211     uint8   *PC;                                        //24
212     int32   Cycles;                                     //28
213     uint8   *PCBase;                            //32
214     uint8   *PCAtOpcodeStart;           //36
215     uint8   *WaitAddress;                       //40
216     uint32  WaitCounter;                        //44
217     int32   NextEvent;                          //48
218     int32   V_Counter;                          //52
219     int32   MemSpeed;                           //56
220     int32   MemSpeedx2;                         //60
221         int32   FastROMSpeed;                   //64
222     uint32 AutoSaveTimer;               //68
223     uint32 NMITriggerPoint;             //72
224     uint32 NMICycleCount;                       //76
225     uint32 IRQCycleCount;                       //80
226
227     bool8   InDMA;                                      //84
228     uint8   WhichEvent;                         //85
229         bool8  SRAMModified;                    //86
230         bool8  BRKTriggered;                    //87
231         uint32  _ARM_asm_reserved_1;    //88  to stock current jmp table
232     bool8  TriedInterleavedMode2;       //92
233     bool8  _ARM_asm_padding1[3];        //93
234     
235     uint8*      Memory_Map;                             //96
236     uint8*      Memory_WriteMap;                //100
237     uint8*      Memory_MemorySpeed;             //104
238     uint8*      Memory_BlockIsRAM;              //108
239     uint8*      Memory_SRAM;                    //112
240     uint8*      Memory_BWRAM;                   //116
241     uint16      Memory_SRAMMask;                //120
242     bool8       APU_APUExecuting;               //122
243     bool8       _ARM_asm_padding2;              //123
244     uint32      _PALMSOS_R9;                    //124
245     uint32      _PALMSOS_R10;                   //128
246         int32   APU_Cycles;                             //132 notaz
247 };
248
249
250 #define HBLANK_START_EVENT 0
251 #define HBLANK_END_EVENT 1
252 #define HTIMER_BEFORE_EVENT 2
253 #define HTIMER_AFTER_EVENT 3
254 #define NO_EVENT 4
255
256 struct SSettings{
257     // CPU options
258     bool8  APUEnabled;
259     bool8  Shutdown;
260     uint8  SoundSkipMethod;
261     long   H_Max;
262     long   HBlankStart;
263     long   CyclesPercentage;
264     bool8  DisableIRQ;
265     bool8  Paused;
266     bool8  ForcedPause;
267     bool8  StopEmulation;
268
269     // Tracing options
270     bool8  TraceDMA;
271     bool8  TraceHDMA;
272     bool8  TraceVRAM;
273     bool8  TraceUnknownRegisters;
274     bool8  TraceDSP;
275
276     // Joystick options
277     bool8  SwapJoypads;
278     bool8  JoystickEnabled;
279
280     // ROM timing options (see also H_Max above)
281     bool8  ForcePAL;
282     bool8  ForceNTSC;
283     bool8  PAL;
284     uint32 FrameTimePAL;
285     uint32 FrameTimeNTSC;
286     uint32 FrameTime;
287     uint32 SkipFrames;
288
289     // ROM image options
290     bool8  ForceLoROM;
291     bool8  ForceHiROM;
292     bool8  ForceHeader;
293     bool8  ForceNoHeader;
294     bool8  ForceInterleaved;
295     bool8  ForceInterleaved2;
296     bool8  ForceNotInterleaved;
297
298     // Peripherial options
299     bool8  ForceSuperFX;
300     bool8  ForceNoSuperFX;
301     bool8  ForceDSP1;
302     bool8  ForceNoDSP1;
303     bool8  ForceSA1;
304     bool8  ForceNoSA1;
305     bool8  ForceC4;
306     bool8  ForceNoC4;
307     bool8  ForceSDD1;
308     bool8  ForceNoSDD1;
309     bool8  MultiPlayer5;
310     bool8  Mouse;
311     bool8  SuperScope;
312     bool8  SRTC;
313     uint32 ControllerOption;
314     
315     bool8  ShutdownMaster;
316     bool8  MultiPlayer5Master;
317     bool8  SuperScopeMaster;
318     bool8  MouseMaster;
319     bool8  SuperFX;
320     bool8  DSP1Master;
321     bool8  SA1;
322     bool8  C4;
323     bool8  SDD1;
324
325     // Sound options
326     uint32 SoundPlaybackRate;
327     bool8  TraceSoundDSP;
328     bool8  Stereo;
329     bool8  ReverseStereo;
330     bool8  SixteenBitSound;
331     int    SoundBufferSize;
332     int    SoundMixInterval;
333     bool8  SoundEnvelopeHeightReading;
334     bool8  DisableSoundEcho;
335     bool8  DisableSampleCaching;
336     bool8  DisableMasterVolume;
337     bool8  SoundSync;
338     bool8  InterpolatedSound;
339     bool8  ThreadSound;
340     bool8  Mute;
341 //    bool8  NextAPUEnabled;
342     uint8  AltSampleDecode;
343     bool8  FixFrequency;
344     
345     // Graphics options
346     bool8  SixteenBit;
347     bool8  Transparency;
348     bool8  SupportHiRes;
349     bool8  Mode7Interpolate;
350
351     // SNES graphics options
352     bool8  BGLayering;
353     bool8  DisableGraphicWindows;
354     bool8  ForceTransparency;
355     bool8  ForceNoTransparency;
356     bool8  DisableHDMA;
357     bool8  DisplayFrameRate;
358
359     // Others
360     bool8  NetPlay;
361     bool8  NetPlayServer;
362     char   ServerName [128];
363     int    Port;
364     bool8  GlideEnable;
365     bool8  OpenGLEnable;
366     int32  AutoSaveDelay; // Time in seconds before S-RAM auto-saved if modified.
367     bool8  ApplyCheats;
368     bool8  TurboMode;
369     uint32 TurboSkipFrames;
370     uint32 AutoMaxSkipFrames;
371         uint32 os9x_hack;
372     
373 // Fixes for individual games
374     uint32 StrikeGunnerOffsetHack;
375     bool8  ChuckRock;
376     bool8  StarfoxHack;
377     bool8  WinterGold;
378     bool8  Dezaemon;
379     bool8  WrestlemaniaArcade;
380     bool8  BS;  // Japanese Satellite System games.
381     bool8  DaffyDuck;
382     uint8  APURAMInitialValue;
383     bool8  SDD1Pack;
384     
385         // notaz
386         uint32 GfxLayerMask;
387 #ifdef __WIN32__
388     int    SoundDriver;
389 #endif
390 };
391
392 struct SSNESGameFixes
393 {
394     uint8 NeedInit0x2137;
395     uint8 umiharakawaseFix;
396     uint8 alienVSpredetorFix;
397     uint8 APU_OutPorts_ReturnValueFix;
398     uint8 Old_Read0x4200;
399     uint8 _0x213E_ReturnValue;
400     uint8 TouhaidenControllerFix;
401     uint8 SoundEnvelopeHeightReading2;
402     uint8 SRAMInitialValue;
403 };
404
405 START_EXTERN_C
406 extern struct SSettings Settings;
407 extern struct SCPUState CPU;
408 extern struct SSNESGameFixes SNESGameFixes;
409 extern char String [513];
410
411 void S9xExit ();
412 void S9xMessage (int type, int number, const char *message);
413 void S9xLoadSDD1Data ();
414 END_EXTERN_C
415
416 enum {
417     PAUSE_NETPLAY_CONNECT = (1 << 0),
418     PAUSE_TOGGLE_FULL_SCREEN = (1 << 1),
419     PAUSE_EXIT = (1 << 2),
420     PAUSE_MENU = (1 << 3),
421     PAUSE_INACTIVE_WINDOW = (1 << 4),
422     PAUSE_WINDOW_ICONISED = (1 << 5),
423     PAUSE_RESTORE_GUI = (1 << 6),
424     PAUSE_FREEZE_FILE = (1 << 7)
425 };
426 void S9xSetPause (uint32 mask);
427 void S9xClearPause (uint32 mask);
428
429 #endif