2 * QEMU MC146818 RTC emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
41 #include <netinet/in.h>
49 #define RTC_SECONDS_ALARM 1
51 #define RTC_MINUTES_ALARM 3
53 #define RTC_HOURS_ALARM 5
54 #define RTC_ALARM_DONT_CARE 0xC0
56 #define RTC_DAY_OF_WEEK 6
57 #define RTC_DAY_OF_MONTH 7
66 #define REG_A_UIP 0x80
68 #define REG_B_SET 0x80
69 #define REG_B_PIE 0x40
70 #define REG_B_AIE 0x20
71 #define REG_B_UIE 0x10
74 uint8_t cmos_data[128];
76 int current_time; /* in seconds */
78 uint8_t buf_data[10]; /* buffered data */
80 QEMUTimer *periodic_timer;
81 int64_t next_periodic_time;
83 int64_t next_second_time;
84 QEMUTimer *second_timer;
85 QEMUTimer *second_timer2;
88 static void rtc_set_time(RTCState *s);
89 static void rtc_set_date_buf(RTCState *s, const struct tm *tm);
90 static void rtc_copy_date(RTCState *s);
92 static void rtc_timer_update(RTCState *s, int64_t current_time)
94 int period_code, period;
95 int64_t cur_clock, next_irq_clock;
97 period_code = s->cmos_data[RTC_REG_A] & 0x0f;
98 if (period_code != 0 &&
99 (s->cmos_data[RTC_REG_B] & REG_B_PIE)) {
100 if (period_code <= 2)
102 /* period in 32 Khz cycles */
103 period = 1 << (period_code - 1);
104 /* compute 32 khz clock */
105 cur_clock = muldiv64(current_time, 32768, ticks_per_sec);
106 next_irq_clock = (cur_clock & ~(period - 1)) + period;
107 s->next_periodic_time = muldiv64(next_irq_clock, ticks_per_sec, 32768) + 1;
108 qemu_mod_timer(s->periodic_timer, s->next_periodic_time);
110 qemu_del_timer(s->periodic_timer);
114 static void rtc_periodic_timer(void *opaque)
116 RTCState *s = opaque;
118 rtc_timer_update(s, s->next_periodic_time);
119 s->cmos_data[RTC_REG_C] |= 0xc0;
120 pic_set_irq(s->irq, 1);
123 static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
125 RTCState *s = opaque;
127 if ((addr & 1) == 0) {
128 s->cmos_index = data & 0x7f;
131 printf("cmos: write index=0x%02x val=0x%02x\n",
132 s->cmos_index, data);
134 switch(s->cmos_index) {
135 case RTC_SECONDS_ALARM:
136 case RTC_MINUTES_ALARM:
137 case RTC_HOURS_ALARM:
138 /* XXX: not supported */
139 s->cmos_data[s->cmos_index] = data;
144 case RTC_DAY_OF_WEEK:
145 case RTC_DAY_OF_MONTH:
148 s->cmos_data[s->cmos_index] = data;
149 /* if in set mode, do not update the time */
150 if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
155 /* UIP bit is read only */
156 s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) |
157 (s->cmos_data[RTC_REG_A] & REG_A_UIP);
158 rtc_timer_update(s, qemu_get_clock(vm_clock));
161 if (data & REG_B_SET) {
162 /* set mode: reset UIP mode */
163 s->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
166 /* if disabling set mode, update the time */
167 if (s->cmos_data[RTC_REG_B] & REG_B_SET) {
171 s->cmos_data[RTC_REG_B] = data;
172 rtc_timer_update(s, qemu_get_clock(vm_clock));
176 /* cannot write to them */
179 s->cmos_data[s->cmos_index] = data;
185 static inline int to_bcd(RTCState *s, int a)
187 if (s->cmos_data[RTC_REG_B] & 0x04) {
190 return ((a / 10) << 4) | (a % 10);
194 static inline int from_bcd(RTCState *s, int a)
196 if (s->cmos_data[RTC_REG_B] & 0x04) {
199 return ((a >> 4) * 10) + (a & 0x0f);
203 static void rtc_set_time(RTCState *s)
205 struct tm tm1, *tm = &tm1;
207 tm->tm_sec = from_bcd(s, s->cmos_data[RTC_SECONDS]);
208 tm->tm_min = from_bcd(s, s->cmos_data[RTC_MINUTES]);
209 tm->tm_hour = from_bcd(s, s->cmos_data[RTC_HOURS]);
210 tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]);
211 tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]);
212 tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
213 tm->tm_year = from_bcd(s, s->cmos_data[RTC_YEAR]) + 100;
215 /* update internal state */
216 s->buf_data[RTC_SECONDS] = s->cmos_data[RTC_SECONDS];
217 s->buf_data[RTC_MINUTES] = s->cmos_data[RTC_MINUTES];
218 s->buf_data[RTC_HOURS] = s->cmos_data[RTC_HOURS];
219 s->buf_data[RTC_DAY_OF_WEEK] = s->cmos_data[RTC_DAY_OF_WEEK];
220 s->buf_data[RTC_DAY_OF_MONTH] = s->cmos_data[RTC_DAY_OF_MONTH];
221 s->buf_data[RTC_MONTH] = s->cmos_data[RTC_MONTH];
222 s->buf_data[RTC_YEAR] = s->cmos_data[RTC_YEAR];
223 s->current_time = mktime(tm);
226 static void rtc_update_second(void *opaque)
228 RTCState *s = opaque;
230 /* if the oscillator is not in normal operation, we do not update */
231 if ((s->cmos_data[RTC_REG_A] & 0x70) != 0x20) {
232 s->next_second_time += ticks_per_sec;
233 qemu_mod_timer(s->second_timer, s->next_second_time);
237 if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
238 /* update in progress bit */
239 s->cmos_data[RTC_REG_A] |= REG_A_UIP;
241 qemu_mod_timer(s->second_timer2,
242 s->next_second_time + (ticks_per_sec * 99) / 100);
246 static void rtc_update_second2(void *opaque)
248 RTCState *s = opaque;
251 ti = s->current_time;
252 rtc_set_date_buf(s, gmtime(&ti));
254 if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
259 if (s->cmos_data[RTC_REG_B] & REG_B_AIE) {
260 if (((s->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0 ||
261 s->cmos_data[RTC_SECONDS_ALARM] == s->buf_data[RTC_SECONDS]) &&
262 ((s->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0 ||
263 s->cmos_data[RTC_MINUTES_ALARM] == s->buf_data[RTC_MINUTES]) &&
264 ((s->cmos_data[RTC_HOURS_ALARM] & 0xc0) == 0xc0 ||
265 s->cmos_data[RTC_HOURS_ALARM] == s->buf_data[RTC_HOURS])) {
267 s->cmos_data[RTC_REG_C] |= 0xa0;
268 pic_set_irq(s->irq, 1);
272 /* update ended interrupt */
273 if (s->cmos_data[RTC_REG_B] & REG_B_UIE) {
274 s->cmos_data[RTC_REG_C] |= 0x90;
275 pic_set_irq(s->irq, 1);
278 /* clear update in progress bit */
279 s->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
281 s->next_second_time += ticks_per_sec;
282 qemu_mod_timer(s->second_timer, s->next_second_time);
285 static uint32_t cmos_ioport_read(void *opaque, uint32_t addr)
287 RTCState *s = opaque;
289 if ((addr & 1) == 0) {
292 switch(s->cmos_index) {
296 case RTC_DAY_OF_WEEK:
297 case RTC_DAY_OF_MONTH:
300 ret = s->cmos_data[s->cmos_index];
303 ret = s->cmos_data[s->cmos_index];
306 ret = s->cmos_data[s->cmos_index];
307 pic_set_irq(s->irq, 0);
308 s->cmos_data[RTC_REG_C] = 0x00;
311 ret = s->cmos_data[s->cmos_index];
315 printf("cmos: read index=0x%02x val=0x%02x\n",
322 static void rtc_set_date_buf(RTCState *s, const struct tm *tm)
324 s->buf_data[RTC_SECONDS] = to_bcd(s, tm->tm_sec);
325 s->buf_data[RTC_MINUTES] = to_bcd(s, tm->tm_min);
326 if (s->cmos_data[RTC_REG_B] & 0x02) {
328 s->buf_data[RTC_HOURS] = to_bcd(s, tm->tm_hour);
331 s->buf_data[RTC_HOURS] = to_bcd(s, tm->tm_hour % 12);
332 if (tm->tm_hour >= 12)
333 s->buf_data[RTC_HOURS] |= 0x80;
335 s->buf_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday);
336 s->buf_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday);
337 s->buf_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1);
338 s->buf_data[RTC_YEAR] = to_bcd(s, tm->tm_year % 100);
341 static void rtc_copy_date(RTCState *s)
343 s->cmos_data[RTC_SECONDS] = s->buf_data[RTC_SECONDS];
344 s->cmos_data[RTC_MINUTES] = s->buf_data[RTC_MINUTES];
345 s->cmos_data[RTC_HOURS] = s->buf_data[RTC_HOURS];
346 s->cmos_data[RTC_DAY_OF_WEEK] = s->buf_data[RTC_DAY_OF_WEEK];
347 s->cmos_data[RTC_DAY_OF_MONTH] = s->buf_data[RTC_DAY_OF_MONTH];
348 s->cmos_data[RTC_MONTH] = s->buf_data[RTC_MONTH];
349 s->cmos_data[RTC_YEAR] = s->buf_data[RTC_YEAR];
352 void rtc_set_memory(RTCState *s, int addr, int val)
354 if (addr >= 0 && addr <= 127)
355 s->cmos_data[addr] = val;
358 void rtc_set_date(RTCState *s, const struct tm *tm)
360 s->current_time = mktime((struct tm *)tm);
361 rtc_set_date_buf(s, tm);
365 static void rtc_save(QEMUFile *f, void *opaque)
367 RTCState *s = opaque;
369 qemu_put_buffer(f, s->cmos_data, 128);
370 qemu_put_8s(f, &s->cmos_index);
371 qemu_put_be32s(f, &s->current_time);
372 qemu_put_buffer(f, s->buf_data, 10);
374 qemu_put_timer(f, s->periodic_timer);
375 qemu_put_be64s(f, &s->next_periodic_time);
377 qemu_put_be64s(f, &s->next_second_time);
378 qemu_put_timer(f, s->second_timer);
379 qemu_put_timer(f, s->second_timer2);
382 static int rtc_load(QEMUFile *f, void *opaque, int version_id)
384 RTCState *s = opaque;
389 qemu_get_buffer(f, s->cmos_data, 128);
390 qemu_get_8s(f, &s->cmos_index);
391 qemu_get_be32s(f, &s->current_time);
392 qemu_get_buffer(f, s->buf_data, 10);
394 qemu_get_timer(f, s->periodic_timer);
395 qemu_get_be64s(f, &s->next_periodic_time);
397 qemu_get_be64s(f, &s->next_second_time);
398 qemu_get_timer(f, s->second_timer);
399 qemu_get_timer(f, s->second_timer2);
403 RTCState *rtc_init(int base, int irq)
407 s = qemu_mallocz(sizeof(RTCState));
412 s->cmos_data[RTC_REG_A] = 0x26;
413 s->cmos_data[RTC_REG_B] = 0x02;
414 s->cmos_data[RTC_REG_C] = 0x00;
415 s->cmos_data[RTC_REG_D] = 0x80;
417 s->periodic_timer = qemu_new_timer(vm_clock,
418 rtc_periodic_timer, s);
419 s->second_timer = qemu_new_timer(vm_clock,
420 rtc_update_second, s);
421 s->second_timer2 = qemu_new_timer(vm_clock,
422 rtc_update_second2, s);
424 s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 100;
425 qemu_mod_timer(s->second_timer2, s->next_second_time);
427 register_ioport_write(base, 2, 1, cmos_ioport_write, s);
428 register_ioport_read(base, 2, 1, cmos_ioport_read, s);
430 register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s);