4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "exec-i386.h"
22 const uint8_t parity_table[256] = {
23 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
24 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
25 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
26 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
27 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
28 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
29 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
30 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
31 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
32 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
33 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
34 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
35 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
36 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
37 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
38 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
39 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
40 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
41 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
42 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
43 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
44 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
45 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
46 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
47 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
48 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
49 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
50 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
51 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
52 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
53 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
54 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
58 const uint8_t rclw_table[32] = {
59 0, 1, 2, 3, 4, 5, 6, 7,
60 8, 9,10,11,12,13,14,15,
61 16, 0, 1, 2, 3, 4, 5, 6,
62 7, 8, 9,10,11,12,13,14,
66 const uint8_t rclb_table[32] = {
67 0, 1, 2, 3, 4, 5, 6, 7,
68 8, 0, 1, 2, 3, 4, 5, 6,
69 7, 8, 0, 1, 2, 3, 4, 5,
70 6, 7, 8, 0, 1, 2, 3, 4,
73 const CPU86_LDouble f15rk[7] =
75 0.00000000000000000000L,
76 1.00000000000000000000L,
77 3.14159265358979323851L, /*pi*/
78 0.30102999566398119523L, /*lg2*/
79 0.69314718055994530943L, /*ln2*/
80 1.44269504088896340739L, /*l2e*/
81 3.32192809488736234781L, /*l2t*/
86 spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
90 spin_lock(&global_cpu_lock);
95 spin_unlock(&global_cpu_lock);
98 void cpu_loop_exit(void)
100 /* NOTE: the register at this point must be saved by hand because
101 longjmp restore them */
103 env->regs[R_EAX] = EAX;
106 env->regs[R_ECX] = ECX;
109 env->regs[R_EDX] = EDX;
112 env->regs[R_EBX] = EBX;
115 env->regs[R_ESP] = ESP;
118 env->regs[R_EBP] = EBP;
121 env->regs[R_ESI] = ESI;
124 env->regs[R_EDI] = EDI;
126 longjmp(env->jmp_env, 1);
130 /* full interrupt support (only useful for real CPU emulation, not
131 finished) - I won't do it any time soon, finish it if you want ! */
132 void raise_interrupt(int intno, int is_int, int error_code,
133 unsigned int next_eip)
135 SegmentDescriptorTable *dt;
141 if (intno * 8 + 7 > dt->limit)
142 raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
143 ptr = dt->base + intno * 8;
146 /* check gate type */
147 type = (e2 >> DESC_TYPE_SHIFT) & 0x1f;
149 case 5: /* task gate */
150 case 6: /* 286 interrupt gate */
151 case 7: /* 286 trap gate */
152 case 14: /* 386 interrupt gate */
153 case 15: /* 386 trap gate */
156 raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
159 dpl = (e2 >> DESC_DPL_SHIFT) & 3;
160 cpl = env->segs[R_CS] & 3;
161 /* check privledge if software int */
162 if (is_int && dpl < cpl)
163 raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
164 /* check valid bit */
165 if (!(e2 & DESC_P_MASK))
166 raise_exception_err(EXCP0B_NOSEG, intno * 8 + 2);
172 * is_int is TRUE if coming from the int instruction. next_eip is the
173 * EIP value AFTER the interrupt instruction. It is only relevant if
176 void raise_interrupt(int intno, int is_int, int error_code,
177 unsigned int next_eip)
179 SegmentDescriptorTable *dt;
185 ptr = dt->base + (intno * 8);
188 dpl = (e2 >> DESC_DPL_SHIFT) & 3;
190 /* check privledge if software int */
191 if (is_int && dpl < cpl)
192 raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
194 /* Since we emulate only user space, we cannot do more than
195 exiting the emulation with the suitable exception and error
199 env->exception_index = intno;
200 env->error_code = error_code;
207 /* shortcuts to generate exceptions */
208 void raise_exception_err(int exception_index, int error_code)
210 raise_interrupt(exception_index, 0, error_code, 0);
213 void raise_exception(int exception_index)
215 raise_interrupt(exception_index, 0, 0, 0);
218 #ifdef BUGGY_GCC_DIV64
219 /* gcc 2.95.4 on PowerPC does not seem to like using __udivdi3, so we
220 call it from another function */
221 uint32_t div64(uint32_t *q_ptr, uint64_t num, uint32_t den)
227 int32_t idiv64(int32_t *q_ptr, int64_t num, int32_t den)
234 void helper_divl_EAX_T0(uint32_t eip)
236 unsigned int den, q, r;
239 num = EAX | ((uint64_t)EDX << 32);
243 raise_exception(EXCP00_DIVZ);
245 #ifdef BUGGY_GCC_DIV64
246 r = div64(&q, num, den);
255 void helper_idivl_EAX_T0(uint32_t eip)
260 num = EAX | ((uint64_t)EDX << 32);
264 raise_exception(EXCP00_DIVZ);
266 #ifdef BUGGY_GCC_DIV64
267 r = idiv64(&q, num, den);
276 void helper_cmpxchg8b(void)
281 eflags = cc_table[CC_OP].compute_all();
282 d = ldq((uint8_t *)A0);
283 if (d == (((uint64_t)EDX << 32) | EAX)) {
284 stq((uint8_t *)A0, ((uint64_t)ECX << 32) | EBX);
294 /* We simulate a pre-MMX pentium as in valgrind */
295 #define CPUID_FP87 (1 << 0)
296 #define CPUID_VME (1 << 1)
297 #define CPUID_DE (1 << 2)
298 #define CPUID_PSE (1 << 3)
299 #define CPUID_TSC (1 << 4)
300 #define CPUID_MSR (1 << 5)
301 #define CPUID_PAE (1 << 6)
302 #define CPUID_MCE (1 << 7)
303 #define CPUID_CX8 (1 << 8)
304 #define CPUID_APIC (1 << 9)
305 #define CPUID_SEP (1 << 11) /* sysenter/sysexit */
306 #define CPUID_MTRR (1 << 12)
307 #define CPUID_PGE (1 << 13)
308 #define CPUID_MCA (1 << 14)
309 #define CPUID_CMOV (1 << 15)
311 #define CPUID_MMX (1 << 23)
312 #define CPUID_FXSR (1 << 24)
313 #define CPUID_SSE (1 << 25)
314 #define CPUID_SSE2 (1 << 26)
316 void helper_cpuid(void)
319 EAX = 1; /* max EAX index supported */
323 } else if (EAX == 1) {
328 EDX = CPUID_FP87 | CPUID_DE | CPUID_PSE |
329 CPUID_TSC | CPUID_MSR | CPUID_MCE |
334 /* only works if protected mode and not VM86 */
335 void load_seg(int seg_reg, int selector, unsigned cur_eip)
338 SegmentDescriptorTable *dt;
343 sc = &env->seg_cache[seg_reg];
344 if ((selector & 0xfffc) == 0) {
345 /* null selector case */
346 if (seg_reg == R_SS) {
348 raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
350 /* XXX: each access should trigger an exception */
360 index = selector & ~7;
361 if ((index + 7) > dt->limit) {
363 raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
365 ptr = dt->base + index;
368 if (!(e2 & DESC_S_MASK) ||
369 (e2 & (DESC_CS_MASK | DESC_R_MASK)) == DESC_CS_MASK) {
371 raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
374 if (seg_reg == R_SS) {
375 if ((e2 & (DESC_CS_MASK | DESC_W_MASK)) == 0) {
377 raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
380 if ((e2 & (DESC_CS_MASK | DESC_R_MASK)) == DESC_CS_MASK) {
382 raise_exception_err(EXCP0D_GPF, selector & 0xfffc);
386 if (!(e2 & DESC_P_MASK)) {
389 raise_exception_err(EXCP0C_STACK, selector & 0xfffc);
391 raise_exception_err(EXCP0B_NOSEG, selector & 0xfffc);
394 sc->base = (void *)((e1 >> 16) | ((e2 & 0xff) << 16) | (e2 & 0xff000000));
395 sc->limit = (e1 & 0xffff) | (e2 & 0x000f0000);
397 sc->limit = (sc->limit << 12) | 0xfff;
398 sc->seg_32bit = (e2 >> 22) & 1;
400 fprintf(logfile, "load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx seg_32bit=%d\n",
401 selector, (unsigned long)sc->base, sc->limit, sc->seg_32bit);
404 env->segs[seg_reg] = selector;
412 void helper_rdtsc(void)
416 asm("rdtsc" : "=A" (val));
418 /* better than nothing: the time increases */
425 void helper_lsl(void)
427 unsigned int selector, limit;
428 SegmentDescriptorTable *dt;
433 CC_SRC = cc_table[CC_OP].compute_all() & ~CC_Z;
434 selector = T0 & 0xffff;
439 index = selector & ~7;
440 if ((index + 7) > dt->limit)
442 ptr = dt->base + index;
445 limit = (e1 & 0xffff) | (e2 & 0x000f0000);
447 limit = (limit << 12) | 0xfff;
452 void helper_lar(void)
454 unsigned int selector;
455 SegmentDescriptorTable *dt;
460 CC_SRC = cc_table[CC_OP].compute_all() & ~CC_Z;
461 selector = T0 & 0xffff;
466 index = selector & ~7;
467 if ((index + 7) > dt->limit)
469 ptr = dt->base + index;
471 T1 = e2 & 0x00f0ff00;
477 #ifndef USE_X86LDOUBLE
478 void helper_fldt_ST0_A0(void)
480 ST0 = helper_fldt((uint8_t *)A0);
483 void helper_fstt_ST0_A0(void)
485 helper_fstt(ST0, (uint8_t *)A0);
491 #define MUL10(iv) ( iv + iv + (iv << 3) )
493 void helper_fbld_ST0_A0(void)
496 CPU86_LDouble fpsrcop;
500 /* in this code, seg/m32i will be used as temporary ptr/int */
501 seg = (uint8_t *)A0 + 8;
503 /* XXX: raise exception */
507 /* XXX: raise exception */
510 m32i = v; /* <-- d14 */
512 m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d13 */
513 m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d12 */
515 m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d11 */
516 m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d10 */
518 m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d9 */
519 m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d8 */
520 fpsrcop = ((CPU86_LDouble)m32i) * 100000000.0;
523 m32i = (v >> 4); /* <-- d7 */
524 m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d6 */
526 m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d5 */
527 m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d4 */
529 m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d3 */
530 m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d2 */
532 m32i = MUL10(m32i) + (v >> 4); /* <-- val * 10 + d1 */
533 m32i = MUL10(m32i) + (v & 0xf); /* <-- val * 10 + d0 */
534 fpsrcop += ((CPU86_LDouble)m32i);
535 if ( ldub(seg+9) & 0x80 )
540 void helper_fbst_ST0_A0(void)
542 CPU86_LDouble fptemp;
543 CPU86_LDouble fpsrcop;
545 uint8_t *mem_ref, *mem_end;
548 mem_ref = (uint8_t *)A0;
549 mem_end = mem_ref + 8;
550 if ( fpsrcop < 0.0 ) {
551 stw(mem_end, 0x8000);
554 stw(mem_end, 0x0000);
556 while (mem_ref < mem_end) {
559 fptemp = floor(fpsrcop/10.0);
560 v = ((int)(fpsrcop - fptemp*10.0));
566 fptemp = floor(fpsrcop/10.0);
567 v |= (((int)(fpsrcop - fptemp*10.0)) << 4);
571 while (mem_ref < mem_end) {
576 void helper_f2xm1(void)
578 ST0 = pow(2.0,ST0) - 1.0;
581 void helper_fyl2x(void)
583 CPU86_LDouble fptemp;
587 fptemp = log(fptemp)/log(2.0); /* log2(ST) */
591 env->fpus &= (~0x4700);
596 void helper_fptan(void)
598 CPU86_LDouble fptemp;
601 if((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
607 env->fpus &= (~0x400); /* C2 <-- 0 */
608 /* the above code is for |arg| < 2**52 only */
612 void helper_fpatan(void)
614 CPU86_LDouble fptemp, fpsrcop;
618 ST1 = atan2(fpsrcop,fptemp);
622 void helper_fxtract(void)
628 expdif = EXPD(temp) - EXPBIAS;
636 void helper_fprem1(void)
638 CPU86_LDouble dblq, fpsrcop, fptemp;
639 CPU86_LDoubleU fpsrcop1, fptemp1;
645 fpsrcop1.d = fpsrcop;
647 expdif = EXPD(fpsrcop1) - EXPD(fptemp1);
649 dblq = fpsrcop / fptemp;
650 dblq = (dblq < 0.0)? ceil(dblq): floor(dblq);
651 ST0 = fpsrcop - fptemp*dblq;
652 q = (int)dblq; /* cutting off top bits is assumed here */
653 env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
654 /* (C0,C1,C3) <-- (q2,q1,q0) */
655 env->fpus |= (q&0x4) << 6; /* (C0) <-- q2 */
656 env->fpus |= (q&0x2) << 8; /* (C1) <-- q1 */
657 env->fpus |= (q&0x1) << 14; /* (C3) <-- q0 */
659 env->fpus |= 0x400; /* C2 <-- 1 */
660 fptemp = pow(2.0, expdif-50);
661 fpsrcop = (ST0 / ST1) / fptemp;
662 /* fpsrcop = integer obtained by rounding to the nearest */
663 fpsrcop = (fpsrcop-floor(fpsrcop) < ceil(fpsrcop)-fpsrcop)?
664 floor(fpsrcop): ceil(fpsrcop);
665 ST0 -= (ST1 * fpsrcop * fptemp);
669 void helper_fprem(void)
671 CPU86_LDouble dblq, fpsrcop, fptemp;
672 CPU86_LDoubleU fpsrcop1, fptemp1;
678 fpsrcop1.d = fpsrcop;
680 expdif = EXPD(fpsrcop1) - EXPD(fptemp1);
682 dblq = fpsrcop / fptemp;
683 dblq = (dblq < 0.0)? ceil(dblq): floor(dblq);
684 ST0 = fpsrcop - fptemp*dblq;
685 q = (int)dblq; /* cutting off top bits is assumed here */
686 env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
687 /* (C0,C1,C3) <-- (q2,q1,q0) */
688 env->fpus |= (q&0x4) << 6; /* (C0) <-- q2 */
689 env->fpus |= (q&0x2) << 8; /* (C1) <-- q1 */
690 env->fpus |= (q&0x1) << 14; /* (C3) <-- q0 */
692 env->fpus |= 0x400; /* C2 <-- 1 */
693 fptemp = pow(2.0, expdif-50);
694 fpsrcop = (ST0 / ST1) / fptemp;
695 /* fpsrcop = integer obtained by chopping */
696 fpsrcop = (fpsrcop < 0.0)?
697 -(floor(fabs(fpsrcop))): floor(fpsrcop);
698 ST0 -= (ST1 * fpsrcop * fptemp);
702 void helper_fyl2xp1(void)
704 CPU86_LDouble fptemp;
707 if ((fptemp+1.0)>0.0) {
708 fptemp = log(fptemp+1.0) / log(2.0); /* log2(ST+1.0) */
712 env->fpus &= (~0x4700);
717 void helper_fsqrt(void)
719 CPU86_LDouble fptemp;
723 env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
729 void helper_fsincos(void)
731 CPU86_LDouble fptemp;
734 if ((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
740 env->fpus &= (~0x400); /* C2 <-- 0 */
741 /* the above code is for |arg| < 2**63 only */
745 void helper_frndint(void)
751 switch(env->fpuc & RC_MASK) {
754 asm("rndd %0, %1" : "=f" (a) : "f"(a));
757 asm("rnddm %0, %1" : "=f" (a) : "f"(a));
760 asm("rnddp %0, %1" : "=f" (a) : "f"(a));
763 asm("rnddz %0, %1" : "=f" (a) : "f"(a));
772 void helper_fscale(void)
774 CPU86_LDouble fpsrcop, fptemp;
777 fptemp = pow(fpsrcop,ST1);
781 void helper_fsin(void)
783 CPU86_LDouble fptemp;
786 if ((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
790 env->fpus &= (~0x400); /* C2 <-- 0 */
791 /* the above code is for |arg| < 2**53 only */
795 void helper_fcos(void)
797 CPU86_LDouble fptemp;
800 if((fptemp > MAXTAN)||(fptemp < -MAXTAN)) {
804 env->fpus &= (~0x400); /* C2 <-- 0 */
805 /* the above code is for |arg5 < 2**63 only */
809 void helper_fxam_ST0(void)
816 env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
818 env->fpus |= 0x200; /* C1 <-- 1 */
821 if (expdif == MAXEXPD) {
822 if (MANTD(temp) == 0)
823 env->fpus |= 0x500 /*Infinity*/;
825 env->fpus |= 0x100 /*NaN*/;
826 } else if (expdif == 0) {
827 if (MANTD(temp) == 0)
828 env->fpus |= 0x4000 /*Zero*/;
830 env->fpus |= 0x4400 /*Denormal*/;
836 void helper_fstenv(uint8_t *ptr, int data32)
838 int fpus, fptag, exp, i;
842 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
844 for (i=7; i>=0; i--) {
846 if (env->fptags[i]) {
849 tmp.d = env->fpregs[i];
852 if (exp == 0 && mant == 0) {
855 } else if (exp == 0 || exp == MAXEXPD
856 #ifdef USE_X86LDOUBLE
857 || (mant & (1LL << 63)) == 0
860 /* NaNs, infinity, denormal */
886 void helper_fldenv(uint8_t *ptr, int data32)
891 env->fpuc = lduw(ptr);
892 fpus = lduw(ptr + 4);
893 fptag = lduw(ptr + 8);
896 env->fpuc = lduw(ptr);
897 fpus = lduw(ptr + 2);
898 fptag = lduw(ptr + 4);
900 env->fpstt = (fpus >> 11) & 7;
901 env->fpus = fpus & ~0x3800;
902 for(i = 0;i < 7; i++) {
903 env->fptags[i] = ((fptag & 3) == 3);
908 void helper_fsave(uint8_t *ptr, int data32)
913 helper_fstenv(ptr, data32);
915 ptr += (14 << data32);
916 for(i = 0;i < 8; i++) {
918 #ifdef USE_X86LDOUBLE
919 *(long double *)ptr = tmp;
921 helper_fstt(tmp, ptr);
940 void helper_frstor(uint8_t *ptr, int data32)
945 helper_fldenv(ptr, data32);
946 ptr += (14 << data32);
948 for(i = 0;i < 8; i++) {
949 #ifdef USE_X86LDOUBLE
950 tmp = *(long double *)ptr;
952 tmp = helper_fldt(ptr);