2 * i386 emulator main execution loop
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "exec-i386.h"
24 //#define DEBUG_SIGNAL
26 /* main execution loop */
28 /* maximum total translate dcode allocated */
29 #define CODE_GEN_BUFFER_SIZE (2048 * 1024)
30 //#define CODE_GEN_BUFFER_SIZE (128 * 1024)
31 #define CODE_GEN_MAX_SIZE 65536
32 #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
34 /* threshold to flush the translated code buffer */
35 #define CODE_GEN_BUFFER_MAX_SIZE (CODE_GEN_BUFFER_SIZE - CODE_GEN_MAX_SIZE)
37 #define CODE_GEN_MAX_BLOCKS (CODE_GEN_BUFFER_SIZE / 64)
38 #define CODE_GEN_HASH_BITS 15
39 #define CODE_GEN_HASH_SIZE (1 << CODE_GEN_HASH_BITS)
41 typedef struct TranslationBlock {
42 unsigned long pc; /* simulated PC corresponding to this block (EIP + CS base) */
43 unsigned long cs_base; /* CS base for this block */
44 unsigned int flags; /* flags defining in which context the code was generated */
45 uint8_t *tc_ptr; /* pointer to the translated code */
46 struct TranslationBlock *hash_next; /* next matching block */
49 TranslationBlock tbs[CODE_GEN_MAX_BLOCKS];
50 TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
53 uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
54 uint8_t *code_gen_ptr;
59 static inline int testandset (int *p)
62 __asm__ __volatile__ (
70 : "r" (p), "r" (1), "r" (0)
77 static inline int testandset (int *p)
82 __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
83 : "=q" (ret), "=m" (*p), "=a" (readval)
84 : "r" (1), "m" (*p), "a" (0)
90 int global_cpu_lock = 0;
94 while (testandset(&global_cpu_lock));
102 /* exception support */
103 /* NOTE: not static to force relocation generation by GCC */
104 void raise_exception(int exception_index)
106 /* NOTE: the register at this point must be saved by hand because
107 longjmp restore them */
109 env->regs[R_EAX] = EAX;
112 env->regs[R_ECX] = ECX;
115 env->regs[R_EDX] = EDX;
118 env->regs[R_EBX] = EBX;
121 env->regs[R_ESP] = ESP;
124 env->regs[R_EBP] = EBP;
127 env->regs[R_ESI] = ESI;
130 env->regs[R_EDI] = EDI;
132 env->exception_index = exception_index;
133 longjmp(env->jmp_env, 1);
136 #if defined(DEBUG_EXEC)
137 static const char *cc_op_str[] = {
170 static void cpu_x86_dump_state(FILE *f)
173 eflags = cc_table[CC_OP].compute_all();
174 eflags |= (DF & DIRECTION_FLAG);
176 "EAX=%08x EBX=%08X ECX=%08x EDX=%08x\n"
177 "ESI=%08x EDI=%08X EBP=%08x ESP=%08x\n"
178 "CCS=%08x CCD=%08x CCO=%-8s EFL=%c%c%c%c%c%c%c\n"
180 env->regs[R_EAX], env->regs[R_EBX], env->regs[R_ECX], env->regs[R_EDX],
181 env->regs[R_ESI], env->regs[R_EDI], env->regs[R_EBP], env->regs[R_ESP],
182 env->cc_src, env->cc_dst, cc_op_str[env->cc_op],
183 eflags & DIRECTION_FLAG ? 'D' : '-',
184 eflags & CC_O ? 'O' : '-',
185 eflags & CC_S ? 'S' : '-',
186 eflags & CC_Z ? 'Z' : '-',
187 eflags & CC_A ? 'A' : '-',
188 eflags & CC_P ? 'P' : '-',
189 eflags & CC_C ? 'C' : '-',
192 fprintf(f, "ST0=%f ST1=%f ST2=%f ST3=%f\n",
193 (double)ST0, (double)ST1, (double)ST(2), (double)ST(3));
199 void cpu_x86_tblocks_init(void)
202 code_gen_ptr = code_gen_buffer;
206 /* flush all the translation blocks */
207 static void tb_flush(void)
211 printf("gemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n",
212 code_gen_ptr - code_gen_buffer,
214 (code_gen_ptr - code_gen_buffer) / nb_tbs);
217 for(i = 0;i < CODE_GEN_HASH_SIZE; i++)
219 code_gen_ptr = code_gen_buffer;
220 /* XXX: flush processor icache at this point */
223 /* find a translation block in the translation cache. If not found,
224 return NULL and the pointer to the last element of the list in pptb */
225 static inline TranslationBlock *tb_find(TranslationBlock ***pptb,
227 unsigned long cs_base,
230 TranslationBlock **ptb, *tb;
233 h = pc & (CODE_GEN_HASH_SIZE - 1);
239 if (tb->pc == pc && tb->cs_base == cs_base && tb->flags == flags)
241 ptb = &tb->hash_next;
247 /* allocate a new translation block. flush the translation buffer if
248 too many translation blocks or too much generated code */
249 static inline TranslationBlock *tb_alloc(void)
251 TranslationBlock *tb;
252 if (nb_tbs >= CODE_GEN_MAX_BLOCKS ||
253 (code_gen_ptr - code_gen_buffer) >= CODE_GEN_BUFFER_MAX_SIZE)
259 int cpu_x86_exec(CPUX86State *env1)
261 int saved_T0, saved_T1, saved_A0;
262 CPUX86State *saved_env;
287 int code_gen_size, ret;
288 void (*gen_func)(void);
289 TranslationBlock *tb, **ptb;
290 uint8_t *tc_ptr, *cs_base, *pc;
293 /* first we save global registers */
301 EAX = env->regs[R_EAX];
305 ECX = env->regs[R_ECX];
309 EDX = env->regs[R_EDX];
313 EBX = env->regs[R_EBX];
317 ESP = env->regs[R_ESP];
321 EBP = env->regs[R_EBP];
325 ESI = env->regs[R_ESI];
329 EDI = env->regs[R_EDI];
332 /* put eflags in CPU temporary format */
333 CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
334 DF = 1 - (2 * ((env->eflags >> 10) & 1));
335 CC_OP = CC_OP_EFLAGS;
336 env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
337 env->interrupt_request = 0;
339 /* prepare setjmp context for exception handling */
340 if (setjmp(env->jmp_env) == 0) {
342 if (env->interrupt_request) {
343 raise_exception(EXCP_INTERRUPT);
347 cpu_x86_dump_state(logfile);
350 /* we compute the CPU state. We assume it will not
351 change during the whole generated block. */
352 flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT;
353 flags |= env->seg_cache[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT;
354 flags |= (((unsigned long)env->seg_cache[R_DS].base |
355 (unsigned long)env->seg_cache[R_ES].base |
356 (unsigned long)env->seg_cache[R_SS].base) != 0) <<
357 GEN_FLAG_ADDSEG_SHIFT;
358 flags |= (env->eflags & VM_MASK) >> (17 - GEN_FLAG_VM_SHIFT);
359 cs_base = env->seg_cache[R_CS].base;
360 pc = cs_base + env->eip;
361 tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base,
364 /* if no translated code available, then translate it now */
365 /* XXX: very inefficient: we lock all the cpus when
368 tc_ptr = code_gen_ptr;
369 ret = cpu_x86_gen_code(code_gen_ptr, CODE_GEN_MAX_SIZE,
370 &code_gen_size, pc, cs_base, flags);
371 /* if invalid instruction, signal it */
374 raise_exception(EXCP06_ILLOP);
378 tb->pc = (unsigned long)pc;
379 tb->cs_base = (unsigned long)cs_base;
382 tb->hash_next = NULL;
383 code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
386 /* execute the generated code */
388 gen_func = (void *)tc_ptr;
392 ret = env->exception_index;
394 /* restore flags in standard format */
395 env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
397 /* restore global registers */
429 void cpu_x86_interrupt(CPUX86State *s)
431 s->interrupt_request = 1;
435 void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
437 CPUX86State *saved_env;
441 load_seg(seg_reg, selector);
455 #include <sys/ucontext.h>
457 static inline int handle_cpu_signal(unsigned long pc,
461 printf("gemu: SIGSEGV pc=0x%08lx oldset=0x%08lx\n",
462 pc, *(unsigned long *)old_set);
464 if (pc >= (unsigned long)code_gen_buffer &&
465 pc < (unsigned long)code_gen_buffer + CODE_GEN_BUFFER_SIZE) {
466 /* the PC is inside the translated code. It means that we have
467 a virtual CPU fault */
468 /* we restore the process signal mask as the sigreturn should
470 sigprocmask(SIG_SETMASK, old_set, NULL);
471 /* XXX: need to compute virtual pc position by retranslating
472 code. The rest of the CPU state should be correct. */
473 raise_exception(EXCP0D_GPF);
474 /* never comes here */
481 int cpu_x86_signal_handler(int host_signum, struct siginfo *info,
484 #if defined(__i386__)
485 struct ucontext *uc = puc;
493 pc = uc->uc_mcontext.gregs[REG_EIP];
494 pold_set = &uc->uc_sigmask;
495 return handle_cpu_signal(pc, pold_set);
497 #warning No CPU specific signal handler: cannot handle target SIGSEGV events