2 * defines common to all virtual CPUs
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #if defined(__arm__) || defined(__sparc__)
27 /* some important defines:
29 * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
32 * WORDS_BIGENDIAN : if defined, the host cpu is big endian and
33 * otherwise little endian.
35 * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
37 * TARGET_WORDS_BIGENDIAN : same for target cpu
40 /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
43 #if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
57 /* CPU memory access without any memory or io remapping */
59 static inline int ldub_raw(void *ptr)
61 return *(uint8_t *)ptr;
64 static inline int ldsb_raw(void *ptr)
66 return *(int8_t *)ptr;
69 static inline void stb_raw(void *ptr, int v)
74 /* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
75 kernel handles unaligned load/stores may give better results, but
76 it is a system wide setting : bad */
77 #if !defined(TARGET_WORDS_BIGENDIAN) && (defined(WORDS_BIGENDIAN) || defined(WORDS_ALIGNED))
79 /* conservative code for little endian unaligned accesses */
80 static inline int lduw_raw(void *ptr)
84 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
88 return p[0] | (p[1] << 8);
92 static inline int ldsw_raw(void *ptr)
96 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
100 return (int16_t)(p[0] | (p[1] << 8));
104 static inline int ldl_raw(void *ptr)
108 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
112 return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
116 static inline uint64_t ldq_raw(void *ptr)
122 return v1 | ((uint64_t)v2 << 32);
125 static inline void stw_raw(void *ptr, int v)
128 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
136 static inline void stl_raw(void *ptr, int v)
139 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
149 static inline void stq_raw(void *ptr, uint64_t v)
152 stl_raw(p, (uint32_t)v);
153 stl_raw(p + 4, v >> 32);
158 static inline float ldfl_raw(void *ptr)
168 static inline void stfl_raw(void *ptr, float v)
178 static inline double ldfq_raw(void *ptr)
181 u.l.lower = ldl_raw(ptr);
182 u.l.upper = ldl_raw(ptr + 4);
186 static inline void stfq_raw(void *ptr, double v)
190 stl_raw(ptr, u.l.lower);
191 stl_raw(ptr + 4, u.l.upper);
194 #elif defined(TARGET_WORDS_BIGENDIAN) && (!defined(WORDS_BIGENDIAN) || defined(WORDS_ALIGNED))
196 static inline int lduw_raw(void *ptr)
198 uint8_t *b = (uint8_t *) ptr;
199 return (b[0]<<8|b[1]);
202 static inline int ldsw_raw(void *ptr)
204 int8_t *b = (int8_t *) ptr;
205 return (b[0]<<8|b[1]);
208 static inline int ldl_raw(void *ptr)
210 uint8_t *b = (uint8_t *) ptr;
211 return (b[0]<<24|b[1]<<16|b[2]<<8|b[3]);
214 static inline uint64_t ldq_raw(void *ptr)
219 return (((uint64_t)a<<32)|b);
222 static inline void stw_raw(void *ptr, int v)
224 uint8_t *d = (uint8_t *) ptr;
229 static inline void stl_raw(void *ptr, int v)
231 uint8_t *d = (uint8_t *) ptr;
238 static inline void stq_raw(void *ptr, uint64_t v)
240 stl_raw(ptr, v >> 32);
246 static inline float ldfl_raw(void *ptr)
256 static inline void stfl_raw(void *ptr, float v)
266 static inline double ldfq_raw(void *ptr)
269 u.l.upper = ldl_raw(ptr);
270 u.l.lower = ldl_raw(ptr + 4);
274 static inline void stfq_raw(void *ptr, double v)
278 stl_raw(ptr, u.l.upper);
279 stl_raw(ptr + 4, u.l.lower);
284 static inline int lduw_raw(void *ptr)
286 return *(uint16_t *)ptr;
289 static inline int ldsw_raw(void *ptr)
291 return *(int16_t *)ptr;
294 static inline int ldl_raw(void *ptr)
296 return *(uint32_t *)ptr;
299 static inline uint64_t ldq_raw(void *ptr)
301 return *(uint64_t *)ptr;
304 static inline void stw_raw(void *ptr, int v)
306 *(uint16_t *)ptr = v;
309 static inline void stl_raw(void *ptr, int v)
311 *(uint32_t *)ptr = v;
314 static inline void stq_raw(void *ptr, uint64_t v)
316 *(uint64_t *)ptr = v;
321 static inline float ldfl_raw(void *ptr)
323 return *(float *)ptr;
326 static inline double ldfq_raw(void *ptr)
328 return *(double *)ptr;
331 static inline void stfl_raw(void *ptr, float v)
336 static inline void stfq_raw(void *ptr, double v)
342 /* MMU memory access macros */
344 #if defined(CONFIG_USER_ONLY)
346 /* if user mode, no other memory access functions */
347 #define ldub(p) ldub_raw(p)
348 #define ldsb(p) ldsb_raw(p)
349 #define lduw(p) lduw_raw(p)
350 #define ldsw(p) ldsw_raw(p)
351 #define ldl(p) ldl_raw(p)
352 #define ldq(p) ldq_raw(p)
353 #define ldfl(p) ldfl_raw(p)
354 #define ldfq(p) ldfq_raw(p)
355 #define stb(p, v) stb_raw(p, v)
356 #define stw(p, v) stw_raw(p, v)
357 #define stl(p, v) stl_raw(p, v)
358 #define stq(p, v) stq_raw(p, v)
359 #define stfl(p, v) stfl_raw(p, v)
360 #define stfq(p, v) stfq_raw(p, v)
362 #define ldub_code(p) ldub_raw(p)
363 #define ldsb_code(p) ldsb_raw(p)
364 #define lduw_code(p) lduw_raw(p)
365 #define ldsw_code(p) ldsw_raw(p)
366 #define ldl_code(p) ldl_raw(p)
368 #define ldub_kernel(p) ldub_raw(p)
369 #define ldsb_kernel(p) ldsb_raw(p)
370 #define lduw_kernel(p) lduw_raw(p)
371 #define ldsw_kernel(p) ldsw_raw(p)
372 #define ldl_kernel(p) ldl_raw(p)
373 #define ldfl_kernel(p) ldfl_raw(p)
374 #define ldfq_kernel(p) ldfq_raw(p)
375 #define stb_kernel(p, v) stb_raw(p, v)
376 #define stw_kernel(p, v) stw_raw(p, v)
377 #define stl_kernel(p, v) stl_raw(p, v)
378 #define stq_kernel(p, v) stq_raw(p, v)
379 #define stfl_kernel(p, v) stfl_raw(p, v)
380 #define stfq_kernel(p, vt) stfq_raw(p, v)
382 #endif /* defined(CONFIG_USER_ONLY) */
384 /* page related stuff */
386 #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
387 #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
388 #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
390 extern unsigned long real_host_page_size;
391 extern unsigned long host_page_bits;
392 extern unsigned long host_page_size;
393 extern unsigned long host_page_mask;
395 #define HOST_PAGE_ALIGN(addr) (((addr) + host_page_size - 1) & host_page_mask)
397 /* same as PROT_xxx */
398 #define PAGE_READ 0x0001
399 #define PAGE_WRITE 0x0002
400 #define PAGE_EXEC 0x0004
401 #define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
402 #define PAGE_VALID 0x0008
403 /* original state of the write flag (used when tracking self-modifying
405 #define PAGE_WRITE_ORG 0x0010
407 void page_dump(FILE *f);
408 int page_get_flags(unsigned long address);
409 void page_set_flags(unsigned long start, unsigned long end, int flags);
410 void page_unprotect_range(uint8_t *data, unsigned long data_size);
412 #define SINGLE_CPU_DEFINES
413 #ifdef SINGLE_CPU_DEFINES
415 #if defined(TARGET_I386)
417 #define CPUState CPUX86State
418 #define cpu_init cpu_x86_init
419 #define cpu_exec cpu_x86_exec
420 #define cpu_gen_code cpu_x86_gen_code
421 #define cpu_interrupt cpu_x86_interrupt
422 #define cpu_signal_handler cpu_x86_signal_handler
423 #define cpu_dump_state cpu_x86_dump_state
425 #elif defined(TARGET_ARM)
427 #define CPUState CPUARMState
428 #define cpu_init cpu_arm_init
429 #define cpu_exec cpu_arm_exec
430 #define cpu_gen_code cpu_arm_gen_code
431 #define cpu_interrupt cpu_arm_interrupt
432 #define cpu_signal_handler cpu_arm_signal_handler
433 #define cpu_dump_state cpu_arm_dump_state
435 #elif defined(TARGET_SPARC)
437 #define CPUState CPUSPARCState
438 #define cpu_init cpu_sparc_init
439 #define cpu_exec cpu_sparc_exec
440 #define cpu_gen_code cpu_sparc_gen_code
441 #define cpu_interrupt cpu_sparc_interrupt
442 #define cpu_signal_handler cpu_sparc_signal_handler
443 #define cpu_dump_state cpu_sparc_dump_state
445 #elif defined(TARGET_PPC)
447 #define CPUState CPUPPCState
448 #define cpu_init cpu_ppc_init
449 #define cpu_exec cpu_ppc_exec
450 #define cpu_gen_code cpu_ppc_gen_code
451 #define cpu_interrupt cpu_ppc_interrupt
452 #define cpu_signal_handler cpu_ppc_signal_handler
453 #define cpu_dump_state cpu_ppc_dump_state
457 #error unsupported target CPU
461 #endif /* SINGLE_CPU_DEFINES */
463 #define DEFAULT_GDBSTUB_PORT 1234
465 void cpu_abort(CPUState *env, const char *fmt, ...);
466 extern CPUState *cpu_single_env;
468 #define CPU_INTERRUPT_EXIT 0x01 /* wants exit from main loop */
469 #define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */
470 void cpu_interrupt(CPUState *s, int mask);
472 int cpu_breakpoint_insert(CPUState *env, uint32_t pc);
473 int cpu_breakpoint_remove(CPUState *env, uint32_t pc);
474 void cpu_single_step(CPUState *env, int enabled);
476 #define CPU_LOG_ALL 1
477 void cpu_set_log(int log_flags);
478 void cpu_set_log_filename(const char *filename);
482 /* NOTE: as these functions may be even used when there is an isa
483 brige on non x86 targets, we always defined them */
484 #ifndef NO_CPU_IO_DEFS
485 void cpu_outb(CPUState *env, int addr, int val);
486 void cpu_outw(CPUState *env, int addr, int val);
487 void cpu_outl(CPUState *env, int addr, int val);
488 int cpu_inb(CPUState *env, int addr);
489 int cpu_inw(CPUState *env, int addr);
490 int cpu_inl(CPUState *env, int addr);
495 extern int phys_ram_size;
496 extern int phys_ram_fd;
497 extern uint8_t *phys_ram_base;
499 /* physical memory access */
500 #define IO_MEM_NB_ENTRIES 256
501 #define TLB_INVALID_MASK (1 << 3)
502 #define IO_MEM_SHIFT 4
504 #define IO_MEM_RAM (0 << IO_MEM_SHIFT) /* hardcoded offset */
505 #define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */
506 #define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT)
507 #define IO_MEM_CODE (3 << IO_MEM_SHIFT)
509 typedef void CPUWriteMemoryFunc(uint32_t addr, uint32_t value);
510 typedef uint32_t CPUReadMemoryFunc(uint32_t addr);
512 void cpu_register_physical_memory(unsigned long start_addr, unsigned long size,
514 int cpu_register_io_memory(int io_index,
515 CPUReadMemoryFunc **mem_read,
516 CPUWriteMemoryFunc **mem_write);
519 extern int gdbstub_fd;
520 CPUState *cpu_gdbstub_get_env(void *opaque);
521 int cpu_gdbstub(void *opaque, int (*main_loop)(void *opaque), int port);
523 #endif /* CPU_ALL_H */