2 * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
4 * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and
5 * Jerremy Koot (jkoot@snes9x.com)
7 * Super FX C emulator code
8 * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and
10 * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_.
12 * DSP1 emulator code (c) Copyright 1998 Ivar_Demo_ and Gary Henderson.
13 * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_.
14 * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com).
16 * DOS port code contains the works of other authors. See headers in
19 * Snes9x homepage: http://www.snes9x.com
21 * Permission to usecopymodify and distribute Snes9x in both binary and
22 * source formfor non-commercial purposesis hereby granted without fee,
23 * providing that this license information and copyright notice appear with
24 * all copies and any derived work.
26 * This software is provided 'as-is'without any express or implied
27 * warranty. In no event shall the authors be held liable for any damages
28 * arising from the use of this software.
30 * Snes9x is freeware for PERSONAL USE only. Commercial users should
31 * seek permission of the copyright holders first. Commercial use includes
32 * charging money for Snes9x or software derived from Snes9x.
34 * The copyright holders request that bug fixes and improvements to the code
35 * should be forwarded to them so everyone can benefit from the modifications
38 * Super NES and Super Nintendo Entertainment System are trademarks of
39 * Nintendo Co.Limited and its subsidiary companies.
41 /**********************************************************************************************/
42 /* CPU-S9xOpcodes.CPP */
43 /* This file contains all the opcodes */
44 /**********************************************************************************************/
52 #define ApuSync() do { \
53 CPU.Cycles = CPU.NextEvent; \
54 if (CPU.APU_APUExecuting) { \
55 ICPU.CPUExecuting = FALSE; \
59 } while (CPU.APU_Cycles < CPU.NextEvent); \
60 ICPU.CPUExecuting = TRUE; \
65 /* ADC *************************************************************************************** */
68 long OpAddress = Immediate8 ();
74 long OpAddress = Immediate16 ();
80 long OpAddress = Direct ();
86 long OpAddress = Direct ();
92 long OpAddress = DirectIndexedX ();
98 long OpAddress = DirectIndexedX ();
102 static void Op72M1 ()
104 long OpAddress = DirectIndirect ();
108 static void Op72M0 ()
110 long OpAddress = DirectIndirect ();
114 static void Op61M1 ()
116 long OpAddress = DirectIndexedIndirect ();
120 static void Op61M0 ()
122 long OpAddress = DirectIndexedIndirect ();
126 static void Op71M1 ()
128 long OpAddress = DirectIndirectIndexed ();
132 static void Op71M0 ()
134 long OpAddress = DirectIndirectIndexed ();
138 static void Op67M1 ()
140 long OpAddress = DirectIndirectLong ();
144 static void Op67M0 ()
146 long OpAddress = DirectIndirectLong ();
150 static void Op77M1 ()
152 long OpAddress = DirectIndirectIndexedLong ();
156 static void Op77M0 ()
158 long OpAddress = DirectIndirectIndexedLong ();
162 static void Op6DM1 ()
164 long OpAddress = Absolute ();
168 static void Op6DM0 ()
170 long OpAddress = Absolute ();
174 static void Op7DM1 ()
176 long OpAddress = AbsoluteIndexedX ();
180 static void Op7DM0 ()
182 long OpAddress = AbsoluteIndexedX ();
186 static void Op79M1 ()
188 long OpAddress = AbsoluteIndexedY ();
192 static void Op79M0 ()
194 long OpAddress = AbsoluteIndexedY ();
198 static void Op6FM1 ()
200 long OpAddress = AbsoluteLong ();
204 static void Op6FM0 ()
206 long OpAddress = AbsoluteLong ();
210 static void Op7FM1 ()
212 long OpAddress = AbsoluteLongIndexedX ();
216 static void Op7FM0 ()
218 long OpAddress = AbsoluteLongIndexedX ();
222 static void Op63M1 ()
224 long OpAddress = StackRelative ();
228 static void Op63M0 ()
230 long OpAddress = StackRelative ();
234 static void Op73M1 ()
236 long OpAddress = StackRelativeIndirectIndexed ();
240 static void Op73M0 ()
242 long OpAddress = StackRelativeIndirectIndexed ();
246 /**********************************************************************************************/
248 /* AND *************************************************************************************** */
249 static void Op29M1 ()
251 Registers.AL &= *CPU.PC++;
253 CPU.Cycles += CPU.MemSpeed;
255 SETZN8 (Registers.AL);
258 static void Op29M0 ()
260 #ifdef FAST_LSB_WORD_ACCESS
261 Registers.A.W &= *(uint16 *) CPU.PC;
263 Registers.A.W &= *CPU.PC + (*(CPU.PC + 1) << 8);
267 CPU.Cycles += CPU.MemSpeedx2;
269 SETZN16 (Registers.A.W);
272 static void Op25M1 ()
274 long OpAddress = Direct ();
278 static void Op25M0 ()
280 long OpAddress = Direct ();
284 static void Op35M1 ()
286 long OpAddress = DirectIndexedX ();
290 static void Op35M0 ()
292 long OpAddress = DirectIndexedX ();
296 static void Op32M1 ()
298 long OpAddress = DirectIndirect ();
302 static void Op32M0 ()
304 long OpAddress = DirectIndirect ();
308 static void Op21M1 ()
310 long OpAddress = DirectIndexedIndirect ();
314 static void Op21M0 ()
316 long OpAddress = DirectIndexedIndirect ();
320 static void Op31M1 ()
322 long OpAddress = DirectIndirectIndexed ();
326 static void Op31M0 ()
328 long OpAddress = DirectIndirectIndexed ();
332 static void Op27M1 ()
334 long OpAddress = DirectIndirectLong ();
338 static void Op27M0 ()
340 long OpAddress = DirectIndirectLong ();
344 static void Op37M1 ()
346 long OpAddress = DirectIndirectIndexedLong ();
350 static void Op37M0 ()
352 long OpAddress = DirectIndirectIndexedLong ();
356 static void Op2DM1 ()
358 long OpAddress = Absolute ();
362 static void Op2DM0 ()
364 long OpAddress = Absolute ();
368 static void Op3DM1 ()
370 long OpAddress = AbsoluteIndexedX ();
374 static void Op3DM0 ()
376 long OpAddress = AbsoluteIndexedX ();
380 static void Op39M1 ()
382 long OpAddress = AbsoluteIndexedY ();
386 static void Op39M0 ()
388 long OpAddress = AbsoluteIndexedY ();
392 static void Op2FM1 ()
394 long OpAddress = AbsoluteLong ();
398 static void Op2FM0 ()
400 long OpAddress = AbsoluteLong ();
404 static void Op3FM1 ()
406 long OpAddress = AbsoluteLongIndexedX ();
410 static void Op3FM0 ()
412 long OpAddress = AbsoluteLongIndexedX ();
416 static void Op23M1 ()
418 long OpAddress = StackRelative ();
422 static void Op23M0 ()
424 long OpAddress = StackRelative ();
428 static void Op33M1 ()
430 long OpAddress = StackRelativeIndirectIndexed ();
434 static void Op33M0 ()
436 long OpAddress = StackRelativeIndirectIndexed ();
439 /**********************************************************************************************/
441 /* ASL *************************************************************************************** */
442 static void Op0AM1 ()
447 static void Op0AM0 ()
452 static void Op06M1 ()
454 long OpAddress = Direct ();
458 static void Op06M0 ()
460 long OpAddress = Direct ();
464 static void Op16M1 ()
466 long OpAddress = DirectIndexedX ();
470 static void Op16M0 ()
472 long OpAddress = DirectIndexedX ();
476 static void Op0EM1 ()
478 long OpAddress = Absolute ();
482 static void Op0EM0 ()
484 long OpAddress = Absolute ();
488 static void Op1EM1 ()
490 long OpAddress = AbsoluteIndexedX ();
494 static void Op1EM0 ()
496 long OpAddress = AbsoluteIndexedX ();
499 /**********************************************************************************************/
501 /* BIT *************************************************************************************** */
502 static void Op89M1 ()
504 ICPU._Zero = Registers.AL & *CPU.PC++;
506 CPU.Cycles += CPU.MemSpeed;
510 static void Op89M0 ()
512 #ifdef FAST_LSB_WORD_ACCESS
513 ICPU._Zero = (Registers.A.W & *(uint16 *) CPU.PC) != 0;
515 ICPU._Zero = (Registers.A.W & (*CPU.PC + (*(CPU.PC + 1) << 8))) != 0;
518 CPU.Cycles += CPU.MemSpeedx2;
523 static void Op24M1 ()
525 long OpAddress = Direct ();
529 static void Op24M0 ()
531 long OpAddress = Direct ();
535 static void Op34M1 ()
537 long OpAddress = DirectIndexedX ();
541 static void Op34M0 ()
543 long OpAddress = DirectIndexedX ();
547 static void Op2CM1 ()
549 long OpAddress = Absolute ();
553 static void Op2CM0 ()
555 long OpAddress = Absolute ();
559 static void Op3CM1 ()
561 long OpAddress = AbsoluteIndexedX ();
565 static void Op3CM0 ()
567 long OpAddress = AbsoluteIndexedX ();
570 /**********************************************************************************************/
572 /* CMP *************************************************************************************** */
573 static void OpC9M1 ()
575 int32 Int32 = (int) Registers.AL - (int) *CPU.PC++;
576 ICPU._Carry = Int32 >= 0;
577 SETZN8 ((uint8) Int32);
579 CPU.Cycles += CPU.MemSpeed;
583 static void OpC9M0 ()
585 #ifdef FAST_LSB_WORD_ACCESS
586 int32 Int32 = (long) Registers.A.W - (long) *(uint16 *) CPU.PC;
588 int32 Int32 = (long) Registers.A.W -
589 (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
591 ICPU._Carry = Int32 >= 0;
592 SETZN16 ((uint16) Int32);
595 CPU.Cycles += CPU.MemSpeedx2;
599 static void OpC5M1 ()
601 long OpAddress = Direct ();
605 static void OpC5M0 ()
607 long OpAddress = Direct ();
611 static void OpD5M1 ()
613 long OpAddress = DirectIndexedX ();
617 static void OpD5M0 ()
619 long OpAddress = DirectIndexedX ();
623 static void OpD2M1 ()
625 long OpAddress = DirectIndirect ();
629 static void OpD2M0 ()
631 long OpAddress = DirectIndirect ();
635 static void OpC1M1 ()
637 long OpAddress = DirectIndexedIndirect ();
641 static void OpC1M0 ()
643 long OpAddress = DirectIndexedIndirect ();
647 static void OpD1M1 ()
649 long OpAddress = DirectIndirectIndexed ();
653 static void OpD1M0 ()
655 long OpAddress = DirectIndirectIndexed ();
659 static void OpC7M1 ()
661 long OpAddress = DirectIndirectLong ();
665 static void OpC7M0 ()
667 long OpAddress = DirectIndirectLong ();
671 static void OpD7M1 ()
673 long OpAddress = DirectIndirectIndexedLong ();
677 static void OpD7M0 ()
679 long OpAddress = DirectIndirectIndexedLong ();
683 static void OpCDM1 ()
685 long OpAddress = Absolute ();
689 static void OpCDM0 ()
691 long OpAddress = Absolute ();
695 static void OpDDM1 ()
697 long OpAddress = AbsoluteIndexedX ();
701 static void OpDDM0 ()
703 long OpAddress = AbsoluteIndexedX ();
707 static void OpD9M1 ()
709 long OpAddress = AbsoluteIndexedY ();
713 static void OpD9M0 ()
715 long OpAddress = AbsoluteIndexedY ();
719 static void OpCFM1 ()
721 long OpAddress = AbsoluteLong ();
725 static void OpCFM0 ()
727 long OpAddress = AbsoluteLong ();
731 static void OpDFM1 ()
733 long OpAddress = AbsoluteLongIndexedX ();
737 static void OpDFM0 ()
739 long OpAddress = AbsoluteLongIndexedX ();
743 static void OpC3M1 ()
745 long OpAddress = StackRelative ();
749 static void OpC3M0 ()
751 long OpAddress = StackRelative ();
755 static void OpD3M1 ()
757 long OpAddress = StackRelativeIndirectIndexed ();
761 static void OpD3M0 ()
763 long OpAddress = StackRelativeIndirectIndexed ();
767 /**********************************************************************************************/
769 /* CMX *************************************************************************************** */
770 static void OpE0X1 ()
772 int32 Int32 = (int) Registers.XL - (int) *CPU.PC++;
773 ICPU._Carry = Int32 >= 0;
774 SETZN8 ((uint8) Int32);
776 CPU.Cycles += CPU.MemSpeed;
780 static void OpE0X0 ()
782 #ifdef FAST_LSB_WORD_ACCESS
783 int32 Int32 = (long) Registers.X.W - (long) *(uint16 *) CPU.PC;
785 int32 Int32 = (long) Registers.X.W -
786 (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
788 ICPU._Carry = Int32 >= 0;
789 SETZN16 ((uint16) Int32);
792 CPU.Cycles += CPU.MemSpeedx2;
796 static void OpE4X1 ()
798 long OpAddress = Direct ();
802 static void OpE4X0 ()
804 long OpAddress = Direct ();
808 static void OpECX1 ()
810 long OpAddress = Absolute ();
814 static void OpECX0 ()
816 long OpAddress = Absolute ();
820 /**********************************************************************************************/
822 /* CMY *************************************************************************************** */
823 static void OpC0X1 ()
825 int32 Int32 = (int) Registers.YL - (int) *CPU.PC++;
826 ICPU._Carry = Int32 >= 0;
827 SETZN8 ((uint8) Int32);
829 CPU.Cycles += CPU.MemSpeed;
833 static void OpC0X0 ()
835 #ifdef FAST_LSB_WORD_ACCESS
836 int32 Int32 = (long) Registers.Y.W - (long) *(uint16 *) CPU.PC;
838 int32 Int32 = (long) Registers.Y.W -
839 (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
841 ICPU._Carry = Int32 >= 0;
842 SETZN16 ((uint16) Int32);
845 CPU.Cycles += CPU.MemSpeedx2;
849 static void OpC4X1 ()
851 long OpAddress = Direct ();
855 static void OpC4X0 ()
857 long OpAddress = Direct ();
861 static void OpCCX1 ()
863 long OpAddress = Absolute ();
867 static void OpCCX0 ()
869 long OpAddress = Absolute ();
873 /**********************************************************************************************/
875 /* DEC *************************************************************************************** */
876 static void Op3AM1 ()
881 static void Op3AM0 ()
886 static void OpC6M1 ()
888 long OpAddress = Direct ();
892 static void OpC6M0 ()
894 long OpAddress = Direct ();
898 static void OpD6M1 ()
900 long OpAddress = DirectIndexedX ();
904 static void OpD6M0 ()
906 long OpAddress = DirectIndexedX ();
910 static void OpCEM1 ()
912 long OpAddress = Absolute ();
916 static void OpCEM0 ()
918 long OpAddress = Absolute ();
922 static void OpDEM1 ()
924 long OpAddress = AbsoluteIndexedX ();
928 static void OpDEM0 ()
930 long OpAddress = AbsoluteIndexedX ();
934 /**********************************************************************************************/
936 /* EOR *************************************************************************************** */
937 static void Op49M1 ()
939 Registers.AL ^= *CPU.PC++;
941 CPU.Cycles += CPU.MemSpeed;
943 SETZN8 (Registers.AL);
946 static void Op49M0 ()
948 #ifdef FAST_LSB_WORD_ACCESS
949 Registers.A.W ^= *(uint16 *) CPU.PC;
951 Registers.A.W ^= *CPU.PC + (*(CPU.PC + 1) << 8);
955 CPU.Cycles += CPU.MemSpeedx2;
957 SETZN16 (Registers.A.W);
960 static void Op45M1 ()
962 long OpAddress = Direct ();
966 static void Op45M0 ()
968 long OpAddress = Direct ();
972 static void Op55M1 ()
974 long OpAddress = DirectIndexedX ();
978 static void Op55M0 ()
980 long OpAddress = DirectIndexedX ();
984 static void Op52M1 ()
986 long OpAddress = DirectIndirect ();
990 static void Op52M0 ()
992 long OpAddress = DirectIndirect ();
996 static void Op41M1 ()
998 long OpAddress = DirectIndexedIndirect ();
1002 static void Op41M0 ()
1004 long OpAddress = DirectIndexedIndirect ();
1008 static void Op51M1 ()
1010 long OpAddress = DirectIndirectIndexed ();
1014 static void Op51M0 ()
1016 long OpAddress = DirectIndirectIndexed ();
1020 static void Op47M1 ()
1022 long OpAddress = DirectIndirectLong ();
1026 static void Op47M0 ()
1028 long OpAddress = DirectIndirectLong ();
1032 static void Op57M1 ()
1034 long OpAddress = DirectIndirectIndexedLong ();
1038 static void Op57M0 ()
1040 long OpAddress = DirectIndirectIndexedLong ();
1044 static void Op4DM1 ()
1046 long OpAddress = Absolute ();
1050 static void Op4DM0 ()
1052 long OpAddress = Absolute ();
1056 static void Op5DM1 ()
1058 long OpAddress = AbsoluteIndexedX ();
1062 static void Op5DM0 ()
1064 long OpAddress = AbsoluteIndexedX ();
1068 static void Op59M1 ()
1070 long OpAddress = AbsoluteIndexedY ();
1074 static void Op59M0 ()
1076 long OpAddress = AbsoluteIndexedY ();
1080 static void Op4FM1 ()
1082 long OpAddress = AbsoluteLong ();
1086 static void Op4FM0 ()
1088 long OpAddress = AbsoluteLong ();
1092 static void Op5FM1 ()
1094 long OpAddress = AbsoluteLongIndexedX ();
1098 static void Op5FM0 ()
1100 long OpAddress = AbsoluteLongIndexedX ();
1104 static void Op43M1 ()
1106 long OpAddress = StackRelative ();
1110 static void Op43M0 ()
1112 long OpAddress = StackRelative ();
1116 static void Op53M1 ()
1118 long OpAddress = StackRelativeIndirectIndexed ();
1122 static void Op53M0 ()
1124 long OpAddress = StackRelativeIndirectIndexed ();
1128 /**********************************************************************************************/
1130 /* INC *************************************************************************************** */
1131 static void Op1AM1 ()
1136 static void Op1AM0 ()
1141 static void OpE6M1 ()
1143 long OpAddress = Direct ();
1147 static void OpE6M0 ()
1149 long OpAddress = Direct ();
1153 static void OpF6M1 ()
1155 long OpAddress = DirectIndexedX ();
1159 static void OpF6M0 ()
1161 long OpAddress = DirectIndexedX ();
1165 static void OpEEM1 ()
1167 long OpAddress = Absolute ();
1171 static void OpEEM0 ()
1173 long OpAddress = Absolute ();
1177 static void OpFEM1 ()
1179 long OpAddress = AbsoluteIndexedX ();
1183 static void OpFEM0 ()
1185 long OpAddress = AbsoluteIndexedX ();
1189 /**********************************************************************************************/
1190 /* LDA *************************************************************************************** */
1191 static void OpA9M1 ()
1193 Registers.AL = *CPU.PC++;
1195 CPU.Cycles += CPU.MemSpeed;
1197 SETZN8 (Registers.AL);
1200 static void OpA9M0 ()
1202 #ifdef FAST_LSB_WORD_ACCESS
1203 Registers.A.W = *(uint16 *) CPU.PC;
1205 Registers.A.W = *CPU.PC + (*(CPU.PC + 1) << 8);
1210 CPU.Cycles += CPU.MemSpeedx2;
1212 SETZN16 (Registers.A.W);
1215 static void OpA5M1 ()
1217 long OpAddress = Direct ();
1221 static void OpA5M0 ()
1223 long OpAddress = Direct ();
1227 static void OpB5M1 ()
1229 long OpAddress = DirectIndexedX ();
1233 static void OpB5M0 ()
1235 long OpAddress = DirectIndexedX ();
1239 static void OpB2M1 ()
1241 long OpAddress = DirectIndirect ();
1245 static void OpB2M0 ()
1247 long OpAddress = DirectIndirect ();
1251 static void OpA1M1 ()
1253 long OpAddress = DirectIndexedIndirect ();
1257 static void OpA1M0 ()
1259 long OpAddress = DirectIndexedIndirect ();
1263 static void OpB1M1 ()
1265 long OpAddress = DirectIndirectIndexed ();
1269 static void OpB1M0 ()
1271 long OpAddress = DirectIndirectIndexed ();
1275 static void OpA7M1 ()
1277 long OpAddress = DirectIndirectLong ();
1281 static void OpA7M0 ()
1283 long OpAddress = DirectIndirectLong ();
1287 static void OpB7M1 ()
1289 long OpAddress = DirectIndirectIndexedLong ();
1293 static void OpB7M0 ()
1295 long OpAddress = DirectIndirectIndexedLong ();
1299 static void OpADM1 ()
1301 long OpAddress = Absolute ();
1305 static void OpADM0 ()
1307 long OpAddress = Absolute ();
1311 static void OpBDM1 ()
1313 long OpAddress = AbsoluteIndexedX ();
1317 static void OpBDM0 ()
1319 long OpAddress = AbsoluteIndexedX ();
1323 static void OpB9M1 ()
1325 long OpAddress = AbsoluteIndexedY ();
1329 static void OpB9M0 ()
1331 long OpAddress = AbsoluteIndexedY ();
1335 static void OpAFM1 ()
1337 long OpAddress = AbsoluteLong ();
1341 static void OpAFM0 ()
1343 long OpAddress = AbsoluteLong ();
1347 static void OpBFM1 ()
1349 long OpAddress = AbsoluteLongIndexedX ();
1353 static void OpBFM0 ()
1355 long OpAddress = AbsoluteLongIndexedX ();
1359 static void OpA3M1 ()
1361 long OpAddress = StackRelative ();
1365 static void OpA3M0 ()
1367 long OpAddress = StackRelative ();
1371 static void OpB3M1 ()
1373 long OpAddress = StackRelativeIndirectIndexed ();
1377 static void OpB3M0 ()
1379 long OpAddress = StackRelativeIndirectIndexed ();
1383 /**********************************************************************************************/
1385 /* LDX *************************************************************************************** */
1386 static void OpA2X1 ()
1388 Registers.XL = *CPU.PC++;
1390 CPU.Cycles += CPU.MemSpeed;
1392 SETZN8 (Registers.XL);
1395 static void OpA2X0 ()
1397 #ifdef FAST_LSB_WORD_ACCESS
1398 Registers.X.W = *(uint16 *) CPU.PC;
1400 Registers.X.W = *CPU.PC + (*(CPU.PC + 1) << 8);
1404 CPU.Cycles += CPU.MemSpeedx2;
1406 SETZN16 (Registers.X.W);
1409 static void OpA6X1 ()
1411 long OpAddress = Direct ();
1415 static void OpA6X0 ()
1417 long OpAddress = Direct ();
1421 static void OpB6X1 ()
1423 long OpAddress = DirectIndexedY ();
1427 static void OpB6X0 ()
1429 long OpAddress = DirectIndexedY ();
1433 static void OpAEX1 ()
1435 long OpAddress = Absolute ();
1439 static void OpAEX0 ()
1441 long OpAddress = Absolute ();
1445 static void OpBEX1 ()
1447 long OpAddress = AbsoluteIndexedY ();
1451 static void OpBEX0 ()
1453 long OpAddress = AbsoluteIndexedY ();
1456 /**********************************************************************************************/
1458 /* LDY *************************************************************************************** */
1459 static void OpA0X1 ()
1461 Registers.YL = *CPU.PC++;
1463 CPU.Cycles += CPU.MemSpeed;
1465 SETZN8 (Registers.YL);
1468 static void OpA0X0 ()
1470 #ifdef FAST_LSB_WORD_ACCESS
1471 Registers.Y.W = *(uint16 *) CPU.PC;
1473 Registers.Y.W = *CPU.PC + (*(CPU.PC + 1) << 8);
1478 CPU.Cycles += CPU.MemSpeedx2;
1480 SETZN16 (Registers.Y.W);
1483 static void OpA4X1 ()
1485 long OpAddress = Direct ();
1489 static void OpA4X0 ()
1491 long OpAddress = Direct ();
1495 static void OpB4X1 ()
1497 long OpAddress = DirectIndexedX ();
1501 static void OpB4X0 ()
1503 long OpAddress = DirectIndexedX ();
1507 static void OpACX1 ()
1509 long OpAddress = Absolute ();
1513 static void OpACX0 ()
1515 long OpAddress = Absolute ();
1519 static void OpBCX1 ()
1521 long OpAddress = AbsoluteIndexedX ();
1525 static void OpBCX0 ()
1527 long OpAddress = AbsoluteIndexedX ();
1530 /**********************************************************************************************/
1532 /* LSR *************************************************************************************** */
1533 static void Op4AM1 ()
1538 static void Op4AM0 ()
1543 static void Op46M1 ()
1545 long OpAddress = Direct ();
1549 static void Op46M0 ()
1551 long OpAddress = Direct ();
1555 static void Op56M1 ()
1557 long OpAddress = DirectIndexedX ();
1561 static void Op56M0 ()
1563 long OpAddress = DirectIndexedX ();
1567 static void Op4EM1 ()
1569 long OpAddress = Absolute ();
1573 static void Op4EM0 ()
1575 long OpAddress = Absolute ();
1579 static void Op5EM1 ()
1581 long OpAddress = AbsoluteIndexedX ();
1585 static void Op5EM0 ()
1587 long OpAddress = AbsoluteIndexedX ();
1591 /**********************************************************************************************/
1593 /* ORA *************************************************************************************** */
1594 static void Op09M1 ()
1596 Registers.AL |= *CPU.PC++;
1598 CPU.Cycles += CPU.MemSpeed;
1600 SETZN8 (Registers.AL);
1603 static void Op09M0 ()
1605 #ifdef FAST_LSB_WORD_ACCESS
1606 Registers.A.W |= *(uint16 *) CPU.PC;
1608 Registers.A.W |= *CPU.PC + (*(CPU.PC + 1) << 8);
1612 CPU.Cycles += CPU.MemSpeedx2;
1614 SETZN16 (Registers.A.W);
1617 static void Op05M1 ()
1619 long OpAddress = Direct ();
1623 static void Op05M0 ()
1625 long OpAddress = Direct ();
1629 static void Op15M1 ()
1631 long OpAddress = DirectIndexedX ();
1635 static void Op15M0 ()
1637 long OpAddress = DirectIndexedX ();
1641 static void Op12M1 ()
1643 long OpAddress = DirectIndirect ();
1647 static void Op12M0 ()
1649 long OpAddress = DirectIndirect ();
1653 static void Op01M1 ()
1655 long OpAddress = DirectIndexedIndirect ();
1659 static void Op01M0 ()
1661 long OpAddress = DirectIndexedIndirect ();
1665 static void Op11M1 ()
1667 long OpAddress = DirectIndirectIndexed ();
1671 static void Op11M0 ()
1673 long OpAddress = DirectIndirectIndexed ();
1677 static void Op07M1 ()
1679 long OpAddress = DirectIndirectLong ();
1683 static void Op07M0 ()
1685 long OpAddress = DirectIndirectLong ();
1689 static void Op17M1 ()
1691 long OpAddress = DirectIndirectIndexedLong ();
1695 static void Op17M0 ()
1697 long OpAddress = DirectIndirectIndexedLong ();
1701 static void Op0DM1 ()
1703 long OpAddress = Absolute ();
1707 static void Op0DM0 ()
1709 long OpAddress = Absolute ();
1713 static void Op1DM1 ()
1715 long OpAddress = AbsoluteIndexedX ();
1719 static void Op1DM0 ()
1721 long OpAddress = AbsoluteIndexedX ();
1725 static void Op19M1 ()
1727 long OpAddress = AbsoluteIndexedY ();
1731 static void Op19M0 ()
1733 long OpAddress = AbsoluteIndexedY ();
1737 static void Op0FM1 ()
1739 long OpAddress = AbsoluteLong ();
1743 static void Op0FM0 ()
1745 long OpAddress = AbsoluteLong ();
1749 static void Op1FM1 ()
1751 long OpAddress = AbsoluteLongIndexedX ();
1755 static void Op1FM0 ()
1757 long OpAddress = AbsoluteLongIndexedX ();
1761 static void Op03M1 ()
1763 long OpAddress = StackRelative ();
1767 static void Op03M0 ()
1769 long OpAddress = StackRelative ();
1773 static void Op13M1 ()
1775 long OpAddress = StackRelativeIndirectIndexed ();
1779 static void Op13M0 ()
1781 long OpAddress = StackRelativeIndirectIndexed ();
1785 /**********************************************************************************************/
1787 /* ROL *************************************************************************************** */
1788 static void Op2AM1 ()
1793 static void Op2AM0 ()
1798 static void Op26M1 ()
1800 long OpAddress = Direct ();
1804 static void Op26M0 ()
1806 long OpAddress = Direct ();
1810 static void Op36M1 ()
1812 long OpAddress = DirectIndexedX ();
1816 static void Op36M0 ()
1818 long OpAddress = DirectIndexedX ();
1822 static void Op2EM1 ()
1824 long OpAddress = Absolute ();
1828 static void Op2EM0 ()
1830 long OpAddress = Absolute ();
1834 static void Op3EM1 ()
1836 long OpAddress = AbsoluteIndexedX ();
1840 static void Op3EM0 ()
1842 long OpAddress = AbsoluteIndexedX ();
1845 /**********************************************************************************************/
1847 /* ROR *************************************************************************************** */
1848 static void Op6AM1 ()
1853 static void Op6AM0 ()
1858 static void Op66M1 ()
1860 long OpAddress = Direct ();
1864 static void Op66M0 ()
1866 long OpAddress = Direct ();
1870 static void Op76M1 ()
1872 long OpAddress = DirectIndexedX ();
1876 static void Op76M0 ()
1878 long OpAddress = DirectIndexedX ();
1882 static void Op6EM1 ()
1884 long OpAddress = Absolute ();
1888 static void Op6EM0 ()
1890 long OpAddress = Absolute ();
1894 static void Op7EM1 ()
1896 long OpAddress = AbsoluteIndexedX ();
1900 static void Op7EM0 ()
1902 long OpAddress = AbsoluteIndexedX ();
1905 /**********************************************************************************************/
1907 /* SBC *************************************************************************************** */
1908 static void OpE9M1 ()
1910 long OpAddress = Immediate8 ();
1914 static void OpE9M0 ()
1916 long OpAddress = Immediate16 ();
1920 static void OpE5M1 ()
1922 long OpAddress = Direct ();
1926 static void OpE5M0 ()
1928 long OpAddress = Direct ();
1932 static void OpF5M1 ()
1934 long OpAddress = DirectIndexedX ();
1938 static void OpF5M0 ()
1940 long OpAddress = DirectIndexedX ();
1944 static void OpF2M1 ()
1946 long OpAddress = DirectIndirect ();
1950 static void OpF2M0 ()
1952 long OpAddress = DirectIndirect ();
1956 static void OpE1M1 ()
1958 long OpAddress = DirectIndexedIndirect ();
1962 static void OpE1M0 ()
1964 long OpAddress = DirectIndexedIndirect ();
1968 static void OpF1M1 ()
1970 long OpAddress = DirectIndirectIndexed ();
1974 static void OpF1M0 ()
1976 long OpAddress = DirectIndirectIndexed ();
1980 static void OpE7M1 ()
1982 long OpAddress = DirectIndirectLong ();
1986 static void OpE7M0 ()
1988 long OpAddress = DirectIndirectLong ();
1992 static void OpF7M1 ()
1994 long OpAddress = DirectIndirectIndexedLong ();
1998 static void OpF7M0 ()
2000 long OpAddress = DirectIndirectIndexedLong ();
2004 static void OpEDM1 ()
2006 long OpAddress = Absolute ();
2010 static void OpEDM0 ()
2012 long OpAddress = Absolute ();
2016 static void OpFDM1 ()
2018 long OpAddress = AbsoluteIndexedX ();
2022 static void OpFDM0 ()
2024 long OpAddress = AbsoluteIndexedX ();
2028 static void OpF9M1 ()
2030 long OpAddress = AbsoluteIndexedY ();
2034 static void OpF9M0 ()
2036 long OpAddress = AbsoluteIndexedY ();
2040 static void OpEFM1 ()
2042 long OpAddress = AbsoluteLong ();
2046 static void OpEFM0 ()
2048 long OpAddress = AbsoluteLong ();
2052 static void OpFFM1 ()
2054 long OpAddress = AbsoluteLongIndexedX ();
2058 static void OpFFM0 ()
2060 long OpAddress = AbsoluteLongIndexedX ();
2064 static void OpE3M1 ()
2066 long OpAddress = StackRelative ();
2070 static void OpE3M0 ()
2072 long OpAddress = StackRelative ();
2076 static void OpF3M1 ()
2078 long OpAddress = StackRelativeIndirectIndexed ();
2082 static void OpF3M0 ()
2084 long OpAddress = StackRelativeIndirectIndexed ();
2087 /**********************************************************************************************/
2089 /* STA *************************************************************************************** */
2090 static void Op85M1 ()
2092 long OpAddress = Direct ();
2096 static void Op85M0 ()
2098 long OpAddress = Direct ();
2102 static void Op95M1 ()
2104 long OpAddress = DirectIndexedX ();
2108 static void Op95M0 ()
2110 long OpAddress = DirectIndexedX ();
2114 static void Op92M1 ()
2116 long OpAddress = DirectIndirect ();
2120 static void Op92M0 ()
2122 long OpAddress = DirectIndirect ();
2126 static void Op81M1 ()
2128 long OpAddress = DirectIndexedIndirect ();
2132 CPU.Cycles += ONE_CYCLE;
2136 static void Op81M0 ()
2138 long OpAddress = DirectIndexedIndirect ();
2142 CPU.Cycles += ONE_CYCLE;
2146 static void Op91M1 ()
2148 long OpAddress = DirectIndirectIndexed ();
2152 static void Op91M0 ()
2154 long OpAddress = DirectIndirectIndexed ();
2158 static void Op87M1 ()
2160 long OpAddress = DirectIndirectLong ();
2164 static void Op87M0 ()
2166 long OpAddress = DirectIndirectLong ();
2170 static void Op97M1 ()
2172 long OpAddress = DirectIndirectIndexedLong ();
2176 static void Op97M0 ()
2178 long OpAddress = DirectIndirectIndexedLong ();
2182 static void Op8DM1 ()
2184 long OpAddress = Absolute ();
2188 static void Op8DM0 ()
2190 long OpAddress = Absolute ();
2194 static void Op9DM1 ()
2196 long OpAddress = AbsoluteIndexedX ();
2200 static void Op9DM0 ()
2202 long OpAddress = AbsoluteIndexedX ();
2206 static void Op99M1 ()
2208 long OpAddress = AbsoluteIndexedY ();
2212 static void Op99M0 ()
2214 long OpAddress = AbsoluteIndexedY ();
2218 static void Op8FM1 ()
2220 long OpAddress = AbsoluteLong ();
2224 static void Op8FM0 ()
2226 long OpAddress = AbsoluteLong ();
2230 static void Op9FM1 ()
2232 long OpAddress = AbsoluteLongIndexedX ();
2236 static void Op9FM0 ()
2238 long OpAddress = AbsoluteLongIndexedX ();
2242 static void Op83M1 ()
2244 long OpAddress = StackRelative ();
2248 static void Op83M0 ()
2250 long OpAddress = StackRelative ();
2254 static void Op93M1 ()
2256 long OpAddress = StackRelativeIndirectIndexed ();
2260 static void Op93M0 ()
2262 long OpAddress = StackRelativeIndirectIndexed ();
2265 /**********************************************************************************************/
2267 /* STX *************************************************************************************** */
2268 static void Op86X1 ()
2270 long OpAddress = Direct ();
2274 static void Op86X0 ()
2276 long OpAddress = Direct ();
2280 static void Op96X1 ()
2282 long OpAddress = DirectIndexedY ();
2286 static void Op96X0 ()
2288 long OpAddress = DirectIndexedY ();
2292 static void Op8EX1 ()
2294 long OpAddress = Absolute ();
2298 static void Op8EX0 ()
2300 long OpAddress = Absolute ();
2303 /**********************************************************************************************/
2305 /* STY *************************************************************************************** */
2306 static void Op84X1 ()
2308 long OpAddress = Direct ();
2312 static void Op84X0 ()
2314 long OpAddress = Direct ();
2318 static void Op94X1 ()
2320 long OpAddress = DirectIndexedX ();
2324 static void Op94X0 ()
2326 long OpAddress = DirectIndexedX ();
2330 static void Op8CX1 ()
2332 long OpAddress = Absolute ();
2336 static void Op8CX0 ()
2338 long OpAddress = Absolute ();
2341 /**********************************************************************************************/
2343 /* STZ *************************************************************************************** */
2344 static void Op64M1 ()
2346 long OpAddress = Direct ();
2350 static void Op64M0 ()
2352 long OpAddress = Direct ();
2356 static void Op74M1 ()
2358 long OpAddress = DirectIndexedX ();
2362 static void Op74M0 ()
2364 long OpAddress = DirectIndexedX ();
2368 static void Op9CM1 ()
2370 long OpAddress = Absolute ();
2374 static void Op9CM0 ()
2376 long OpAddress = Absolute ();
2380 static void Op9EM1 ()
2382 long OpAddress = AbsoluteIndexedX ();
2386 static void Op9EM0 ()
2388 long OpAddress = AbsoluteIndexedX ();
2392 /**********************************************************************************************/
2394 /* TRB *************************************************************************************** */
2395 static void Op14M1 ()
2397 long OpAddress = Direct ();
2401 static void Op14M0 ()
2403 long OpAddress = Direct ();
2407 static void Op1CM1 ()
2409 long OpAddress = Absolute ();
2413 static void Op1CM0 ()
2415 long OpAddress = Absolute ();
2418 /**********************************************************************************************/
2420 /* TSB *************************************************************************************** */
2421 static void Op04M1 ()
2423 long OpAddress = Direct ();
2427 static void Op04M0 ()
2429 long OpAddress = Direct ();
2433 static void Op0CM1 ()
2435 long OpAddress = Absolute ();
2439 static void Op0CM0 ()
2441 long OpAddress = Absolute ();
2445 /**********************************************************************************************/
2447 /* Branch Instructions *********************************************************************** */
2449 #define BranchCheck0()\
2450 if( CPU.BranchSkip)\
2452 CPU.BranchSkip = FALSE;\
2453 if (!Settings.SoundSkipMethod)\
2454 if( CPU.PC - CPU.PCBase > OpAddress)\
2458 #define BranchCheck1()\
2459 if( CPU.BranchSkip)\
2461 CPU.BranchSkip = FALSE;\
2462 if (!Settings.SoundSkipMethod) {\
2463 if( CPU.PC - CPU.PCBase > OpAddress)\
2466 if (Settings.SoundSkipMethod == 1)\
2468 if (Settings.SoundSkipMethod == 3)\
2469 if( CPU.PC - CPU.PCBase > OpAddress)\
2472 CPU.PC = CPU.PCBase + OpAddress;\
2475 #define BranchCheck2()\
2476 if( CPU.BranchSkip)\
2478 CPU.BranchSkip = FALSE;\
2479 if (!Settings.SoundSkipMethod) {\
2480 if( CPU.PC - CPU.PCBase > OpAddress)\
2483 if (Settings.SoundSkipMethod == 1)\
2484 CPU.PC = CPU.PCBase + OpAddress;\
2485 if (Settings.SoundSkipMethod == 3)\
2486 if (CPU.PC - CPU.PCBase > OpAddress)\
2489 CPU.PC = CPU.PCBase + OpAddress;\
2492 #define BranchCheck0()
2493 #define BranchCheck1()
2494 #define BranchCheck2()
2499 INLINE void CPUShutdown()
2501 if (Settings.Shutdown && CPU.PC == CPU.WaitAddress)
2503 // Don't skip cycles with a pending NMI or IRQ - could cause delayed
2504 // interrupt. Interrupts are delayed for a few cycles alreadybut
2505 // the delay could allow the shutdown code to cycle skip again.
2506 // Was causing screen flashing on Top Gear 3000.
2508 if (CPU.WaitCounter == 0 &&
2509 !(CPU.Flags & (IRQ_PENDING_FLAG | NMI_FLAG)))
2511 CPU.WaitAddress = NULL;
2514 S9xSA1ExecuteDuringSleep ();
2520 if (CPU.WaitCounter >= 2)
2521 CPU.WaitCounter = 1;
2527 INLINE void CPUShutdown()
2529 if (Settings.Shutdown && CPU.PC == CPU.WaitAddress)
2531 if (CPU.WaitCounter >= 1)
2533 SA1.Executing = FALSE;
2534 SA1.CPUExecuting = FALSE;
2542 #define CPUShutdown()
2548 long OpAddress = Relative ();
2552 CPU.PC = CPU.PCBase + OpAddress;
2554 CPU.Cycles += ONE_CYCLE;
2567 long OpAddress = Relative ();
2571 CPU.PC = CPU.PCBase + OpAddress;
2573 CPU.Cycles += ONE_CYCLE;
2586 long OpAddress = Relative ();
2590 CPU.PC = CPU.PCBase + OpAddress;
2592 CPU.Cycles += ONE_CYCLE;
2605 long OpAddress = Relative ();
2607 if (CheckNegative())
2609 CPU.PC = CPU.PCBase + OpAddress;
2611 CPU.Cycles += ONE_CYCLE;
2624 long OpAddress = Relative ();
2628 CPU.PC = CPU.PCBase + OpAddress;
2631 CPU.Cycles += ONE_CYCLE;
2644 long OpAddress = Relative ();
2646 if (!CheckNegative())
2648 CPU.PC = CPU.PCBase + OpAddress;
2650 CPU.Cycles += ONE_CYCLE;
2663 long OpAddress = Relative ();
2664 CPU.PC = CPU.PCBase + OpAddress;
2666 CPU.Cycles += ONE_CYCLE;
2678 long OpAddress = Relative ();
2680 if (!CheckOverflow())
2682 CPU.PC = CPU.PCBase + OpAddress;
2684 CPU.Cycles += ONE_CYCLE;
2697 long OpAddress = Relative ();
2699 if (CheckOverflow())
2701 CPU.PC = CPU.PCBase + OpAddress;
2703 CPU.Cycles += ONE_CYCLE;
2712 /**********************************************************************************************/
2714 /* ClearFlag Instructions ******************************************************************** */
2720 CPU.Cycles += ONE_CYCLE;
2729 CPU.Cycles += ONE_CYCLE;
2738 CPU.Cycles += ONE_CYCLE;
2740 /* CHECK_FOR_IRQ(); */
2748 CPU.Cycles += ONE_CYCLE;
2751 /**********************************************************************************************/
2753 /* DEX/DEY *********************************************************************************** */
2754 static void OpCAX1 ()
2757 CPU.Cycles += ONE_CYCLE;
2760 CPU.WaitAddress = NULL;
2764 SETZN8 (Registers.XL);
2767 static void OpCAX0 ()
2770 CPU.Cycles += ONE_CYCLE;
2773 CPU.WaitAddress = NULL;
2777 SETZN16 (Registers.X.W);
2780 static void Op88X1 ()
2783 CPU.Cycles += ONE_CYCLE;
2786 CPU.WaitAddress = NULL;
2790 SETZN8 (Registers.YL);
2793 static void Op88X0 ()
2796 CPU.Cycles += ONE_CYCLE;
2799 CPU.WaitAddress = NULL;
2803 SETZN16 (Registers.Y.W);
2805 /**********************************************************************************************/
2807 /* INX/INY *********************************************************************************** */
2808 static void OpE8X1 ()
2811 CPU.Cycles += ONE_CYCLE;
2814 CPU.WaitAddress = NULL;
2818 SETZN8 (Registers.XL);
2821 static void OpE8X0 ()
2824 CPU.Cycles += ONE_CYCLE;
2827 CPU.WaitAddress = NULL;
2831 SETZN16 (Registers.X.W);
2834 static void OpC8X1 ()
2837 CPU.Cycles += ONE_CYCLE;
2840 CPU.WaitAddress = NULL;
2844 SETZN8 (Registers.YL);
2847 static void OpC8X0 ()
2850 CPU.Cycles += ONE_CYCLE;
2853 CPU.WaitAddress = NULL;
2857 SETZN16 (Registers.Y.W);
2860 /**********************************************************************************************/
2862 /* NOP *************************************************************************************** */
2866 CPU.Cycles += ONE_CYCLE;
2870 /**********************************************************************************************/
2872 /* PUSH Instructions ************************************************************************* */
2874 S9xSetWord (w, Registers.S.W - 1);\
2877 S9xSetByte (b, Registers.S.W--);
2881 long OpAddress = Absolute ();
2887 long OpAddress = DirectIndirect ();
2893 long OpAddress = RelativeLong ();
2897 static void Op48M1 ()
2899 PUSHB (Registers.AL);
2901 CPU.Cycles += ONE_CYCLE;
2905 static void Op48M0 ()
2907 PUSHW (Registers.A.W);
2909 CPU.Cycles += ONE_CYCLE;
2915 PUSHB (Registers.DB);
2917 CPU.Cycles += ONE_CYCLE;
2923 PUSHW (Registers.D.W);
2925 CPU.Cycles += ONE_CYCLE;
2931 PUSHB (Registers.PB);
2933 CPU.Cycles += ONE_CYCLE;
2940 PUSHB (Registers.PL);
2942 CPU.Cycles += ONE_CYCLE;
2946 static void OpDAX1 ()
2948 PUSHB (Registers.XL);
2950 CPU.Cycles += ONE_CYCLE;
2954 static void OpDAX0 ()
2956 PUSHW (Registers.X.W);
2958 CPU.Cycles += ONE_CYCLE;
2962 static void Op5AX1 ()
2964 PUSHB (Registers.YL);
2966 CPU.Cycles += ONE_CYCLE;
2970 static void Op5AX0 ()
2972 PUSHW (Registers.Y.W);
2974 CPU.Cycles += ONE_CYCLE;
2977 /**********************************************************************************************/
2979 /* PULL Instructions ************************************************************************* */
2981 w = S9xGetWord (Registers.S.W + 1); \
2985 b = S9xGetByte (++Registers.S.W);
2987 static void Op68M1 ()
2990 CPU.Cycles += TWO_CYCLES;
2992 PullB (Registers.AL);
2993 SETZN8 (Registers.AL);
2996 static void Op68M0 ()
2999 CPU.Cycles += TWO_CYCLES;
3001 PullW (Registers.A.W);
3002 SETZN16 (Registers.A.W);
3008 CPU.Cycles += TWO_CYCLES;
3010 PullB (Registers.DB);
3011 SETZN8 (Registers.DB);
3012 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3019 CPU.Cycles += TWO_CYCLES;
3021 PullW (Registers.D.W);
3022 SETZN16 (Registers.D.W);
3029 CPU.Cycles += TWO_CYCLES;
3031 PullB (Registers.PL);
3040 /* CHECK_FOR_IRQ();*/
3043 static void OpFAX1 ()
3046 CPU.Cycles += TWO_CYCLES;
3048 PullB (Registers.XL);
3049 SETZN8 (Registers.XL);
3052 static void OpFAX0 ()
3055 CPU.Cycles += TWO_CYCLES;
3057 PullW (Registers.X.W);
3058 SETZN16 (Registers.X.W);
3061 static void Op7AX1 ()
3064 CPU.Cycles += TWO_CYCLES;
3066 PullB (Registers.YL);
3067 SETZN8 (Registers.YL);
3070 static void Op7AX0 ()
3073 CPU.Cycles += TWO_CYCLES;
3075 PullW (Registers.Y.W);
3076 SETZN16 (Registers.Y.W);
3079 /**********************************************************************************************/
3081 /* SetFlag Instructions ********************************************************************** */
3087 CPU.Cycles += ONE_CYCLE;
3096 CPU.Cycles += ONE_CYCLE;
3098 missing.decimal_mode = 1;
3106 CPU.Cycles += ONE_CYCLE;
3109 /**********************************************************************************************/
3111 /* Transfer Instructions ********************************************************************* */
3113 static void OpAAX1 ()
3116 CPU.Cycles += ONE_CYCLE;
3118 Registers.XL = Registers.AL;
3119 SETZN8 (Registers.XL);
3123 static void OpAAX0 ()
3126 CPU.Cycles += ONE_CYCLE;
3128 Registers.X.W = Registers.A.W;
3129 SETZN16 (Registers.X.W);
3133 static void OpA8X1 ()
3136 CPU.Cycles += ONE_CYCLE;
3138 Registers.YL = Registers.AL;
3139 SETZN8 (Registers.YL);
3143 static void OpA8X0 ()
3146 CPU.Cycles += ONE_CYCLE;
3148 Registers.Y.W = Registers.A.W;
3149 SETZN16 (Registers.Y.W);
3155 CPU.Cycles += ONE_CYCLE;
3157 Registers.D.W = Registers.A.W;
3158 SETZN16 (Registers.D.W);
3164 CPU.Cycles += ONE_CYCLE;
3166 Registers.S.W = Registers.A.W;
3167 if (CheckEmulation())
3174 CPU.Cycles += ONE_CYCLE;
3176 Registers.A.W = Registers.D.W;
3177 SETZN16 (Registers.A.W);
3183 CPU.Cycles += ONE_CYCLE;
3185 Registers.A.W = Registers.S.W;
3186 SETZN16 (Registers.A.W);
3189 static void OpBAX1 ()
3192 CPU.Cycles += ONE_CYCLE;
3194 Registers.XL = Registers.SL;
3195 SETZN8 (Registers.XL);
3198 static void OpBAX0 ()
3201 CPU.Cycles += ONE_CYCLE;
3203 Registers.X.W = Registers.S.W;
3204 SETZN16 (Registers.X.W);
3207 static void Op8AM1 ()
3210 CPU.Cycles += ONE_CYCLE;
3212 Registers.AL = Registers.XL;
3213 SETZN8 (Registers.AL);
3216 static void Op8AM0 ()
3219 CPU.Cycles += ONE_CYCLE;
3221 Registers.A.W = Registers.X.W;
3222 SETZN16 (Registers.A.W);
3228 CPU.Cycles += ONE_CYCLE;
3230 Registers.S.W = Registers.X.W;
3231 if (CheckEmulation())
3235 static void Op9BX1 ()
3238 CPU.Cycles += ONE_CYCLE;
3240 Registers.YL = Registers.XL;
3241 SETZN8 (Registers.YL);
3244 static void Op9BX0 ()
3247 CPU.Cycles += ONE_CYCLE;
3249 Registers.Y.W = Registers.X.W;
3250 SETZN16 (Registers.Y.W);
3253 static void Op98M1 ()
3256 CPU.Cycles += ONE_CYCLE;
3258 Registers.AL = Registers.YL;
3259 SETZN8 (Registers.AL);
3262 static void Op98M0 ()
3265 CPU.Cycles += ONE_CYCLE;
3267 Registers.A.W = Registers.Y.W;
3268 SETZN16 (Registers.A.W);
3271 static void OpBBX1 ()
3274 CPU.Cycles += ONE_CYCLE;
3276 Registers.XL = Registers.YL;
3277 SETZN8 (Registers.XL);
3280 static void OpBBX0 ()
3283 CPU.Cycles += ONE_CYCLE;
3285 Registers.X.W = Registers.Y.W;
3286 SETZN16 (Registers.X.W);
3289 /**********************************************************************************************/
3291 /* XCE *************************************************************************************** */
3295 CPU.Cycles += ONE_CYCLE;
3298 uint8 A1 = (ICPU._Carry & 0xff);
3299 uint8 A2 = Registers.PH;
3300 ICPU._Carry = A2 & 1;
3303 if (CheckEmulation())
3305 SetFlags(MemoryFlag | IndexFlag);
3307 missing.emulate6502 = 1;
3316 /**********************************************************************************************/
3318 /* BRK *************************************************************************************** */
3322 if (CPU.Flags & TRACE_FLAG)
3323 S9xTraceMessage ("*** BRK");
3327 CPU.BRKTriggered = TRUE;
3330 if (!CheckEmulation())
3332 PUSHB (Registers.PB);
3333 PUSHW (CPU.PC - CPU.PCBase + 1);
3335 PUSHB (Registers.PL);
3341 S9xSetPCBase (S9xGetWord (0xFFE6));
3343 CPU.Cycles += TWO_CYCLES;
3352 PUSHW (CPU.PC - CPU.PCBase);
3354 PUSHB (Registers.PL);
3360 S9xSetPCBase (S9xGetWord (0xFFFE));
3362 CPU.Cycles += ONE_CYCLE;
3370 /**********************************************************************************************/
3372 /* BRL ************************************************************************************** */
3375 long OpAddress = RelativeLong ();
3376 S9xSetPCBase (ICPU.ShiftedPB + OpAddress);
3378 /**********************************************************************************************/
3380 /* IRQ *************************************************************************************** */
3381 void S9xOpcode_IRQ ()
3384 if (CPU.Flags & TRACE_FLAG)
3385 S9xTraceMessage ("*** IRQ");
3387 if (!CheckEmulation())
3389 PUSHB (Registers.PB);
3390 PUSHW (CPU.PC - CPU.PCBase);
3392 PUSHB (Registers.PL);
3399 S9xSA1SetPCBase (Memory.FillRAM [0x2207] |
3400 (Memory.FillRAM [0x2208] << 8));
3402 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x40))
3403 S9xSetPCBase (Memory.FillRAM [0x220e] |
3404 (Memory.FillRAM [0x220f] << 8));
3406 S9xSetPCBase (S9xGetWord (0xFFEE));
3409 CPU.Cycles += TWO_CYCLES;
3418 PUSHW (CPU.PC - CPU.PCBase);
3420 PUSHB (Registers.PL);
3427 S9xSA1SetPCBase (Memory.FillRAM [0x2207] |
3428 (Memory.FillRAM [0x2208] << 8));
3430 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x40))
3431 S9xSetPCBase (Memory.FillRAM [0x220e] |
3432 (Memory.FillRAM [0x220f] << 8));
3434 S9xSetPCBase (S9xGetWord (0xFFFE));
3437 CPU.Cycles += ONE_CYCLE;
3446 /**********************************************************************************************/
3448 /* NMI *************************************************************************************** */
3449 void S9xOpcode_NMI ()
3452 if (CPU.Flags & TRACE_FLAG)
3453 S9xTraceMessage ("*** NMI");
3455 if (!CheckEmulation())
3457 PUSHB (Registers.PB);
3458 PUSHW (CPU.PC - CPU.PCBase);
3460 PUSHB (Registers.PL);
3467 S9xSA1SetPCBase (Memory.FillRAM [0x2205] |
3468 (Memory.FillRAM [0x2206] << 8));
3470 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x20))
3471 S9xSetPCBase (Memory.FillRAM [0x220c] |
3472 (Memory.FillRAM [0x220d] << 8));
3474 S9xSetPCBase (S9xGetWord (0xFFEA));
3477 CPU.Cycles += TWO_CYCLES;
3486 PUSHW (CPU.PC - CPU.PCBase);
3488 PUSHB (Registers.PL);
3495 S9xSA1SetPCBase (Memory.FillRAM [0x2205] |
3496 (Memory.FillRAM [0x2206] << 8));
3498 if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x20))
3499 S9xSetPCBase (Memory.FillRAM [0x220c] |
3500 (Memory.FillRAM [0x220d] << 8));
3502 S9xSetPCBase (S9xGetWord (0xFFFA));
3505 CPU.Cycles += ONE_CYCLE;
3513 /**********************************************************************************************/
3515 /* COP *************************************************************************************** */
3519 if (CPU.Flags & TRACE_FLAG)
3520 S9xTraceMessage ("*** COP");
3522 if (!CheckEmulation())
3524 PUSHB (Registers.PB);
3525 PUSHW (CPU.PC - CPU.PCBase + 1);
3527 PUSHB (Registers.PL);
3533 S9xSetPCBase (S9xGetWord (0xFFE4));
3535 CPU.Cycles += TWO_CYCLES;
3544 PUSHW (CPU.PC - CPU.PCBase);
3546 PUSHB (Registers.PL);
3552 S9xSetPCBase (S9xGetWord (0xFFF4));
3554 CPU.Cycles += ONE_CYCLE;
3562 /**********************************************************************************************/
3564 /* JML *************************************************************************************** */
3567 long OpAddress = AbsoluteIndirectLong ();
3568 Registers.PB = (uint8) (OpAddress >> 16);
3569 ICPU.ShiftedPB = OpAddress & 0xff0000;
3570 S9xSetPCBase (OpAddress);
3572 CPU.Cycles += TWO_CYCLES;
3578 long OpAddress = AbsoluteLong ();
3579 Registers.PB = (uint8) (OpAddress >> 16);
3580 ICPU.ShiftedPB = OpAddress & 0xff0000;
3581 S9xSetPCBase (OpAddress);
3583 /**********************************************************************************************/
3585 /* JMP *************************************************************************************** */
3588 long OpAddress = Absolute ();
3589 S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff));
3590 #if defined(CPU_SHUTDOWN) && defined(SA1_OPCODES)
3597 long OpAddress = AbsoluteIndirect ();
3598 S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff));
3603 long OpAddress = AbsoluteIndexedIndirect ();
3604 S9xSetPCBase (ICPU.ShiftedPB + OpAddress);
3606 CPU.Cycles += ONE_CYCLE;
3609 /**********************************************************************************************/
3611 /* JSL/RTL *********************************************************************************** */
3614 long OpAddress = AbsoluteLong ();
3615 PUSHB (Registers.PB);
3616 PUSHW (CPU.PC - CPU.PCBase - 1);
3617 Registers.PB = (uint8) (OpAddress >> 16);
3618 ICPU.ShiftedPB = OpAddress & 0xff0000;
3619 S9xSetPCBase (OpAddress);
3624 PullW (Registers.PC);
3625 PullB (Registers.PB);
3626 ICPU.ShiftedPB = (Registers.PB & 0xff) << 16;
3627 S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff));
3629 CPU.Cycles += TWO_CYCLES;
3632 /**********************************************************************************************/
3634 /* JSR/RTS *********************************************************************************** */
3637 long OpAddress = Absolute ();
3638 PUSHW (CPU.PC - CPU.PCBase - 1);
3639 S9xSetPCBase (ICPU.ShiftedPB + (OpAddress & 0xffff));
3641 CPU.Cycles += ONE_CYCLE;
3647 long OpAddress = AbsoluteIndexedIndirect ();
3648 PUSHW (CPU.PC - CPU.PCBase - 1);
3649 S9xSetPCBase (ICPU.ShiftedPB + OpAddress);
3651 CPU.Cycles += ONE_CYCLE;
3657 PullW (Registers.PC);
3658 S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff));
3660 CPU.Cycles += ONE_CYCLE * 3;
3664 /**********************************************************************************************/
3666 /* MVN/MVP *********************************************************************************** */
3667 static void Op54X1 ()
3672 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3675 Registers.DB = *CPU.PC++;
3676 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3677 SrcBank = *CPU.PC++;
3679 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3680 ICPU.ShiftedDB + Registers.Y.W);
3685 if (Registers.A.W != 0xffff)
3689 static void Op54X0 ()
3694 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3697 Registers.DB = *CPU.PC++;
3698 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3699 SrcBank = *CPU.PC++;
3701 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3702 ICPU.ShiftedDB + Registers.Y.W);
3707 if (Registers.A.W != 0xffff)
3711 static void Op44X1 ()
3716 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3718 Registers.DB = *CPU.PC++;
3719 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3720 SrcBank = *CPU.PC++;
3721 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3722 ICPU.ShiftedDB + Registers.Y.W);
3727 if (Registers.A.W != 0xffff)
3731 static void Op44X0 ()
3736 CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
3738 Registers.DB = *CPU.PC++;
3739 ICPU.ShiftedDB = (Registers.DB & 0xff) << 16;
3740 SrcBank = *CPU.PC++;
3741 S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
3742 ICPU.ShiftedDB + Registers.Y.W);
3747 if (Registers.A.W != 0xffff)
3751 /**********************************************************************************************/
3753 /* REP/SEP *********************************************************************************** */
3756 uint8 Work8 = ~*CPU.PC++;
3757 Registers.PL &= Work8;
3758 ICPU._Carry &= Work8;
3759 ICPU._Overflow &= (Work8 >> 6);
3760 ICPU._Negative &= Work8;
3761 ICPU._Zero |= ~Work8 & Zero;
3764 CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
3766 if (CheckEmulation())
3768 SetFlags(MemoryFlag | IndexFlag);
3769 missing.emulate6502 = 1;
3777 /* CHECK_FOR_IRQ(); */
3782 uint8 Work8 = *CPU.PC++;
3783 Registers.PL |= Work8;
3784 ICPU._Carry |= Work8 & 1;
3785 ICPU._Overflow |= (Work8 >> 6) & 1;
3786 ICPU._Negative |= Work8;
3790 CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
3792 if (CheckEmulation())
3794 SetFlags(MemoryFlag | IndexFlag);
3795 missing.emulate6502 = 1;
3804 /**********************************************************************************************/
3806 /* XBA *************************************************************************************** */
3809 uint8 Work8 = Registers.AL;
3810 Registers.AL = Registers.AH;
3811 Registers.AH = Work8;
3813 SETZN8 (Registers.AL);
3815 CPU.Cycles += TWO_CYCLES;
3818 /**********************************************************************************************/
3820 /* RTI *************************************************************************************** */
3823 PullB (Registers.PL);
3825 PullW (Registers.PC);
3826 if (!CheckEmulation())
3828 PullB (Registers.PB);
3829 ICPU.ShiftedPB = (Registers.PB & 0xff) << 16;
3833 SetFlags (MemoryFlag | IndexFlag);
3834 missing.emulate6502 = 1;
3836 S9xSetPCBase (ICPU.ShiftedPB + Registers.PC);
3844 CPU.Cycles += TWO_CYCLES;
3847 /* CHECK_FOR_IRQ(); */
3850 /**********************************************************************************************/
3852 /* STP/WAI/DB ******************************************************************************** */
3859 CPU.Cycles += TWO_CYCLES;
3868 CPU.WaitingForInterrupt = TRUE;
3872 if (Settings.Shutdown)
3877 if (Settings.Shutdown)
3879 SA1.CPUExecuting = FALSE;
3880 SA1.Executing = FALSE;
3891 CPU.Flags |= DEBUG_MODE_FLAG;
3894 // Reserved S9xOpcode
3897 #if defined(CPU_SHUTDOWN) && !defined(SA1_OPCODES)
3899 CPU.WaitAddress = NULL;
3900 if (Settings.SA1) S9xSA1ExecuteDuringSleep ();
3902 ApuSync();
\r\r#ifdef VAR_CYCLES
3903 CPU.Cycles += CPU.MemSpeed;
3910 int8 BranchOffset = ((b & 0xF) | 0xF0);
3911 uint16 OpAddress = (int)(CPU.PC - CPU.PCBase) + BranchOffset;
3913 // Assume we're going to branch
3915 CPU.Cycles += ONE_CYCLE;
3923 if (!CheckNegative ()) {
3924 CPU.PC = CPU.PCBase + OpAddress;
3926 CPU.Cycles += ONE_CYCLE;
3935 if (CheckNegative ()) {
3936 CPU.PC = CPU.PCBase + OpAddress;
3938 CPU.Cycles += ONE_CYCLE;
3947 if (!CheckOverflow ()) {
3948 CPU.PC = CPU.PCBase + OpAddress;
3950 CPU.Cycles += ONE_CYCLE;
3959 if (CheckOverflow ()) {
3960 CPU.PC = CPU.PCBase + OpAddress;
3962 CPU.Cycles += ONE_CYCLE;
3970 CPU.PC = CPU.PCBase + OpAddress;
3972 CPU.Cycles += ONE_CYCLE;
3980 if (!CheckCarry ()) {
3981 CPU.PC = CPU.PCBase + OpAddress;
3983 CPU.Cycles += ONE_CYCLE;
3992 if (CheckCarry ()) {
3993 CPU.PC = CPU.PCBase + OpAddress;
3995 CPU.Cycles += ONE_CYCLE;
4004 if (!CheckZero ()) {
4005 CPU.PC = CPU.PCBase + OpAddress;
4007 CPU.Cycles += ONE_CYCLE;
4017 CPU.PC = CPU.PCBase + OpAddress;
4019 CPU.Cycles += ONE_CYCLE;
4028 printf("Invalid Op42 branch type %hx\n", b >> 4);
4035 /**********************************************************************************************/
4037 /**********************************************************************************************/
4038 /* CPU-S9xOpcodes Definitions */
4039 /**********************************************************************************************/
4040 struct SOpcodes S9xOpcodesM1X1[256] =
4042 {Op00}, {Op01M1}, {Op02}, {Op03M1}, {Op04M1},
4043 {Op05M1}, {Op06M1}, {Op07M1}, {Op08}, {Op09M1},
4044 {Op0AM1}, {Op0B}, {Op0CM1}, {Op0DM1}, {Op0EM1},
4045 {Op0FM1}, {Op10}, {Op11M1}, {Op12M1}, {Op13M1},
4046 {Op14M1}, {Op15M1}, {Op16M1}, {Op17M1}, {Op18},
4047 {Op19M1}, {Op1AM1}, {Op1B}, {Op1CM1}, {Op1DM1},
4048 {Op1EM1}, {Op1FM1}, {Op20}, {Op21M1}, {Op22},
4049 {Op23M1}, {Op24M1}, {Op25M1}, {Op26M1}, {Op27M1},
4050 {Op28}, {Op29M1}, {Op2AM1}, {Op2B}, {Op2CM1},
4051 {Op2DM1}, {Op2EM1}, {Op2FM1}, {Op30}, {Op31M1},
4052 {Op32M1}, {Op33M1}, {Op34M1}, {Op35M1}, {Op36M1},
4053 {Op37M1}, {Op38}, {Op39M1}, {Op3AM1}, {Op3B},
4054 {Op3CM1}, {Op3DM1}, {Op3EM1}, {Op3FM1}, {Op40},
4055 {Op41M1}, {Op42}, {Op43M1}, {Op44X1}, {Op45M1},
4056 {Op46M1}, {Op47M1}, {Op48M1}, {Op49M1}, {Op4AM1},
4057 {Op4B}, {Op4C}, {Op4DM1}, {Op4EM1}, {Op4FM1},
4058 {Op50}, {Op51M1}, {Op52M1}, {Op53M1}, {Op54X1},
4059 {Op55M1}, {Op56M1}, {Op57M1}, {Op58}, {Op59M1},
4060 {Op5AX1}, {Op5B}, {Op5C}, {Op5DM1}, {Op5EM1},
4061 {Op5FM1}, {Op60}, {Op61M1}, {Op62}, {Op63M1},
4062 {Op64M1}, {Op65M1}, {Op66M1}, {Op67M1}, {Op68M1},
4063 {Op69M1}, {Op6AM1}, {Op6B}, {Op6C}, {Op6DM1},
4064 {Op6EM1}, {Op6FM1}, {Op70}, {Op71M1}, {Op72M1},
4065 {Op73M1}, {Op74M1}, {Op75M1}, {Op76M1}, {Op77M1},
4066 {Op78}, {Op79M1}, {Op7AX1}, {Op7B}, {Op7C},
4067 {Op7DM1}, {Op7EM1}, {Op7FM1}, {Op80}, {Op81M1},
4068 {Op82}, {Op83M1}, {Op84X1}, {Op85M1}, {Op86X1},
4069 {Op87M1}, {Op88X1}, {Op89M1}, {Op8AM1}, {Op8B},
4070 {Op8CX1}, {Op8DM1}, {Op8EX1}, {Op8FM1}, {Op90},
4071 {Op91M1}, {Op92M1}, {Op93M1}, {Op94X1}, {Op95M1},
4072 {Op96X1}, {Op97M1}, {Op98M1}, {Op99M1}, {Op9A},
4073 {Op9BX1}, {Op9CM1}, {Op9DM1}, {Op9EM1}, {Op9FM1},
4074 {OpA0X1}, {OpA1M1}, {OpA2X1}, {OpA3M1}, {OpA4X1},
4075 {OpA5M1}, {OpA6X1}, {OpA7M1}, {OpA8X1}, {OpA9M1},
4076 {OpAAX1}, {OpAB}, {OpACX1}, {OpADM1}, {OpAEX1},
4077 {OpAFM1}, {OpB0}, {OpB1M1}, {OpB2M1}, {OpB3M1},
4078 {OpB4X1}, {OpB5M1}, {OpB6X1}, {OpB7M1}, {OpB8},
4079 {OpB9M1}, {OpBAX1}, {OpBBX1}, {OpBCX1}, {OpBDM1},
4080 {OpBEX1}, {OpBFM1}, {OpC0X1}, {OpC1M1}, {OpC2},
4081 {OpC3M1}, {OpC4X1}, {OpC5M1}, {OpC6M1}, {OpC7M1},
4082 {OpC8X1}, {OpC9M1}, {OpCAX1}, {OpCB}, {OpCCX1},
4083 {OpCDM1}, {OpCEM1}, {OpCFM1}, {OpD0}, {OpD1M1},
4084 {OpD2M1}, {OpD3M1}, {OpD4}, {OpD5M1}, {OpD6M1},
4085 {OpD7M1}, {OpD8}, {OpD9M1}, {OpDAX1}, {OpDB},
4086 {OpDC}, {OpDDM1}, {OpDEM1}, {OpDFM1}, {OpE0X1},
4087 {OpE1M1}, {OpE2}, {OpE3M1}, {OpE4X1}, {OpE5M1},
4088 {OpE6M1}, {OpE7M1}, {OpE8X1}, {OpE9M1}, {OpEA},
4089 {OpEB}, {OpECX1}, {OpEDM1}, {OpEEM1}, {OpEFM1},
4090 {OpF0}, {OpF1M1}, {OpF2M1}, {OpF3M1}, {OpF4},
4091 {OpF5M1}, {OpF6M1}, {OpF7M1}, {OpF8}, {OpF9M1},
4092 {OpFAX1}, {OpFB}, {OpFC}, {OpFDM1}, {OpFEM1},
4096 struct SOpcodes S9xOpcodesM1X0[256] =
4098 {Op00}, {Op01M1}, {Op02}, {Op03M1}, {Op04M1},
4099 {Op05M1}, {Op06M1}, {Op07M1}, {Op08}, {Op09M1},
4100 {Op0AM1}, {Op0B}, {Op0CM1}, {Op0DM1}, {Op0EM1},
4101 {Op0FM1}, {Op10}, {Op11M1}, {Op12M1}, {Op13M1},
4102 {Op14M1}, {Op15M1}, {Op16M1}, {Op17M1}, {Op18},
4103 {Op19M1}, {Op1AM1}, {Op1B}, {Op1CM1}, {Op1DM1},
4104 {Op1EM1}, {Op1FM1}, {Op20}, {Op21M1}, {Op22},
4105 {Op23M1}, {Op24M1}, {Op25M1}, {Op26M1}, {Op27M1},
4106 {Op28}, {Op29M1}, {Op2AM1}, {Op2B}, {Op2CM1},
4107 {Op2DM1}, {Op2EM1}, {Op2FM1}, {Op30}, {Op31M1},
4108 {Op32M1}, {Op33M1}, {Op34M1}, {Op35M1}, {Op36M1},
4109 {Op37M1}, {Op38}, {Op39M1}, {Op3AM1}, {Op3B},
4110 {Op3CM1}, {Op3DM1}, {Op3EM1}, {Op3FM1}, {Op40},
4111 {Op41M1}, {Op42}, {Op43M1}, {Op44X0}, {Op45M1},
4112 {Op46M1}, {Op47M1}, {Op48M1}, {Op49M1}, {Op4AM1},
4113 {Op4B}, {Op4C}, {Op4DM1}, {Op4EM1}, {Op4FM1},
4114 {Op50}, {Op51M1}, {Op52M1}, {Op53M1}, {Op54X0},
4115 {Op55M1}, {Op56M1}, {Op57M1}, {Op58}, {Op59M1},
4116 {Op5AX0}, {Op5B}, {Op5C}, {Op5DM1}, {Op5EM1},
4117 {Op5FM1}, {Op60}, {Op61M1}, {Op62}, {Op63M1},
4118 {Op64M1}, {Op65M1}, {Op66M1}, {Op67M1}, {Op68M1},
4119 {Op69M1}, {Op6AM1}, {Op6B}, {Op6C}, {Op6DM1},
4120 {Op6EM1}, {Op6FM1}, {Op70}, {Op71M1}, {Op72M1},
4121 {Op73M1}, {Op74M1}, {Op75M1}, {Op76M1}, {Op77M1},
4122 {Op78}, {Op79M1}, {Op7AX0}, {Op7B}, {Op7C},
4123 {Op7DM1}, {Op7EM1}, {Op7FM1}, {Op80}, {Op81M1},
4124 {Op82}, {Op83M1}, {Op84X0}, {Op85M1}, {Op86X0},
4125 {Op87M1}, {Op88X0}, {Op89M1}, {Op8AM1}, {Op8B},
4126 {Op8CX0}, {Op8DM1}, {Op8EX0}, {Op8FM1}, {Op90},
4127 {Op91M1}, {Op92M1}, {Op93M1}, {Op94X0}, {Op95M1},
4128 {Op96X0}, {Op97M1}, {Op98M1}, {Op99M1}, {Op9A},
4129 {Op9BX0}, {Op9CM1}, {Op9DM1}, {Op9EM1}, {Op9FM1},
4130 {OpA0X0}, {OpA1M1}, {OpA2X0}, {OpA3M1}, {OpA4X0},
4131 {OpA5M1}, {OpA6X0}, {OpA7M1}, {OpA8X0}, {OpA9M1},
4132 {OpAAX0}, {OpAB}, {OpACX0}, {OpADM1}, {OpAEX0},
4133 {OpAFM1}, {OpB0}, {OpB1M1}, {OpB2M1}, {OpB3M1},
4134 {OpB4X0}, {OpB5M1}, {OpB6X0}, {OpB7M1}, {OpB8},
4135 {OpB9M1}, {OpBAX0}, {OpBBX0}, {OpBCX0}, {OpBDM1},
4136 {OpBEX0}, {OpBFM1}, {OpC0X0}, {OpC1M1}, {OpC2},
4137 {OpC3M1}, {OpC4X0}, {OpC5M1}, {OpC6M1}, {OpC7M1},
4138 {OpC8X0}, {OpC9M1}, {OpCAX0}, {OpCB}, {OpCCX0},
4139 {OpCDM1}, {OpCEM1}, {OpCFM1}, {OpD0}, {OpD1M1},
4140 {OpD2M1}, {OpD3M1}, {OpD4}, {OpD5M1}, {OpD6M1},
4141 {OpD7M1}, {OpD8}, {OpD9M1}, {OpDAX0}, {OpDB},
4142 {OpDC}, {OpDDM1}, {OpDEM1}, {OpDFM1}, {OpE0X0},
4143 {OpE1M1}, {OpE2}, {OpE3M1}, {OpE4X0}, {OpE5M1},
4144 {OpE6M1}, {OpE7M1}, {OpE8X0}, {OpE9M1}, {OpEA},
4145 {OpEB}, {OpECX0}, {OpEDM1}, {OpEEM1}, {OpEFM1},
4146 {OpF0}, {OpF1M1}, {OpF2M1}, {OpF3M1}, {OpF4},
4147 {OpF5M1}, {OpF6M1}, {OpF7M1}, {OpF8}, {OpF9M1},
4148 {OpFAX0}, {OpFB}, {OpFC}, {OpFDM1}, {OpFEM1},
4152 struct SOpcodes S9xOpcodesM0X0[256] =
4154 {Op00}, {Op01M0}, {Op02}, {Op03M0}, {Op04M0},
4155 {Op05M0}, {Op06M0}, {Op07M0}, {Op08}, {Op09M0},
4156 {Op0AM0}, {Op0B}, {Op0CM0}, {Op0DM0}, {Op0EM0},
4157 {Op0FM0}, {Op10}, {Op11M0}, {Op12M0}, {Op13M0},
4158 {Op14M0}, {Op15M0}, {Op16M0}, {Op17M0}, {Op18},
4159 {Op19M0}, {Op1AM0}, {Op1B}, {Op1CM0}, {Op1DM0},
4160 {Op1EM0}, {Op1FM0}, {Op20}, {Op21M0}, {Op22},
4161 {Op23M0}, {Op24M0}, {Op25M0}, {Op26M0}, {Op27M0},
4162 {Op28}, {Op29M0}, {Op2AM0}, {Op2B}, {Op2CM0},
4163 {Op2DM0}, {Op2EM0}, {Op2FM0}, {Op30}, {Op31M0},
4164 {Op32M0}, {Op33M0}, {Op34M0}, {Op35M0}, {Op36M0},
4165 {Op37M0}, {Op38}, {Op39M0}, {Op3AM0}, {Op3B},
4166 {Op3CM0}, {Op3DM0}, {Op3EM0}, {Op3FM0}, {Op40},
4167 {Op41M0}, {Op42}, {Op43M0}, {Op44X0}, {Op45M0},
4168 {Op46M0}, {Op47M0}, {Op48M0}, {Op49M0}, {Op4AM0},
4169 {Op4B}, {Op4C}, {Op4DM0}, {Op4EM0}, {Op4FM0},
4170 {Op50}, {Op51M0}, {Op52M0}, {Op53M0}, {Op54X0},
4171 {Op55M0}, {Op56M0}, {Op57M0}, {Op58}, {Op59M0},
4172 {Op5AX0}, {Op5B}, {Op5C}, {Op5DM0}, {Op5EM0},
4173 {Op5FM0}, {Op60}, {Op61M0}, {Op62}, {Op63M0},
4174 {Op64M0}, {Op65M0}, {Op66M0}, {Op67M0}, {Op68M0},
4175 {Op69M0}, {Op6AM0}, {Op6B}, {Op6C}, {Op6DM0},
4176 {Op6EM0}, {Op6FM0}, {Op70}, {Op71M0}, {Op72M0},
4177 {Op73M0}, {Op74M0}, {Op75M0}, {Op76M0}, {Op77M0},
4178 {Op78}, {Op79M0}, {Op7AX0}, {Op7B}, {Op7C},
4179 {Op7DM0}, {Op7EM0}, {Op7FM0}, {Op80}, {Op81M0},
4180 {Op82}, {Op83M0}, {Op84X0}, {Op85M0}, {Op86X0},
4181 {Op87M0}, {Op88X0}, {Op89M0}, {Op8AM0}, {Op8B},
4182 {Op8CX0}, {Op8DM0}, {Op8EX0}, {Op8FM0}, {Op90},
4183 {Op91M0}, {Op92M0}, {Op93M0}, {Op94X0}, {Op95M0},
4184 {Op96X0}, {Op97M0}, {Op98M0}, {Op99M0}, {Op9A},
4185 {Op9BX0}, {Op9CM0}, {Op9DM0}, {Op9EM0}, {Op9FM0},
4186 {OpA0X0}, {OpA1M0}, {OpA2X0}, {OpA3M0}, {OpA4X0},
4187 {OpA5M0}, {OpA6X0}, {OpA7M0}, {OpA8X0}, {OpA9M0},
4188 {OpAAX0}, {OpAB}, {OpACX0}, {OpADM0}, {OpAEX0},
4189 {OpAFM0}, {OpB0}, {OpB1M0}, {OpB2M0}, {OpB3M0},
4190 {OpB4X0}, {OpB5M0}, {OpB6X0}, {OpB7M0}, {OpB8},
4191 {OpB9M0}, {OpBAX0}, {OpBBX0}, {OpBCX0}, {OpBDM0},
4192 {OpBEX0}, {OpBFM0}, {OpC0X0}, {OpC1M0}, {OpC2},
4193 {OpC3M0}, {OpC4X0}, {OpC5M0}, {OpC6M0}, {OpC7M0},
4194 {OpC8X0}, {OpC9M0}, {OpCAX0}, {OpCB}, {OpCCX0},
4195 {OpCDM0}, {OpCEM0}, {OpCFM0}, {OpD0}, {OpD1M0},
4196 {OpD2M0}, {OpD3M0}, {OpD4}, {OpD5M0}, {OpD6M0},
4197 {OpD7M0}, {OpD8}, {OpD9M0}, {OpDAX0}, {OpDB},
4198 {OpDC}, {OpDDM0}, {OpDEM0}, {OpDFM0}, {OpE0X0},
4199 {OpE1M0}, {OpE2}, {OpE3M0}, {OpE4X0}, {OpE5M0},
4200 {OpE6M0}, {OpE7M0}, {OpE8X0}, {OpE9M0}, {OpEA},
4201 {OpEB}, {OpECX0}, {OpEDM0}, {OpEEM0}, {OpEFM0},
4202 {OpF0}, {OpF1M0}, {OpF2M0}, {OpF3M0}, {OpF4},
4203 {OpF5M0}, {OpF6M0}, {OpF7M0}, {OpF8}, {OpF9M0},
4204 {OpFAX0}, {OpFB}, {OpFC}, {OpFDM0}, {OpFEM0},
4208 struct SOpcodes S9xOpcodesM0X1[256] =
4210 {Op00}, {Op01M0}, {Op02}, {Op03M0}, {Op04M0},
4211 {Op05M0}, {Op06M0}, {Op07M0}, {Op08}, {Op09M0},
4212 {Op0AM0}, {Op0B}, {Op0CM0}, {Op0DM0}, {Op0EM0},
4213 {Op0FM0}, {Op10}, {Op11M0}, {Op12M0}, {Op13M0},
4214 {Op14M0}, {Op15M0}, {Op16M0}, {Op17M0}, {Op18},
4215 {Op19M0}, {Op1AM0}, {Op1B}, {Op1CM0}, {Op1DM0},
4216 {Op1EM0}, {Op1FM0}, {Op20}, {Op21M0}, {Op22},
4217 {Op23M0}, {Op24M0}, {Op25M0}, {Op26M0}, {Op27M0},
4218 {Op28}, {Op29M0}, {Op2AM0}, {Op2B}, {Op2CM0},
4219 {Op2DM0}, {Op2EM0}, {Op2FM0}, {Op30}, {Op31M0},
4220 {Op32M0}, {Op33M0}, {Op34M0}, {Op35M0}, {Op36M0},
4221 {Op37M0}, {Op38}, {Op39M0}, {Op3AM0}, {Op3B},
4222 {Op3CM0}, {Op3DM0}, {Op3EM0}, {Op3FM0}, {Op40},
4223 {Op41M0}, {Op42}, {Op43M0}, {Op44X1}, {Op45M0},
4224 {Op46M0}, {Op47M0}, {Op48M0}, {Op49M0}, {Op4AM0},
4225 {Op4B}, {Op4C}, {Op4DM0}, {Op4EM0}, {Op4FM0},
4226 {Op50}, {Op51M0}, {Op52M0}, {Op53M0}, {Op54X1},
4227 {Op55M0}, {Op56M0}, {Op57M0}, {Op58}, {Op59M0},
4228 {Op5AX1}, {Op5B}, {Op5C}, {Op5DM0}, {Op5EM0},
4229 {Op5FM0}, {Op60}, {Op61M0}, {Op62}, {Op63M0},
4230 {Op64M0}, {Op65M0}, {Op66M0}, {Op67M0}, {Op68M0},
4231 {Op69M0}, {Op6AM0}, {Op6B}, {Op6C}, {Op6DM0},
4232 {Op6EM0}, {Op6FM0}, {Op70}, {Op71M0}, {Op72M0},
4233 {Op73M0}, {Op74M0}, {Op75M0}, {Op76M0}, {Op77M0},
4234 {Op78}, {Op79M0}, {Op7AX1}, {Op7B}, {Op7C},
4235 {Op7DM0}, {Op7EM0}, {Op7FM0}, {Op80}, {Op81M0},
4236 {Op82}, {Op83M0}, {Op84X1}, {Op85M0}, {Op86X1},
4237 {Op87M0}, {Op88X1}, {Op89M0}, {Op8AM0}, {Op8B},
4238 {Op8CX1}, {Op8DM0}, {Op8EX1}, {Op8FM0}, {Op90},
4239 {Op91M0}, {Op92M0}, {Op93M0}, {Op94X1}, {Op95M0},
4240 {Op96X1}, {Op97M0}, {Op98M0}, {Op99M0}, {Op9A},
4241 {Op9BX1}, {Op9CM0}, {Op9DM0}, {Op9EM0}, {Op9FM0},
4242 {OpA0X1}, {OpA1M0}, {OpA2X1}, {OpA3M0}, {OpA4X1},
4243 {OpA5M0}, {OpA6X1}, {OpA7M0}, {OpA8X1}, {OpA9M0},
4244 {OpAAX1}, {OpAB}, {OpACX1}, {OpADM0}, {OpAEX1},
4245 {OpAFM0}, {OpB0}, {OpB1M0}, {OpB2M0}, {OpB3M0},
4246 {OpB4X1}, {OpB5M0}, {OpB6X1}, {OpB7M0}, {OpB8},
4247 {OpB9M0}, {OpBAX1}, {OpBBX1}, {OpBCX1}, {OpBDM0},
4248 {OpBEX1}, {OpBFM0}, {OpC0X1}, {OpC1M0}, {OpC2},
4249 {OpC3M0}, {OpC4X1}, {OpC5M0}, {OpC6M0}, {OpC7M0},
4250 {OpC8X1}, {OpC9M0}, {OpCAX1}, {OpCB}, {OpCCX1},
4251 {OpCDM0}, {OpCEM0}, {OpCFM0}, {OpD0}, {OpD1M0},
4252 {OpD2M0}, {OpD3M0}, {OpD4}, {OpD5M0}, {OpD6M0},
4253 {OpD7M0}, {OpD8}, {OpD9M0}, {OpDAX1}, {OpDB},
4254 {OpDC}, {OpDDM0}, {OpDEM0}, {OpDFM0}, {OpE0X1},
4255 {OpE1M0}, {OpE2}, {OpE3M0}, {OpE4X1}, {OpE5M0},
4256 {OpE6M0}, {OpE7M0}, {OpE8X1}, {OpE9M0}, {OpEA},
4257 {OpEB}, {OpECX1}, {OpEDM0}, {OpEEM0}, {OpEFM0},
4258 {OpF0}, {OpF1M0}, {OpF2M0}, {OpF3M0}, {OpF4},
4259 {OpF5M0}, {OpF6M0}, {OpF7M0}, {OpF8}, {OpF9M0},
4260 {OpFAX1}, {OpFB}, {OpFC}, {OpFDM0}, {OpFEM0},